7aa8f5d9b8fb060f883744b224aa4e97a4250f48
2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
25 /** @file brw_vec4_cmod_propagation.cpp
27 * Really similar to brw_fs_cmod_propagation but adapted to vec4 needs. Check
28 * brw_fs_cmod_propagation for further details on the rationale behind this
38 opt_cmod_propagation_local(bblock_t
*block
)
40 bool progress
= false;
41 int ip
= block
->end_ip
+ 1;
43 foreach_inst_in_block_reverse_safe(vec4_instruction
, inst
, block
) {
46 if ((inst
->opcode
!= BRW_OPCODE_AND
&&
47 inst
->opcode
!= BRW_OPCODE_CMP
&&
48 inst
->opcode
!= BRW_OPCODE_MOV
) ||
49 inst
->predicate
!= BRW_PREDICATE_NONE
||
50 !inst
->dst
.is_null() ||
51 inst
->src
[0].file
!= VGRF
||
55 if (inst
->opcode
== BRW_OPCODE_AND
&&
56 !(inst
->src
[1].is_one() &&
57 inst
->conditional_mod
== BRW_CONDITIONAL_NZ
&&
58 !inst
->src
[0].negate
))
61 if (inst
->opcode
== BRW_OPCODE_CMP
&& !inst
->src
[1].is_zero())
64 if (inst
->opcode
== BRW_OPCODE_MOV
&&
65 inst
->conditional_mod
!= BRW_CONDITIONAL_NZ
)
68 bool read_flag
= false;
69 foreach_inst_in_block_reverse_starting_from(vec4_instruction
, scan_inst
, inst
) {
70 if (inst
->src
[0].in_range(scan_inst
->dst
,
71 scan_inst
->regs_written
)) {
72 if ((scan_inst
->predicate
&& scan_inst
->opcode
!= BRW_OPCODE_SEL
) ||
73 scan_inst
->dst
.reg_offset
!= inst
->src
[0].reg_offset
||
74 (scan_inst
->dst
.writemask
!= WRITEMASK_X
&&
75 scan_inst
->dst
.writemask
!= WRITEMASK_XYZW
) ||
76 (scan_inst
->dst
.writemask
== WRITEMASK_XYZW
&&
77 inst
->src
[0].swizzle
!= BRW_SWIZZLE_XYZW
) ||
78 (inst
->dst
.writemask
& ~scan_inst
->dst
.writemask
) != 0) {
82 /* CMP's result is the same regardless of dest type. */
83 if (inst
->conditional_mod
== BRW_CONDITIONAL_NZ
&&
84 scan_inst
->opcode
== BRW_OPCODE_CMP
&&
85 (inst
->dst
.type
== BRW_REGISTER_TYPE_D
||
86 inst
->dst
.type
== BRW_REGISTER_TYPE_UD
)) {
92 /* If the AND wasn't handled by the previous case, it isn't safe
95 if (inst
->opcode
== BRW_OPCODE_AND
)
98 /* Comparisons operate differently for ints and floats */
99 if (scan_inst
->dst
.type
!= inst
->dst
.type
&&
100 (scan_inst
->dst
.type
== BRW_REGISTER_TYPE_F
||
101 inst
->dst
.type
== BRW_REGISTER_TYPE_F
))
104 /* If the instruction generating inst's source also wrote the
105 * flag, and inst is doing a simple .nz comparison, then inst
106 * is redundant - the appropriate value is already in the flag
107 * register. Delete inst.
109 if (inst
->conditional_mod
== BRW_CONDITIONAL_NZ
&&
110 !inst
->src
[0].negate
&&
111 scan_inst
->writes_flag()) {
117 /* Otherwise, try propagating the conditional. */
118 enum brw_conditional_mod cond
=
119 inst
->src
[0].negate
? brw_swap_cmod(inst
->conditional_mod
)
120 : inst
->conditional_mod
;
122 if (scan_inst
->can_do_cmod() &&
123 ((!read_flag
&& scan_inst
->conditional_mod
== BRW_CONDITIONAL_NONE
) ||
124 scan_inst
->conditional_mod
== cond
)) {
125 scan_inst
->conditional_mod
= cond
;
132 if (scan_inst
->writes_flag())
135 read_flag
= read_flag
|| scan_inst
->reads_flag();
143 vec4_visitor::opt_cmod_propagation()
145 bool progress
= false;
147 foreach_block_reverse(block
, cfg
) {
148 progress
= opt_cmod_propagation_local(block
) || progress
;
152 invalidate_live_intervals();
157 } /* namespace brw */