src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_vec4.h"
  25 #include "../glsl/ir_print_visitor.h"
  26
  27 using namespace brw;
  28
  29 namespace brw {
  30
  31 static void
  32 assign(int *reg_hw_locations, reg *reg)
  33 {
  34    if (reg->file == GRF) {
  35       reg->reg = reg_hw_locations[reg->reg];
  36    }
  37 }
  38
  39 void
  40 vec4_visitor::reg_allocate_trivial()
  41 {
  42    int hw_reg_mapping[this->virtual_grf_count];
  43    bool virtual_grf_used[this->virtual_grf_count];
  44    int i;
  45    int next;
  46
  47    /* Calculate which virtual GRFs are actually in use after whatever
  48     * optimization passes have occurred.
  49     */
  50    for (int i = 0; i < this->virtual_grf_count; i++) {
  51       virtual_grf_used[i] = false;
  52    }
  53
  54    foreach_iter(exec_list_iterator, iter, this->instructions) {
  55       vec4_instruction *inst = (vec4_instruction *)iter.get();
  56
  57       if (inst->dst.file == GRF)
  58          virtual_grf_used[inst->dst.reg] = true;
  59
  60       for (int i = 0; i < 3; i++) {
  61          if (inst->src[i].file == GRF)
  62             virtual_grf_used[inst->src[i].reg] = true;
  63       }
  64    }
  65
  66    /* Note that compressed instructions require alignment to 2 registers. */
  67    hw_reg_mapping[0] = this->first_non_payload_grf;
  68    next = hw_reg_mapping[0] + this->virtual_grf_sizes[0];
  69    for (i = 1; i < this->virtual_grf_count; i++) {
  70       if (virtual_grf_used[i]) {
  71          hw_reg_mapping[i] = next;
  72          next += this->virtual_grf_sizes[i];
  73       }
  74    }
  75    prog_data->total_grf = next;
  76
  77    foreach_iter(exec_list_iterator, iter, this->instructions) {
  78       vec4_instruction *inst = (vec4_instruction *)iter.get();
  79
  80       assign(hw_reg_mapping, &inst->dst);
  81       assign(hw_reg_mapping, &inst->src[0]);
  82       assign(hw_reg_mapping, &inst->src[1]);
  83       assign(hw_reg_mapping, &inst->src[2]);
  84    }
  85
  86    if (prog_data->total_grf > BRW_MAX_GRF) {
  87       fail("Ran out of regs on trivial allocator (%d/%d)\n",
  88            prog_data->total_grf, BRW_MAX_GRF);
  89    }
  90 }
  91
  92 void
  93 vec4_visitor::reg_allocate()
  94 {
  95    reg_allocate_trivial();
  96 }
  97
  98 } /* namespace brw */