src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp

   1 /*
   2  * Copyright © 2011 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "brw_vec4.h"
  25 #include "../glsl/ir_print_visitor.h"
  26
  27 using namespace brw;
  28
  29 namespace brw {
  30
  31 static void
  32 assign(int *reg_hw_locations, reg *reg)
  33 {
  34    if (reg->file == GRF) {
  35       reg->reg = reg_hw_locations[reg->reg];
  36    }
  37 }
  38
  39 void
  40 vec4_visitor::reg_allocate_trivial()
  41 {
  42    int last_grf = 0;
  43    int hw_reg_mapping[this->virtual_grf_count];
  44    int i;
  45    int next;
  46
  47    /* Note that compressed instructions require alignment to 2 registers. */
  48    hw_reg_mapping[0] = this->first_non_payload_grf;
  49    next = hw_reg_mapping[0] + this->virtual_grf_sizes[0];
  50    for (i = 1; i < this->virtual_grf_count; i++) {
  51       hw_reg_mapping[i] = next;
  52       next += this->virtual_grf_sizes[i];
  53    }
  54    prog_data->total_grf = next;
  55
  56    foreach_iter(exec_list_iterator, iter, this->instructions) {
  57       vec4_instruction *inst = (vec4_instruction *)iter.get();
  58
  59       assign(hw_reg_mapping, &inst->dst);
  60       assign(hw_reg_mapping, &inst->src[0]);
  61       assign(hw_reg_mapping, &inst->src[1]);
  62       assign(hw_reg_mapping, &inst->src[2]);
  63    }
  64
  65    if (last_grf >= BRW_MAX_GRF) {
  66       fail("Ran out of regs on trivial allocator (%d/%d)\n",
  67            last_grf, BRW_MAX_GRF);
  68    }
  69 }
  70
  71 void
  72 vec4_visitor::reg_allocate()
  73 {
  74    reg_allocate_trivial();
  75 }
  76
  77 } /* namespace brw */