i965: "Fix" aux offsets
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vs.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32
33 #include "main/compiler.h"
34 #include "main/context.h"
35 #include "brw_context.h"
36 #include "brw_vs.h"
37 #include "brw_util.h"
38 #include "brw_state.h"
39 #include "program/prog_print.h"
40 #include "program/prog_parameter.h"
41 #include "brw_nir.h"
42 #include "brw_program.h"
43
44 #include "util/ralloc.h"
45
46 GLbitfield64
47 brw_vs_outputs_written(struct brw_context *brw, struct brw_vs_prog_key *key,
48 GLbitfield64 user_varyings)
49 {
50 GLbitfield64 outputs_written = user_varyings;
51
52 if (key->copy_edgeflag) {
53 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
54 }
55
56 if (brw->gen < 6) {
57 /* Put dummy slots into the VUE for the SF to put the replaced
58 * point sprite coords in. We shouldn't need these dummy slots,
59 * which take up precious URB space, but it would mean that the SF
60 * doesn't get nice aligned pairs of input coords into output
61 * coords, which would be a pain to handle.
62 */
63 for (unsigned i = 0; i < 8; i++) {
64 if (key->point_coord_replace & (1 << i))
65 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
66 }
67
68 /* if back colors are written, allocate slots for front colors too */
69 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0))
70 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0);
71 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1))
72 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1);
73 }
74
75 /* In order for legacy clipping to work, we need to populate the clip
76 * distance varying slots whenever clipping is enabled, even if the vertex
77 * shader doesn't write to gl_ClipDistance.
78 */
79 if (key->nr_userclip_plane_consts > 0) {
80 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0);
81 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1);
82 }
83
84 return outputs_written;
85 }
86
87 bool
88 brw_codegen_vs_prog(struct brw_context *brw,
89 struct gl_shader_program *prog,
90 struct brw_program *vp,
91 struct brw_vs_prog_key *key)
92 {
93 const struct brw_compiler *compiler = brw->screen->compiler;
94 const struct gen_device_info *devinfo = &brw->screen->devinfo;
95 GLuint program_size;
96 const GLuint *program;
97 struct brw_vs_prog_data prog_data;
98 struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base;
99 void *mem_ctx;
100 struct brw_shader *vs = NULL;
101 bool start_busy = false;
102 double start_time = 0;
103
104 if (prog)
105 vs = (struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_VERTEX];
106
107 memset(&prog_data, 0, sizeof(prog_data));
108
109 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
110 if (!prog)
111 stage_prog_data->use_alt_mode = true;
112
113 mem_ctx = ralloc_context(NULL);
114
115 brw_assign_common_binding_table_offsets(MESA_SHADER_VERTEX, devinfo, prog,
116 &vp->program, &prog_data.base.base,
117 0);
118
119 /* Allocate the references to the uniforms that will end up in the
120 * prog_data associated with the compiled program, and which will be freed
121 * by the state cache.
122 */
123 int param_count = vp->program.nir->num_uniforms / 4;
124
125 if (vs)
126 prog_data.base.base.nr_image_params = vs->base.NumImages;
127
128 /* vec4_visitor::setup_uniform_clipplane_values() also uploads user clip
129 * planes as uniforms.
130 */
131 param_count += key->nr_userclip_plane_consts * 4;
132
133 stage_prog_data->param =
134 rzalloc_array(NULL, const gl_constant_value *, param_count);
135 stage_prog_data->pull_param =
136 rzalloc_array(NULL, const gl_constant_value *, param_count);
137 stage_prog_data->image_param =
138 rzalloc_array(NULL, struct brw_image_param,
139 stage_prog_data->nr_image_params);
140 stage_prog_data->nr_params = param_count;
141
142 if (prog) {
143 brw_nir_setup_glsl_uniforms(vp->program.nir, prog, &vp->program,
144 &prog_data.base.base,
145 compiler->scalar_stage[MESA_SHADER_VERTEX]);
146 } else {
147 brw_nir_setup_arb_uniforms(vp->program.nir, &vp->program,
148 &prog_data.base.base);
149 }
150
151 uint64_t outputs_written =
152 brw_vs_outputs_written(brw, key, vp->program.info.outputs_written);
153 prog_data.inputs_read = vp->program.info.inputs_read;
154 prog_data.double_inputs_read = vp->program.info.double_inputs_read;
155
156 if (key->copy_edgeflag) {
157 prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
158 }
159
160 prog_data.base.cull_distance_mask =
161 ((1 << vp->program.CullDistanceArraySize) - 1) <<
162 vp->program.ClipDistanceArraySize;
163
164 brw_compute_vue_map(devinfo,
165 &prog_data.base.vue_map, outputs_written,
166 prog ? prog->SeparateShader ||
167 prog->_LinkedShaders[MESA_SHADER_TESS_EVAL]
168 : false);
169
170 if (0) {
171 _mesa_fprint_program_opt(stderr, &vp->program, PROG_PRINT_DEBUG, true);
172 }
173
174 if (unlikely(brw->perf_debug)) {
175 start_busy = (brw->batch.last_bo &&
176 drm_intel_bo_busy(brw->batch.last_bo));
177 start_time = get_time();
178 }
179
180 if (unlikely(INTEL_DEBUG & DEBUG_VS)) {
181 brw_dump_ir("vertex", prog, vs ? &vs->base : NULL, &vp->program);
182
183 fprintf(stderr, "VS Output ");
184 brw_print_vue_map(stderr, &prog_data.base.vue_map);
185 }
186
187 int st_index = -1;
188 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
189 st_index = brw_get_shader_time_index(brw, prog, &vp->program, ST_VS);
190
191 /* Emit GEN4 code.
192 */
193 char *error_str;
194 program = brw_compile_vs(compiler, brw, mem_ctx, key, &prog_data,
195 vp->program.nir,
196 brw_select_clip_planes(&brw->ctx),
197 !_mesa_is_gles3(&brw->ctx),
198 st_index, &program_size, &error_str);
199 if (program == NULL) {
200 if (prog) {
201 prog->LinkStatus = false;
202 ralloc_strcat(&prog->InfoLog, error_str);
203 }
204
205 _mesa_problem(NULL, "Failed to compile vertex shader: %s\n", error_str);
206
207 ralloc_free(mem_ctx);
208 return false;
209 }
210
211 if (unlikely(brw->perf_debug) && vs) {
212 if (vs->compiled_once) {
213 brw_vs_debug_recompile(brw, prog, key);
214 }
215 if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
216 perf_debug("VS compile took %.03f ms and stalled the GPU\n",
217 (get_time() - start_time) * 1000);
218 }
219 vs->compiled_once = true;
220 }
221
222 /* Scratch space is used for register spilling */
223 brw_alloc_stage_scratch(brw, &brw->vs.base,
224 prog_data.base.base.total_scratch,
225 devinfo->max_vs_threads);
226
227 brw_upload_cache(&brw->cache, BRW_CACHE_VS_PROG,
228 key, sizeof(struct brw_vs_prog_key),
229 program, program_size,
230 &prog_data, sizeof(prog_data),
231 &brw->vs.base.prog_offset, &brw->vs.base.prog_data);
232 ralloc_free(mem_ctx);
233
234 return true;
235 }
236
237 void
238 brw_vs_debug_recompile(struct brw_context *brw,
239 struct gl_shader_program *prog,
240 const struct brw_vs_prog_key *key)
241 {
242 struct brw_cache_item *c = NULL;
243 const struct brw_vs_prog_key *old_key = NULL;
244 bool found = false;
245
246 perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
247
248 for (unsigned int i = 0; i < brw->cache.size; i++) {
249 for (c = brw->cache.items[i]; c; c = c->next) {
250 if (c->cache_id == BRW_CACHE_VS_PROG) {
251 old_key = c->key;
252
253 if (old_key->program_string_id == key->program_string_id)
254 break;
255 }
256 }
257 if (c)
258 break;
259 }
260
261 if (!c) {
262 perf_debug(" Didn't find previous compile in the shader cache for "
263 "debug\n");
264 return;
265 }
266
267 for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
268 found |= key_debug(brw, "Vertex attrib w/a flags",
269 old_key->gl_attrib_wa_flags[i],
270 key->gl_attrib_wa_flags[i]);
271 }
272
273 found |= key_debug(brw, "legacy user clipping",
274 old_key->nr_userclip_plane_consts,
275 key->nr_userclip_plane_consts);
276
277 found |= key_debug(brw, "copy edgeflag",
278 old_key->copy_edgeflag, key->copy_edgeflag);
279 found |= key_debug(brw, "PointCoord replace",
280 old_key->point_coord_replace, key->point_coord_replace);
281 found |= key_debug(brw, "vertex color clamping",
282 old_key->clamp_vertex_color, key->clamp_vertex_color);
283
284 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
285
286 if (!found) {
287 perf_debug(" Something else\n");
288 }
289 }
290
291 static bool
292 brw_vs_state_dirty(const struct brw_context *brw)
293 {
294 return brw_state_dirty(brw,
295 _NEW_BUFFERS |
296 _NEW_LIGHT |
297 _NEW_POINT |
298 _NEW_POLYGON |
299 _NEW_TEXTURE |
300 _NEW_TRANSFORM,
301 BRW_NEW_VERTEX_PROGRAM |
302 BRW_NEW_VS_ATTRIB_WORKAROUNDS);
303 }
304
305 void
306 brw_vs_populate_key(struct brw_context *brw,
307 struct brw_vs_prog_key *key)
308 {
309 struct gl_context *ctx = &brw->ctx;
310 /* BRW_NEW_VERTEX_PROGRAM */
311 struct brw_program *vp = (struct brw_program *)brw->vertex_program;
312 struct gl_program *prog = (struct gl_program *) brw->vertex_program;
313
314 memset(key, 0, sizeof(*key));
315
316 /* Just upload the program verbatim for now. Always send it all
317 * the inputs it asks for, whether they are varying or not.
318 */
319 key->program_string_id = vp->id;
320
321 if (ctx->Transform.ClipPlanesEnabled != 0 &&
322 (ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGLES) &&
323 vp->program.ClipDistanceArraySize == 0) {
324 key->nr_userclip_plane_consts =
325 _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
326 }
327
328 if (brw->gen < 6) {
329 /* _NEW_POLYGON */
330 key->copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
331 ctx->Polygon.BackMode != GL_FILL);
332
333 /* _NEW_POINT */
334 if (ctx->Point.PointSprite) {
335 key->point_coord_replace = ctx->Point.CoordReplace & 0xff;
336 }
337 }
338
339 if (prog->nir->info->outputs_written &
340 (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 |
341 VARYING_BIT_BFC1)) {
342 /* _NEW_LIGHT | _NEW_BUFFERS */
343 key->clamp_vertex_color = ctx->Light._ClampVertexColor;
344 }
345
346 /* _NEW_TEXTURE */
347 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
348
349 /* BRW_NEW_VS_ATTRIB_WORKAROUNDS */
350 if (brw->gen < 8 && !brw->is_haswell) {
351 memcpy(key->gl_attrib_wa_flags, brw->vb.attrib_wa_flags,
352 sizeof(brw->vb.attrib_wa_flags));
353 }
354 }
355
356 void
357 brw_upload_vs_prog(struct brw_context *brw)
358 {
359 struct gl_context *ctx = &brw->ctx;
360 struct gl_shader_program **current = ctx->_Shader->CurrentProgram;
361 struct brw_vs_prog_key key;
362 /* BRW_NEW_VERTEX_PROGRAM */
363 struct brw_program *vp = (struct brw_program *)brw->vertex_program;
364
365 if (!brw_vs_state_dirty(brw))
366 return;
367
368 brw_vs_populate_key(brw, &key);
369
370 if (!brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG,
371 &key, sizeof(key),
372 &brw->vs.base.prog_offset, &brw->vs.base.prog_data)) {
373 bool success = brw_codegen_vs_prog(brw, current[MESA_SHADER_VERTEX],
374 vp, &key);
375 (void) success;
376 assert(success);
377 }
378 }
379
380 bool
381 brw_vs_precompile(struct gl_context *ctx,
382 struct gl_shader_program *shader_prog,
383 struct gl_program *prog)
384 {
385 struct brw_context *brw = brw_context(ctx);
386 struct brw_vs_prog_key key;
387 uint32_t old_prog_offset = brw->vs.base.prog_offset;
388 struct brw_stage_prog_data *old_prog_data = brw->vs.base.prog_data;
389 bool success;
390
391 struct brw_program *bvp = brw_program(prog);
392
393 memset(&key, 0, sizeof(key));
394
395 brw_setup_tex_for_precompile(brw, &key.tex, prog);
396 key.program_string_id = bvp->id;
397 key.clamp_vertex_color =
398 (prog->nir->info->outputs_written &
399 (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 |
400 VARYING_BIT_BFC1));
401
402 success = brw_codegen_vs_prog(brw, shader_prog, bvp, &key);
403
404 brw->vs.base.prog_offset = old_prog_offset;
405 brw->vs.base.prog_data = old_prog_data;
406
407 return success;
408 }