4129046325743bc6d8407de99ff579bc4a17b8af
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vs.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32
33 #include "main/compiler.h"
34 #include "main/context.h"
35 #include "brw_context.h"
36 #include "brw_vs.h"
37 #include "brw_util.h"
38 #include "brw_state.h"
39 #include "program/prog_print.h"
40 #include "program/prog_parameter.h"
41 #include "brw_nir.h"
42
43 #include "util/ralloc.h"
44
45 bool
46 brw_codegen_vs_prog(struct brw_context *brw,
47 struct gl_shader_program *prog,
48 struct brw_vertex_program *vp,
49 struct brw_vs_prog_key *key)
50 {
51 GLuint program_size;
52 const GLuint *program;
53 struct brw_vs_prog_data prog_data;
54 struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base;
55 void *mem_ctx;
56 int i;
57 struct brw_shader *vs = NULL;
58 bool start_busy = false;
59 double start_time = 0;
60
61 if (prog)
62 vs = (struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_VERTEX];
63
64 memset(&prog_data, 0, sizeof(prog_data));
65
66 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
67 if (!prog)
68 stage_prog_data->use_alt_mode = true;
69
70 mem_ctx = ralloc_context(NULL);
71
72 brw_assign_common_binding_table_offsets(MESA_SHADER_VERTEX,
73 brw->intelScreen->devinfo,
74 prog, &vp->program.Base,
75 &prog_data.base.base, 0);
76
77 /* Allocate the references to the uniforms that will end up in the
78 * prog_data associated with the compiled program, and which will be freed
79 * by the state cache.
80 */
81 int param_count = vp->program.Base.nir->num_uniforms;
82 if (!brw->intelScreen->compiler->scalar_vs)
83 param_count *= 4;
84
85 if (vs)
86 prog_data.base.base.nr_image_params = vs->base.NumImages;
87
88 /* vec4_visitor::setup_uniform_clipplane_values() also uploads user clip
89 * planes as uniforms.
90 */
91 param_count += key->nr_userclip_plane_consts * 4;
92
93 stage_prog_data->param =
94 rzalloc_array(NULL, const gl_constant_value *, param_count);
95 stage_prog_data->pull_param =
96 rzalloc_array(NULL, const gl_constant_value *, param_count);
97 stage_prog_data->image_param =
98 rzalloc_array(NULL, struct brw_image_param,
99 stage_prog_data->nr_image_params);
100 stage_prog_data->nr_params = param_count;
101
102 if (prog) {
103 brw_nir_setup_glsl_uniforms(vp->program.Base.nir, prog, &vp->program.Base,
104 &prog_data.base.base,
105 brw->intelScreen->compiler->scalar_vs);
106 } else {
107 brw_nir_setup_arb_uniforms(vp->program.Base.nir, &vp->program.Base,
108 &prog_data.base.base);
109 }
110
111 GLbitfield64 outputs_written = vp->program.Base.OutputsWritten;
112 prog_data.inputs_read = vp->program.Base.InputsRead;
113
114 if (key->copy_edgeflag) {
115 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
116 prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
117 }
118
119 if (brw->gen < 6) {
120 /* Put dummy slots into the VUE for the SF to put the replaced
121 * point sprite coords in. We shouldn't need these dummy slots,
122 * which take up precious URB space, but it would mean that the SF
123 * doesn't get nice aligned pairs of input coords into output
124 * coords, which would be a pain to handle.
125 */
126 for (i = 0; i < 8; i++) {
127 if (key->point_coord_replace & (1 << i))
128 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
129 }
130
131 /* if back colors are written, allocate slots for front colors too */
132 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0))
133 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0);
134 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1))
135 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1);
136 }
137
138 /* In order for legacy clipping to work, we need to populate the clip
139 * distance varying slots whenever clipping is enabled, even if the vertex
140 * shader doesn't write to gl_ClipDistance.
141 */
142 if (key->nr_userclip_plane_consts > 0) {
143 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0);
144 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1);
145 }
146
147 brw_compute_vue_map(brw->intelScreen->devinfo,
148 &prog_data.base.vue_map, outputs_written,
149 prog ? prog->SeparateShader : false);
150
151 unsigned nr_attributes = _mesa_bitcount_64(prog_data.inputs_read);
152
153 /* gl_VertexID and gl_InstanceID are system values, but arrive via an
154 * incoming vertex attribute. So, add an extra slot.
155 */
156 if (vp->program.Base.SystemValuesRead &
157 (BITFIELD64_BIT(SYSTEM_VALUE_VERTEX_ID_ZERO_BASE) |
158 BITFIELD64_BIT(SYSTEM_VALUE_INSTANCE_ID))) {
159 nr_attributes++;
160 }
161
162 /* The 3DSTATE_VS documentation lists the lower bound on "Vertex URB Entry
163 * Read Length" as 1 in vec4 mode, and 0 in SIMD8 mode. Empirically, in
164 * vec4 mode, the hardware appears to wedge unless we read something.
165 */
166 if (brw->intelScreen->compiler->scalar_vs)
167 prog_data.base.urb_read_length = DIV_ROUND_UP(nr_attributes, 2);
168 else
169 prog_data.base.urb_read_length = DIV_ROUND_UP(MAX2(nr_attributes, 1), 2);
170
171 prog_data.nr_attributes = nr_attributes;
172
173 /* Since vertex shaders reuse the same VUE entry for inputs and outputs
174 * (overwriting the original contents), we need to make sure the size is
175 * the larger of the two.
176 */
177 const unsigned vue_entries =
178 MAX2(nr_attributes, prog_data.base.vue_map.num_slots);
179
180 if (brw->gen == 6)
181 prog_data.base.urb_entry_size = DIV_ROUND_UP(vue_entries, 8);
182 else
183 prog_data.base.urb_entry_size = DIV_ROUND_UP(vue_entries, 4);
184
185 if (0) {
186 _mesa_fprint_program_opt(stderr, &vp->program.Base, PROG_PRINT_DEBUG,
187 true);
188 }
189
190 if (unlikely(brw->perf_debug)) {
191 start_busy = (brw->batch.last_bo &&
192 drm_intel_bo_busy(brw->batch.last_bo));
193 start_time = get_time();
194 }
195
196 if (unlikely(INTEL_DEBUG & DEBUG_VS))
197 brw_dump_ir("vertex", prog, vs ? &vs->base : NULL, &vp->program.Base);
198
199 int st_index = -1;
200 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
201 st_index = brw_get_shader_time_index(brw, prog, &vp->program.Base, ST_VS);
202
203 /* Emit GEN4 code.
204 */
205 char *error_str;
206 program = brw_compile_vs(brw->intelScreen->compiler, brw, mem_ctx, key,
207 &prog_data, vp->program.Base.nir,
208 brw_select_clip_planes(&brw->ctx),
209 !_mesa_is_gles3(&brw->ctx),
210 st_index, &program_size, &error_str);
211 if (program == NULL) {
212 if (prog) {
213 prog->LinkStatus = false;
214 ralloc_strcat(&prog->InfoLog, error_str);
215 }
216
217 _mesa_problem(NULL, "Failed to compile vertex shader: %s\n", error_str);
218
219 ralloc_free(mem_ctx);
220 return false;
221 }
222
223 if (unlikely(brw->perf_debug) && vs) {
224 if (vs->compiled_once) {
225 brw_vs_debug_recompile(brw, prog, key);
226 }
227 if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
228 perf_debug("VS compile took %.03f ms and stalled the GPU\n",
229 (get_time() - start_time) * 1000);
230 }
231 vs->compiled_once = true;
232 }
233
234 /* Scratch space is used for register spilling */
235 if (prog_data.base.base.total_scratch) {
236 brw_get_scratch_bo(brw, &brw->vs.base.scratch_bo,
237 prog_data.base.base.total_scratch *
238 brw->max_vs_threads);
239 }
240
241 brw_upload_cache(&brw->cache, BRW_CACHE_VS_PROG,
242 key, sizeof(struct brw_vs_prog_key),
243 program, program_size,
244 &prog_data, sizeof(prog_data),
245 &brw->vs.base.prog_offset, &brw->vs.prog_data);
246 ralloc_free(mem_ctx);
247
248 return true;
249 }
250
251 static bool
252 key_debug(struct brw_context *brw, const char *name, int a, int b)
253 {
254 if (a != b) {
255 perf_debug(" %s %d->%d\n", name, a, b);
256 return true;
257 }
258 return false;
259 }
260
261 void
262 brw_vs_debug_recompile(struct brw_context *brw,
263 struct gl_shader_program *prog,
264 const struct brw_vs_prog_key *key)
265 {
266 struct brw_cache_item *c = NULL;
267 const struct brw_vs_prog_key *old_key = NULL;
268 bool found = false;
269
270 perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
271
272 for (unsigned int i = 0; i < brw->cache.size; i++) {
273 for (c = brw->cache.items[i]; c; c = c->next) {
274 if (c->cache_id == BRW_CACHE_VS_PROG) {
275 old_key = c->key;
276
277 if (old_key->program_string_id == key->program_string_id)
278 break;
279 }
280 }
281 if (c)
282 break;
283 }
284
285 if (!c) {
286 perf_debug(" Didn't find previous compile in the shader cache for "
287 "debug\n");
288 return;
289 }
290
291 for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
292 found |= key_debug(brw, "Vertex attrib w/a flags",
293 old_key->gl_attrib_wa_flags[i],
294 key->gl_attrib_wa_flags[i]);
295 }
296
297 found |= key_debug(brw, "legacy user clipping",
298 old_key->nr_userclip_plane_consts,
299 key->nr_userclip_plane_consts);
300
301 found |= key_debug(brw, "copy edgeflag",
302 old_key->copy_edgeflag, key->copy_edgeflag);
303 found |= key_debug(brw, "PointCoord replace",
304 old_key->point_coord_replace, key->point_coord_replace);
305 found |= key_debug(brw, "vertex color clamping",
306 old_key->clamp_vertex_color, key->clamp_vertex_color);
307
308 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
309
310 if (!found) {
311 perf_debug(" Something else\n");
312 }
313 }
314
315 static bool
316 brw_vs_state_dirty(struct brw_context *brw)
317 {
318 return brw_state_dirty(brw,
319 _NEW_BUFFERS |
320 _NEW_LIGHT |
321 _NEW_POINT |
322 _NEW_POLYGON |
323 _NEW_TEXTURE |
324 _NEW_TRANSFORM,
325 BRW_NEW_VERTEX_PROGRAM |
326 BRW_NEW_VS_ATTRIB_WORKAROUNDS);
327 }
328
329 static void
330 brw_vs_populate_key(struct brw_context *brw,
331 struct brw_vs_prog_key *key)
332 {
333 struct gl_context *ctx = &brw->ctx;
334 /* BRW_NEW_VERTEX_PROGRAM */
335 struct brw_vertex_program *vp =
336 (struct brw_vertex_program *)brw->vertex_program;
337 struct gl_program *prog = (struct gl_program *) brw->vertex_program;
338 int i;
339
340 memset(key, 0, sizeof(*key));
341
342 /* Just upload the program verbatim for now. Always send it all
343 * the inputs it asks for, whether they are varying or not.
344 */
345 key->program_string_id = vp->id;
346
347 if (ctx->Transform.ClipPlanesEnabled != 0 &&
348 ctx->API == API_OPENGL_COMPAT &&
349 !vp->program.Base.UsesClipDistanceOut) {
350 key->nr_userclip_plane_consts =
351 _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
352 }
353
354 /* _NEW_POLYGON */
355 if (brw->gen < 6) {
356 key->copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
357 ctx->Polygon.BackMode != GL_FILL);
358 }
359
360 if (prog->OutputsWritten & (VARYING_BIT_COL0 | VARYING_BIT_COL1 |
361 VARYING_BIT_BFC0 | VARYING_BIT_BFC1)) {
362 /* _NEW_LIGHT | _NEW_BUFFERS */
363 key->clamp_vertex_color = ctx->Light._ClampVertexColor;
364 }
365
366 /* _NEW_POINT */
367 if (brw->gen < 6 && ctx->Point.PointSprite) {
368 for (i = 0; i < 8; i++) {
369 if (ctx->Point.CoordReplace[i])
370 key->point_coord_replace |= (1 << i);
371 }
372 }
373
374 /* _NEW_TEXTURE */
375 brw_populate_sampler_prog_key_data(ctx, prog, brw->vs.base.sampler_count,
376 &key->tex);
377
378 /* BRW_NEW_VS_ATTRIB_WORKAROUNDS */
379 memcpy(key->gl_attrib_wa_flags, brw->vb.attrib_wa_flags,
380 sizeof(brw->vb.attrib_wa_flags));
381 }
382
383 void
384 brw_upload_vs_prog(struct brw_context *brw)
385 {
386 struct gl_context *ctx = &brw->ctx;
387 struct gl_shader_program **current = ctx->_Shader->CurrentProgram;
388 struct brw_vs_prog_key key;
389 /* BRW_NEW_VERTEX_PROGRAM */
390 struct brw_vertex_program *vp =
391 (struct brw_vertex_program *)brw->vertex_program;
392
393 if (!brw_vs_state_dirty(brw))
394 return;
395
396 brw_vs_populate_key(brw, &key);
397
398 if (!brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG,
399 &key, sizeof(key),
400 &brw->vs.base.prog_offset, &brw->vs.prog_data)) {
401 bool success = brw_codegen_vs_prog(brw, current[MESA_SHADER_VERTEX],
402 vp, &key);
403 (void) success;
404 assert(success);
405 }
406 brw->vs.base.prog_data = &brw->vs.prog_data->base.base;
407 }
408
409 bool
410 brw_vs_precompile(struct gl_context *ctx,
411 struct gl_shader_program *shader_prog,
412 struct gl_program *prog)
413 {
414 struct brw_context *brw = brw_context(ctx);
415 struct brw_vs_prog_key key;
416 uint32_t old_prog_offset = brw->vs.base.prog_offset;
417 struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
418 bool success;
419
420 struct gl_vertex_program *vp = (struct gl_vertex_program *) prog;
421 struct brw_vertex_program *bvp = brw_vertex_program(vp);
422
423 memset(&key, 0, sizeof(key));
424
425 brw_setup_tex_for_precompile(brw, &key.tex, prog);
426 key.program_string_id = bvp->id;
427 key.clamp_vertex_color =
428 (prog->OutputsWritten & (VARYING_BIT_COL0 | VARYING_BIT_COL1 |
429 VARYING_BIT_BFC0 | VARYING_BIT_BFC1));
430
431 success = brw_codegen_vs_prog(brw, shader_prog, bvp, &key);
432
433 brw->vs.base.prog_offset = old_prog_offset;
434 brw->vs.prog_data = old_prog_data;
435
436 return success;
437 }