src/mesa/drivers/dri/i965/brw_vs.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/compiler.h"
  34 #include "brw_context.h"
  35 #include "brw_vs.h"
  36 #include "brw_util.h"
  37 #include "brw_state.h"
  38 #include "program/prog_print.h"
  39 #include "program/prog_parameter.h"
  40
  41 #include "glsl/ralloc.h"
  42
  43 static inline void assign_vue_slot(struct brw_vue_map *vue_map,
  44                                    int varying)
  45 {
  46    /* Make sure this varying hasn't been assigned a slot already */
  47    assert (vue_map->varying_to_slot[varying] == -1);
  48
  49    vue_map->varying_to_slot[varying] = vue_map->num_slots;
  50    vue_map->slot_to_varying[vue_map->num_slots++] = varying;
  51 }
  52
  53 /**
  54  * Compute the VUE map for vertex shader program.
  55  *
  56  * Note that consumers of this map using cache keys must include
  57  * prog_data->userclip and prog_data->outputs_written in their key
  58  * (generated by CACHE_NEW_VS_PROG).
  59  */
  60 static void
  61 brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c,
  62                     GLbitfield64 slots_valid)
  63 {
  64    const struct intel_context *intel = &brw->intel;
  65    struct brw_vue_map *vue_map = &c->prog_data.vue_map;
  66    vue_map->slots_valid = slots_valid;
  67    int i;
  68
  69    /* Make sure that the values we store in vue_map->varying_to_slot and
  70     * vue_map->slot_to_varying won't overflow the signed chars that are used
  71     * to store them.  Note that since vue_map->slot_to_varying sometimes holds
  72     * values equal to BRW_VARYING_SLOT_COUNT, we need to ensure that
  73     * BRW_VARYING_SLOT_COUNT is <= 127, not 128.
  74     */
  75    STATIC_ASSERT(BRW_VARYING_SLOT_COUNT <= 127);
  76
  77    vue_map->num_slots = 0;
  78    for (i = 0; i < BRW_VARYING_SLOT_COUNT; ++i) {
  79       vue_map->varying_to_slot[i] = -1;
  80       vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_COUNT;
  81    }
  82
  83    /* VUE header: format depends on chip generation and whether clipping is
  84     * enabled.
  85     */
  86    switch (intel->gen) {
  87    case 4:
  88       /* There are 8 dwords in VUE header pre-Ironlake:
  89        * dword 0-3 is indices, point width, clip flags.
  90        * dword 4-7 is ndc position
  91        * dword 8-11 is the first vertex data.
  92        */
  93       assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
  94       assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
  95       assign_vue_slot(vue_map, VARYING_SLOT_POS);
  96       break;
  97    case 5:
  98       /* There are 20 DWs (D0-D19) in VUE header on Ironlake:
  99        * dword 0-3 of the header is indices, point width, clip flags.
 100        * dword 4-7 is the ndc position
 101        * dword 8-11 of the vertex header is the 4D space position
 102        * dword 12-19 of the vertex header is the user clip distance.
 103        * dword 20-23 is a pad so that the vertex element data is aligned
 104        * dword 24-27 is the first vertex data we fill.
 105        *
 106        * Note: future pipeline stages expect 4D space position to be
 107        * contiguous with the other varyings, so we make dword 24-27 a
 108        * duplicate copy of the 4D space position.
 109        */
 110       assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
 111       assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
 112       assign_vue_slot(vue_map, BRW_VARYING_SLOT_POS_DUPLICATE);
 113       assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
 114       assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
 115       assign_vue_slot(vue_map, BRW_VARYING_SLOT_PAD);
 116       assign_vue_slot(vue_map, VARYING_SLOT_POS);
 117       break;
 118    case 6:
 119    case 7:
 120       /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
 121        * dword 0-3 of the header is indices, point width, clip flags.
 122        * dword 4-7 is the 4D space position
 123        * dword 8-15 of the vertex header is the user clip distance if
 124        * enabled.
 125        * dword 8-11 or 16-19 is the first vertex element data we fill.
 126        */
 127       assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
 128       assign_vue_slot(vue_map, VARYING_SLOT_POS);
 129       if (c->key.userclip_active) {
 130          assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
 131          assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
 132       }
 133       /* front and back colors need to be consecutive so that we can use
 134        * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
 135        * two-sided color.
 136        */
 137       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0))
 138          assign_vue_slot(vue_map, VARYING_SLOT_COL0);
 139       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0))
 140          assign_vue_slot(vue_map, VARYING_SLOT_BFC0);
 141       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1))
 142          assign_vue_slot(vue_map, VARYING_SLOT_COL1);
 143       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1))
 144          assign_vue_slot(vue_map, VARYING_SLOT_BFC1);
 145       break;
 146    default:
 147       assert (!"VUE map not known for this chip generation");
 148       break;
 149    }
 150
 151    /* The hardware doesn't care about the rest of the vertex outputs, so just
 152     * assign them contiguously.  Don't reassign outputs that already have a
 153     * slot.
 154     *
 155     * Also, prior to Gen6, don't assign a slot for VARYING_SLOT_CLIP_VERTEX,
 156     * since it is unsupported.  In Gen6 and above, VARYING_SLOT_CLIP_VERTEX may
 157     * be needed for transform feedback; since we don't want to have to
 158     * recompute the VUE map (and everything that depends on it) when transform
 159     * feedback is enabled or disabled, just go ahead and assign a slot for it.
 160     */
 161    for (int i = 0; i < VARYING_SLOT_MAX; ++i) {
 162       if (intel->gen < 6 && i == VARYING_SLOT_CLIP_VERTEX)
 163          continue;
 164       if ((slots_valid & BITFIELD64_BIT(i)) &&
 165           vue_map->varying_to_slot[i] == -1) {
 166          assign_vue_slot(vue_map, i);
 167       }
 168    }
 169 }
 170
 171
 172 /**
 173  * Decide which set of clip planes should be used when clipping via
 174  * gl_Position or gl_ClipVertex.
 175  */
 176 gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
 177 {
 178    if (ctx->Shader.CurrentVertexProgram) {
 179       /* There is currently a GLSL vertex shader, so clip according to GLSL
 180        * rules, which means compare gl_ClipVertex (or gl_Position, if
 181        * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
 182        * that were stored in EyeUserPlane at the time the clip planes were
 183        * specified.
 184        */
 185       return ctx->Transform.EyeUserPlane;
 186    } else {
 187       /* Either we are using fixed function or an ARB vertex program.  In
 188        * either case the clip planes are going to be compared against
 189        * gl_Position (which is in clip coordinates) so we have to clip using
 190        * _ClipUserPlane, which was transformed into clip coordinates by Mesa
 191        * core.
 192        */
 193       return ctx->Transform._ClipUserPlane;
 194    }
 195 }
 196
 197 bool
 198 brw_vs_prog_data_compare(const void *in_a, const void *in_b,
 199                          int aux_size, const void *in_key)
 200 {
 201    const struct brw_vs_prog_data *a = in_a;
 202    const struct brw_vs_prog_data *b = in_b;
 203
 204    /* Compare all the struct up to the pointers. */
 205    if (memcmp(a, b, offsetof(struct brw_vs_prog_data, param)))
 206       return false;
 207
 208    if (memcmp(a->param, b->param, a->nr_params * sizeof(void *)))
 209       return false;
 210
 211    if (memcmp(a->pull_param, b->pull_param, a->nr_pull_params * sizeof(void *)))
 212       return false;
 213
 214    return true;
 215 }
 216
 217 static bool
 218 do_vs_prog(struct brw_context *brw,
 219            struct gl_shader_program *prog,
 220            struct brw_vertex_program *vp,
 221            struct brw_vs_prog_key *key)
 222 {
 223    struct intel_context *intel = &brw->intel;
 224    GLuint program_size;
 225    const GLuint *program;
 226    struct brw_vs_compile c;
 227    void *mem_ctx;
 228    int i;
 229    struct gl_shader *vs = NULL;
 230
 231    if (prog)
 232       vs = prog->_LinkedShaders[MESA_SHADER_VERTEX];
 233
 234    memset(&c, 0, sizeof(c));
 235    memcpy(&c.key, key, sizeof(*key));
 236
 237    mem_ctx = ralloc_context(NULL);
 238
 239    c.vp = vp;
 240
 241    /* Allocate the references to the uniforms that will end up in the
 242     * prog_data associated with the compiled program, and which will be freed
 243     * by the state cache.
 244     */
 245    int param_count;
 246    if (vs) {
 247       /* We add padding around uniform values below vec4 size, with the worst
 248        * case being a float value that gets blown up to a vec4, so be
 249        * conservative here.
 250        */
 251       param_count = vs->num_uniform_components * 4;
 252
 253    } else {
 254       param_count = vp->program.Base.Parameters->NumParameters * 4;
 255    }
 256    /* We also upload clip plane data as uniforms */
 257    param_count += MAX_CLIP_PLANES * 4;
 258
 259    c.prog_data.param = rzalloc_array(NULL, const float *, param_count);
 260    c.prog_data.pull_param = rzalloc_array(NULL, const float *, param_count);
 261
 262    GLbitfield64 outputs_written = vp->program.Base.OutputsWritten;
 263    c.prog_data.inputs_read = vp->program.Base.InputsRead;
 264
 265    if (c.key.copy_edgeflag) {
 266       outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
 267       c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
 268    }
 269
 270    if (intel->gen < 6) {
 271       /* Put dummy slots into the VUE for the SF to put the replaced
 272        * point sprite coords in.  We shouldn't need these dummy slots,
 273        * which take up precious URB space, but it would mean that the SF
 274        * doesn't get nice aligned pairs of input coords into output
 275        * coords, which would be a pain to handle.
 276        */
 277       for (i = 0; i < 8; i++) {
 278          if (c.key.point_coord_replace & (1 << i))
 279             outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
 280       }
 281    }
 282
 283    brw_compute_vue_map(brw, &c, outputs_written);
 284
 285    if (0) {
 286       _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG,
 287                                true);
 288    }
 289
 290    /* Emit GEN4 code.
 291     */
 292    program = brw_vs_emit(brw, prog, &c, mem_ctx, &program_size);
 293    if (program == NULL) {
 294       ralloc_free(mem_ctx);
 295       return false;
 296    }
 297
 298    if (c.prog_data.nr_pull_params)
 299       c.prog_data.num_surfaces = 1;
 300    if (c.vp->program.Base.SamplersUsed)
 301       c.prog_data.num_surfaces = SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT);
 302    if (prog &&
 303        prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks) {
 304       c.prog_data.num_surfaces =
 305          SURF_INDEX_VS_UBO(prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks);
 306    }
 307
 308    /* Scratch space is used for register spilling */
 309    if (c.last_scratch) {
 310       perf_debug("Vertex shader triggered register spilling.  "
 311                  "Try reducing the number of live vec4 values to "
 312                  "improve performance.\n");
 313
 314       c.prog_data.total_scratch = brw_get_scratch_size(c.last_scratch*REG_SIZE);
 315
 316       brw_get_scratch_bo(intel, &brw->vs.scratch_bo,
 317                          c.prog_data.total_scratch * brw->max_vs_threads);
 318    }
 319
 320    brw_upload_cache(&brw->cache, BRW_VS_PROG,
 321                     &c.key, sizeof(c.key),
 322                     program, program_size,
 323                     &c.prog_data, sizeof(c.prog_data),
 324                     &brw->vs.prog_offset, &brw->vs.prog_data);
 325    ralloc_free(mem_ctx);
 326
 327    return true;
 328 }
 329
 330 static bool
 331 key_debug(struct intel_context *intel, const char *name, int a, int b)
 332 {
 333    if (a != b) {
 334       perf_debug("  %s %d->%d\n", name, a, b);
 335       return true;
 336    }
 337    return false;
 338 }
 339
 340 void
 341 brw_vs_debug_recompile(struct brw_context *brw,
 342                        struct gl_shader_program *prog,
 343                        const struct brw_vs_prog_key *key)
 344 {
 345    struct intel_context *intel = &brw->intel;
 346    struct brw_cache_item *c = NULL;
 347    const struct brw_vs_prog_key *old_key = NULL;
 348    bool found = false;
 349
 350    perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
 351
 352    for (unsigned int i = 0; i < brw->cache.size; i++) {
 353       for (c = brw->cache.items[i]; c; c = c->next) {
 354          if (c->cache_id == BRW_VS_PROG) {
 355             old_key = c->key;
 356
 357             if (old_key->program_string_id == key->program_string_id)
 358                break;
 359          }
 360       }
 361       if (c)
 362          break;
 363    }
 364
 365    if (!c) {
 366       perf_debug("  Didn't find previous compile in the shader cache for "
 367                  "debug\n");
 368       return;
 369    }
 370
 371    for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
 372       found |= key_debug(intel, "Vertex attrib w/a flags",
 373                          old_key->gl_attrib_wa_flags[i],
 374                          key->gl_attrib_wa_flags[i]);
 375    }
 376
 377    found |= key_debug(intel, "user clip flags",
 378                       old_key->userclip_active, key->userclip_active);
 379
 380    found |= key_debug(intel, "user clipping planes as push constants",
 381                       old_key->nr_userclip_plane_consts,
 382                       key->nr_userclip_plane_consts);
 383
 384    found |= key_debug(intel, "clip distance enable",
 385                       old_key->uses_clip_distance, key->uses_clip_distance);
 386    found |= key_debug(intel, "clip plane enable bitfield",
 387                       old_key->userclip_planes_enabled_gen_4_5,
 388                       key->userclip_planes_enabled_gen_4_5);
 389    found |= key_debug(intel, "copy edgeflag",
 390                       old_key->copy_edgeflag, key->copy_edgeflag);
 391    found |= key_debug(intel, "PointCoord replace",
 392                       old_key->point_coord_replace, key->point_coord_replace);
 393    found |= key_debug(intel, "vertex color clamping",
 394                       old_key->clamp_vertex_color, key->clamp_vertex_color);
 395
 396    found |= brw_debug_recompile_sampler_key(intel, &old_key->tex, &key->tex);
 397
 398    if (!found) {
 399       perf_debug("  Something else\n");
 400    }
 401 }
 402
 403 static void brw_upload_vs_prog(struct brw_context *brw)
 404 {
 405    struct intel_context *intel = &brw->intel;
 406    struct gl_context *ctx = &intel->ctx;
 407    struct brw_vs_prog_key key;
 408    /* BRW_NEW_VERTEX_PROGRAM */
 409    struct brw_vertex_program *vp =
 410       (struct brw_vertex_program *)brw->vertex_program;
 411    struct gl_program *prog = (struct gl_program *) brw->vertex_program;
 412    int i;
 413
 414    memset(&key, 0, sizeof(key));
 415
 416    /* Just upload the program verbatim for now.  Always send it all
 417     * the inputs it asks for, whether they are varying or not.
 418     */
 419    key.program_string_id = vp->id;
 420    key.userclip_active = (ctx->Transform.ClipPlanesEnabled != 0);
 421    key.uses_clip_distance = vp->program.UsesClipDistance;
 422    if (key.userclip_active && !key.uses_clip_distance) {
 423       if (intel->gen < 6) {
 424          key.nr_userclip_plane_consts
 425             = _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled);
 426          key.userclip_planes_enabled_gen_4_5
 427             = ctx->Transform.ClipPlanesEnabled;
 428       } else {
 429          key.nr_userclip_plane_consts
 430             = _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
 431       }
 432    }
 433
 434    /* _NEW_POLYGON */
 435    if (intel->gen < 6) {
 436       key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
 437                            ctx->Polygon.BackMode != GL_FILL);
 438    }
 439
 440    /* _NEW_LIGHT | _NEW_BUFFERS */
 441    key.clamp_vertex_color = ctx->Light._ClampVertexColor;
 442
 443    /* _NEW_POINT */
 444    if (intel->gen < 6 && ctx->Point.PointSprite) {
 445       for (i = 0; i < 8; i++) {
 446          if (ctx->Point.CoordReplace[i])
 447             key.point_coord_replace |= (1 << i);
 448       }
 449    }
 450
 451    /* _NEW_TEXTURE */
 452    brw_populate_sampler_prog_key_data(ctx, prog, &key.tex);
 453
 454    /* BRW_NEW_VERTICES */
 455    if (intel->gen < 8 && !intel->is_haswell) {
 456       /* Prior to Haswell, the hardware can't natively support GL_FIXED or
 457        * 2_10_10_10_REV vertex formats.  Set appropriate workaround flags.
 458        */
 459       for (i = 0; i < VERT_ATTRIB_MAX; i++) {
 460          if (!(vp->program.Base.InputsRead & BITFIELD64_BIT(i)))
 461             continue;
 462
 463          uint8_t wa_flags = 0;
 464
 465          switch (brw->vb.inputs[i].glarray->Type) {
 466
 467          case GL_FIXED:
 468             wa_flags = brw->vb.inputs[i].glarray->Size;
 469             break;
 470
 471          case GL_INT_2_10_10_10_REV:
 472             wa_flags |= BRW_ATTRIB_WA_SIGN;
 473             /* fallthough */
 474
 475          case GL_UNSIGNED_INT_2_10_10_10_REV:
 476             if (brw->vb.inputs[i].glarray->Format == GL_BGRA)
 477                wa_flags |= BRW_ATTRIB_WA_BGRA;
 478
 479             if (brw->vb.inputs[i].glarray->Normalized)
 480                wa_flags |= BRW_ATTRIB_WA_NORMALIZE;
 481             else if (!brw->vb.inputs[i].glarray->Integer)
 482                wa_flags |= BRW_ATTRIB_WA_SCALE;
 483
 484             break;
 485          }
 486
 487          key.gl_attrib_wa_flags[i] = wa_flags;
 488       }
 489    }
 490
 491    if (!brw_search_cache(&brw->cache, BRW_VS_PROG,
 492                          &key, sizeof(key),
 493                          &brw->vs.prog_offset, &brw->vs.prog_data)) {
 494       bool success = do_vs_prog(brw, ctx->Shader.CurrentVertexProgram,
 495                                 vp, &key);
 496
 497       assert(success);
 498    }
 499    if (memcmp(&brw->vs.prog_data->vue_map, &brw->vue_map_geom_out,
 500               sizeof(brw->vue_map_geom_out)) != 0) {
 501       brw->vue_map_geom_out = brw->vs.prog_data->vue_map;
 502       brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT;
 503    }
 504 }
 505
 506 /* See brw_vs.c:
 507  */
 508 const struct brw_tracked_state brw_vs_prog = {
 509    .dirty = {
 510       .mesa  = (_NEW_TRANSFORM | _NEW_POLYGON | _NEW_POINT | _NEW_LIGHT |
 511                 _NEW_TEXTURE |
 512                 _NEW_BUFFERS),
 513       .brw   = (BRW_NEW_VERTEX_PROGRAM |
 514                 BRW_NEW_VERTICES),
 515       .cache = 0
 516    },
 517    .emit = brw_upload_vs_prog
 518 };
 519
 520 bool
 521 brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
 522 {
 523    struct brw_context *brw = brw_context(ctx);
 524    struct brw_vs_prog_key key;
 525    uint32_t old_prog_offset = brw->vs.prog_offset;
 526    struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
 527    bool success;
 528
 529    if (!prog->_LinkedShaders[MESA_SHADER_VERTEX])
 530       return true;
 531
 532    struct gl_vertex_program *vp = (struct gl_vertex_program *)
 533       prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program;
 534    struct brw_vertex_program *bvp = brw_vertex_program(vp);
 535
 536    memset(&key, 0, sizeof(key));
 537
 538    key.program_string_id = bvp->id;
 539    key.clamp_vertex_color = true;
 540
 541    for (int i = 0; i < MAX_SAMPLERS; i++) {
 542       if (vp->Base.ShadowSamplers & (1 << i)) {
 543          /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
 544          key.tex.swizzles[i] =
 545             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE);
 546       } else {
 547          /* Color sampler: assume no swizzling. */
 548          key.tex.swizzles[i] = SWIZZLE_XYZW;
 549       }
 550    }
 551
 552    success = do_vs_prog(brw, prog, bvp, &key);
 553
 554    brw->vs.prog_offset = old_prog_offset;
 555    brw->vs.prog_data = old_prog_data;
 556
 557    return success;
 558 }
 559
 560 void
 561 brw_vs_prog_data_free(const void *in_prog_data)
 562 {
 563    const struct brw_vs_prog_data *prog_data = in_prog_data;
 564
 565    ralloc_free((void *)prog_data->param);
 566    ralloc_free((void *)prog_data->pull_param);
 567 }