i965: Don't force SSO layout for VS->TCS.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vs.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32
33 #include "main/compiler.h"
34 #include "main/context.h"
35 #include "brw_context.h"
36 #include "brw_vs.h"
37 #include "brw_util.h"
38 #include "brw_state.h"
39 #include "program/prog_print.h"
40 #include "program/prog_parameter.h"
41 #include "brw_nir.h"
42 #include "brw_program.h"
43
44 #include "util/ralloc.h"
45
46 GLbitfield64
47 brw_vs_outputs_written(struct brw_context *brw, struct brw_vs_prog_key *key,
48 GLbitfield64 user_varyings)
49 {
50 GLbitfield64 outputs_written = user_varyings;
51
52 if (key->copy_edgeflag) {
53 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
54 }
55
56 if (brw->gen < 6) {
57 /* Put dummy slots into the VUE for the SF to put the replaced
58 * point sprite coords in. We shouldn't need these dummy slots,
59 * which take up precious URB space, but it would mean that the SF
60 * doesn't get nice aligned pairs of input coords into output
61 * coords, which would be a pain to handle.
62 */
63 for (unsigned i = 0; i < 8; i++) {
64 if (key->point_coord_replace & (1 << i))
65 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
66 }
67
68 /* if back colors are written, allocate slots for front colors too */
69 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0))
70 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0);
71 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1))
72 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1);
73 }
74
75 /* In order for legacy clipping to work, we need to populate the clip
76 * distance varying slots whenever clipping is enabled, even if the vertex
77 * shader doesn't write to gl_ClipDistance.
78 */
79 if (key->nr_userclip_plane_consts > 0) {
80 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0);
81 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1);
82 }
83
84 return outputs_written;
85 }
86
87 bool
88 brw_codegen_vs_prog(struct brw_context *brw,
89 struct gl_shader_program *prog,
90 struct brw_program *vp,
91 struct brw_vs_prog_key *key)
92 {
93 const struct brw_compiler *compiler = brw->screen->compiler;
94 const struct gen_device_info *devinfo = &brw->screen->devinfo;
95 GLuint program_size;
96 const GLuint *program;
97 struct brw_vs_prog_data prog_data;
98 struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base;
99 void *mem_ctx;
100 struct brw_shader *vs = NULL;
101 bool start_busy = false;
102 double start_time = 0;
103
104 if (prog)
105 vs = (struct brw_shader *) prog->_LinkedShaders[MESA_SHADER_VERTEX];
106
107 memset(&prog_data, 0, sizeof(prog_data));
108
109 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
110 if (!prog)
111 stage_prog_data->use_alt_mode = true;
112
113 mem_ctx = ralloc_context(NULL);
114
115 brw_assign_common_binding_table_offsets(MESA_SHADER_VERTEX, devinfo, prog,
116 &vp->program, &prog_data.base.base,
117 0);
118
119 /* Allocate the references to the uniforms that will end up in the
120 * prog_data associated with the compiled program, and which will be freed
121 * by the state cache.
122 */
123 int param_count = vp->program.nir->num_uniforms / 4;
124
125 prog_data.base.base.nr_image_params = vp->program.info.num_images;
126
127 /* vec4_visitor::setup_uniform_clipplane_values() also uploads user clip
128 * planes as uniforms.
129 */
130 param_count += key->nr_userclip_plane_consts * 4;
131
132 stage_prog_data->param =
133 rzalloc_array(NULL, const gl_constant_value *, param_count);
134 stage_prog_data->pull_param =
135 rzalloc_array(NULL, const gl_constant_value *, param_count);
136 stage_prog_data->image_param =
137 rzalloc_array(NULL, struct brw_image_param,
138 stage_prog_data->nr_image_params);
139 stage_prog_data->nr_params = param_count;
140
141 if (prog) {
142 brw_nir_setup_glsl_uniforms(vp->program.nir, prog, &vp->program,
143 &prog_data.base.base,
144 compiler->scalar_stage[MESA_SHADER_VERTEX]);
145 } else {
146 brw_nir_setup_arb_uniforms(vp->program.nir, &vp->program,
147 &prog_data.base.base);
148 }
149
150 uint64_t outputs_written =
151 brw_vs_outputs_written(brw, key, vp->program.info.outputs_written);
152 prog_data.inputs_read = vp->program.info.inputs_read;
153 prog_data.double_inputs_read = vp->program.info.double_inputs_read;
154
155 if (key->copy_edgeflag) {
156 prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
157 }
158
159 brw_compute_vue_map(devinfo,
160 &prog_data.base.vue_map, outputs_written,
161 vp->program.nir->info->separate_shader);
162
163 if (0) {
164 _mesa_fprint_program_opt(stderr, &vp->program, PROG_PRINT_DEBUG, true);
165 }
166
167 if (unlikely(brw->perf_debug)) {
168 start_busy = (brw->batch.last_bo &&
169 drm_intel_bo_busy(brw->batch.last_bo));
170 start_time = get_time();
171 }
172
173 if (unlikely(INTEL_DEBUG & DEBUG_VS)) {
174 if (!prog)
175 brw_dump_arb_asm("vertex", &vp->program);
176
177 fprintf(stderr, "VS Output ");
178 brw_print_vue_map(stderr, &prog_data.base.vue_map);
179 }
180
181 int st_index = -1;
182 if (INTEL_DEBUG & DEBUG_SHADER_TIME)
183 st_index = brw_get_shader_time_index(brw, prog, &vp->program, ST_VS);
184
185 /* Emit GEN4 code.
186 */
187 char *error_str;
188 program = brw_compile_vs(compiler, brw, mem_ctx, key, &prog_data,
189 vp->program.nir,
190 brw_select_clip_planes(&brw->ctx),
191 !_mesa_is_gles3(&brw->ctx),
192 st_index, &program_size, &error_str);
193 if (program == NULL) {
194 if (prog) {
195 prog->data->LinkStatus = false;
196 ralloc_strcat(&prog->data->InfoLog, error_str);
197 }
198
199 _mesa_problem(NULL, "Failed to compile vertex shader: %s\n", error_str);
200
201 ralloc_free(mem_ctx);
202 return false;
203 }
204
205 if (unlikely(brw->perf_debug) && vs) {
206 if (vs->compiled_once) {
207 brw_vs_debug_recompile(brw, prog, key);
208 }
209 if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
210 perf_debug("VS compile took %.03f ms and stalled the GPU\n",
211 (get_time() - start_time) * 1000);
212 }
213 vs->compiled_once = true;
214 }
215
216 /* Scratch space is used for register spilling */
217 brw_alloc_stage_scratch(brw, &brw->vs.base,
218 prog_data.base.base.total_scratch,
219 devinfo->max_vs_threads);
220
221 brw_upload_cache(&brw->cache, BRW_CACHE_VS_PROG,
222 key, sizeof(struct brw_vs_prog_key),
223 program, program_size,
224 &prog_data, sizeof(prog_data),
225 &brw->vs.base.prog_offset, &brw->vs.base.prog_data);
226 ralloc_free(mem_ctx);
227
228 return true;
229 }
230
231 void
232 brw_vs_debug_recompile(struct brw_context *brw,
233 struct gl_shader_program *prog,
234 const struct brw_vs_prog_key *key)
235 {
236 struct brw_cache_item *c = NULL;
237 const struct brw_vs_prog_key *old_key = NULL;
238 bool found = false;
239
240 perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
241
242 for (unsigned int i = 0; i < brw->cache.size; i++) {
243 for (c = brw->cache.items[i]; c; c = c->next) {
244 if (c->cache_id == BRW_CACHE_VS_PROG) {
245 old_key = c->key;
246
247 if (old_key->program_string_id == key->program_string_id)
248 break;
249 }
250 }
251 if (c)
252 break;
253 }
254
255 if (!c) {
256 perf_debug(" Didn't find previous compile in the shader cache for "
257 "debug\n");
258 return;
259 }
260
261 for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
262 found |= key_debug(brw, "Vertex attrib w/a flags",
263 old_key->gl_attrib_wa_flags[i],
264 key->gl_attrib_wa_flags[i]);
265 }
266
267 found |= key_debug(brw, "legacy user clipping",
268 old_key->nr_userclip_plane_consts,
269 key->nr_userclip_plane_consts);
270
271 found |= key_debug(brw, "copy edgeflag",
272 old_key->copy_edgeflag, key->copy_edgeflag);
273 found |= key_debug(brw, "PointCoord replace",
274 old_key->point_coord_replace, key->point_coord_replace);
275 found |= key_debug(brw, "vertex color clamping",
276 old_key->clamp_vertex_color, key->clamp_vertex_color);
277
278 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
279
280 if (!found) {
281 perf_debug(" Something else\n");
282 }
283 }
284
285 static bool
286 brw_vs_state_dirty(const struct brw_context *brw)
287 {
288 return brw_state_dirty(brw,
289 _NEW_BUFFERS |
290 _NEW_LIGHT |
291 _NEW_POINT |
292 _NEW_POLYGON |
293 _NEW_TEXTURE |
294 _NEW_TRANSFORM,
295 BRW_NEW_VERTEX_PROGRAM |
296 BRW_NEW_VS_ATTRIB_WORKAROUNDS);
297 }
298
299 void
300 brw_vs_populate_key(struct brw_context *brw,
301 struct brw_vs_prog_key *key)
302 {
303 struct gl_context *ctx = &brw->ctx;
304 /* BRW_NEW_VERTEX_PROGRAM */
305 struct brw_program *vp = (struct brw_program *)brw->vertex_program;
306 struct gl_program *prog = (struct gl_program *) brw->vertex_program;
307
308 memset(key, 0, sizeof(*key));
309
310 /* Just upload the program verbatim for now. Always send it all
311 * the inputs it asks for, whether they are varying or not.
312 */
313 key->program_string_id = vp->id;
314
315 if (ctx->Transform.ClipPlanesEnabled != 0 &&
316 (ctx->API == API_OPENGL_COMPAT || ctx->API == API_OPENGLES) &&
317 vp->program.ClipDistanceArraySize == 0) {
318 key->nr_userclip_plane_consts =
319 _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
320 }
321
322 if (brw->gen < 6) {
323 /* _NEW_POLYGON */
324 key->copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
325 ctx->Polygon.BackMode != GL_FILL);
326
327 /* _NEW_POINT */
328 if (ctx->Point.PointSprite) {
329 key->point_coord_replace = ctx->Point.CoordReplace & 0xff;
330 }
331 }
332
333 if (prog->nir->info->outputs_written &
334 (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 |
335 VARYING_BIT_BFC1)) {
336 /* _NEW_LIGHT | _NEW_BUFFERS */
337 key->clamp_vertex_color = ctx->Light._ClampVertexColor;
338 }
339
340 /* _NEW_TEXTURE */
341 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
342
343 /* BRW_NEW_VS_ATTRIB_WORKAROUNDS */
344 if (brw->gen < 8 && !brw->is_haswell) {
345 memcpy(key->gl_attrib_wa_flags, brw->vb.attrib_wa_flags,
346 sizeof(brw->vb.attrib_wa_flags));
347 }
348 }
349
350 void
351 brw_upload_vs_prog(struct brw_context *brw)
352 {
353 struct gl_context *ctx = &brw->ctx;
354 struct gl_shader_program **current = ctx->_Shader->CurrentProgram;
355 struct brw_vs_prog_key key;
356 /* BRW_NEW_VERTEX_PROGRAM */
357 struct brw_program *vp = (struct brw_program *)brw->vertex_program;
358
359 if (!brw_vs_state_dirty(brw))
360 return;
361
362 brw_vs_populate_key(brw, &key);
363
364 if (!brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG,
365 &key, sizeof(key),
366 &brw->vs.base.prog_offset, &brw->vs.base.prog_data)) {
367 bool success = brw_codegen_vs_prog(brw, current[MESA_SHADER_VERTEX],
368 vp, &key);
369 (void) success;
370 assert(success);
371 }
372 }
373
374 bool
375 brw_vs_precompile(struct gl_context *ctx,
376 struct gl_shader_program *shader_prog,
377 struct gl_program *prog)
378 {
379 struct brw_context *brw = brw_context(ctx);
380 struct brw_vs_prog_key key;
381 uint32_t old_prog_offset = brw->vs.base.prog_offset;
382 struct brw_stage_prog_data *old_prog_data = brw->vs.base.prog_data;
383 bool success;
384
385 struct brw_program *bvp = brw_program(prog);
386
387 memset(&key, 0, sizeof(key));
388
389 brw_setup_tex_for_precompile(brw, &key.tex, prog);
390 key.program_string_id = bvp->id;
391 key.clamp_vertex_color =
392 (prog->nir->info->outputs_written &
393 (VARYING_BIT_COL0 | VARYING_BIT_COL1 | VARYING_BIT_BFC0 |
394 VARYING_BIT_BFC1));
395
396 success = brw_codegen_vs_prog(brw, shader_prog, bvp, &key);
397
398 brw->vs.base.prog_offset = old_prog_offset;
399 brw->vs.base.prog_data = old_prog_data;
400
401 return success;
402 }