i965: Fix an inconsistency inb the VUE map with gl_ClipVertex on gen4/5.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vs.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "main/compiler.h"
34 #include "brw_context.h"
35 #include "brw_vs.h"
36 #include "brw_util.h"
37 #include "brw_state.h"
38 #include "program/prog_print.h"
39 #include "program/prog_parameter.h"
40
41 #include "glsl/ralloc.h"
42
43 static inline void assign_vue_slot(struct brw_vue_map *vue_map,
44 int varying)
45 {
46 /* Make sure this varying hasn't been assigned a slot already */
47 assert (vue_map->varying_to_slot[varying] == -1);
48
49 vue_map->varying_to_slot[varying] = vue_map->num_slots;
50 vue_map->slot_to_varying[vue_map->num_slots++] = varying;
51 }
52
53 /**
54 * Compute the VUE map for vertex shader program.
55 *
56 * Note that consumers of this map using cache keys must include
57 * prog_data->userclip and prog_data->outputs_written in their key
58 * (generated by CACHE_NEW_VS_PROG).
59 */
60 static void
61 brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c,
62 GLbitfield64 slots_valid)
63 {
64 const struct intel_context *intel = &brw->intel;
65 struct brw_vue_map *vue_map = &c->prog_data.vue_map;
66
67 /* Prior to Gen6, don't assign a slot for VARYING_SLOT_CLIP_VERTEX, since
68 * it is unsupported.
69 */
70 if (intel->gen < 6)
71 slots_valid &= ~VARYING_BIT_CLIP_VERTEX;
72
73 vue_map->slots_valid = slots_valid;
74 int i;
75
76 /* Make sure that the values we store in vue_map->varying_to_slot and
77 * vue_map->slot_to_varying won't overflow the signed chars that are used
78 * to store them. Note that since vue_map->slot_to_varying sometimes holds
79 * values equal to BRW_VARYING_SLOT_COUNT, we need to ensure that
80 * BRW_VARYING_SLOT_COUNT is <= 127, not 128.
81 */
82 STATIC_ASSERT(BRW_VARYING_SLOT_COUNT <= 127);
83
84 vue_map->num_slots = 0;
85 for (i = 0; i < BRW_VARYING_SLOT_COUNT; ++i) {
86 vue_map->varying_to_slot[i] = -1;
87 vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_COUNT;
88 }
89
90 /* VUE header: format depends on chip generation and whether clipping is
91 * enabled.
92 */
93 switch (intel->gen) {
94 case 4:
95 /* There are 8 dwords in VUE header pre-Ironlake:
96 * dword 0-3 is indices, point width, clip flags.
97 * dword 4-7 is ndc position
98 * dword 8-11 is the first vertex data.
99 */
100 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
101 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
102 assign_vue_slot(vue_map, VARYING_SLOT_POS);
103 break;
104 case 5:
105 /* There are 20 DWs (D0-D19) in VUE header on Ironlake:
106 * dword 0-3 of the header is indices, point width, clip flags.
107 * dword 4-7 is the ndc position
108 * dword 8-11 of the vertex header is the 4D space position
109 * dword 12-19 of the vertex header is the user clip distance.
110 * dword 20-23 is a pad so that the vertex element data is aligned
111 * dword 24-27 is the first vertex data we fill.
112 *
113 * Note: future pipeline stages expect 4D space position to be
114 * contiguous with the other varyings, so we make dword 24-27 a
115 * duplicate copy of the 4D space position.
116 */
117 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
118 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
119 assign_vue_slot(vue_map, BRW_VARYING_SLOT_POS_DUPLICATE);
120 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
121 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
122 assign_vue_slot(vue_map, BRW_VARYING_SLOT_PAD);
123 assign_vue_slot(vue_map, VARYING_SLOT_POS);
124 break;
125 case 6:
126 case 7:
127 /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
128 * dword 0-3 of the header is indices, point width, clip flags.
129 * dword 4-7 is the 4D space position
130 * dword 8-15 of the vertex header is the user clip distance if
131 * enabled.
132 * dword 8-11 or 16-19 is the first vertex element data we fill.
133 */
134 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
135 assign_vue_slot(vue_map, VARYING_SLOT_POS);
136 if (c->key.userclip_active) {
137 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
138 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
139 }
140 /* front and back colors need to be consecutive so that we can use
141 * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
142 * two-sided color.
143 */
144 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0))
145 assign_vue_slot(vue_map, VARYING_SLOT_COL0);
146 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0))
147 assign_vue_slot(vue_map, VARYING_SLOT_BFC0);
148 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1))
149 assign_vue_slot(vue_map, VARYING_SLOT_COL1);
150 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1))
151 assign_vue_slot(vue_map, VARYING_SLOT_BFC1);
152 break;
153 default:
154 assert (!"VUE map not known for this chip generation");
155 break;
156 }
157
158 /* The hardware doesn't care about the rest of the vertex outputs, so just
159 * assign them contiguously. Don't reassign outputs that already have a
160 * slot.
161 *
162 * We generally don't need to assign a slot for VARYING_SLOT_CLIP_VERTEX,
163 * since it's encoded as the clip distances by emit_clip_distances().
164 * However, it may be output by transform feedback, and we'd rather not
165 * recompute state when TF changes, so we just always include it.
166 */
167 for (int i = 0; i < VARYING_SLOT_MAX; ++i) {
168 if ((slots_valid & BITFIELD64_BIT(i)) &&
169 vue_map->varying_to_slot[i] == -1) {
170 assign_vue_slot(vue_map, i);
171 }
172 }
173 }
174
175
176 /**
177 * Decide which set of clip planes should be used when clipping via
178 * gl_Position or gl_ClipVertex.
179 */
180 gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
181 {
182 if (ctx->Shader.CurrentVertexProgram) {
183 /* There is currently a GLSL vertex shader, so clip according to GLSL
184 * rules, which means compare gl_ClipVertex (or gl_Position, if
185 * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
186 * that were stored in EyeUserPlane at the time the clip planes were
187 * specified.
188 */
189 return ctx->Transform.EyeUserPlane;
190 } else {
191 /* Either we are using fixed function or an ARB vertex program. In
192 * either case the clip planes are going to be compared against
193 * gl_Position (which is in clip coordinates) so we have to clip using
194 * _ClipUserPlane, which was transformed into clip coordinates by Mesa
195 * core.
196 */
197 return ctx->Transform._ClipUserPlane;
198 }
199 }
200
201 bool
202 brw_vs_prog_data_compare(const void *in_a, const void *in_b,
203 int aux_size, const void *in_key)
204 {
205 const struct brw_vs_prog_data *a = in_a;
206 const struct brw_vs_prog_data *b = in_b;
207
208 /* Compare all the struct up to the pointers. */
209 if (memcmp(a, b, offsetof(struct brw_vs_prog_data, param)))
210 return false;
211
212 if (memcmp(a->param, b->param, a->nr_params * sizeof(void *)))
213 return false;
214
215 if (memcmp(a->pull_param, b->pull_param, a->nr_pull_params * sizeof(void *)))
216 return false;
217
218 return true;
219 }
220
221 static bool
222 do_vs_prog(struct brw_context *brw,
223 struct gl_shader_program *prog,
224 struct brw_vertex_program *vp,
225 struct brw_vs_prog_key *key)
226 {
227 struct intel_context *intel = &brw->intel;
228 GLuint program_size;
229 const GLuint *program;
230 struct brw_vs_compile c;
231 void *mem_ctx;
232 int i;
233 struct gl_shader *vs = NULL;
234
235 if (prog)
236 vs = prog->_LinkedShaders[MESA_SHADER_VERTEX];
237
238 memset(&c, 0, sizeof(c));
239 memcpy(&c.key, key, sizeof(*key));
240
241 mem_ctx = ralloc_context(NULL);
242
243 c.vp = vp;
244
245 /* Allocate the references to the uniforms that will end up in the
246 * prog_data associated with the compiled program, and which will be freed
247 * by the state cache.
248 */
249 int param_count;
250 if (vs) {
251 /* We add padding around uniform values below vec4 size, with the worst
252 * case being a float value that gets blown up to a vec4, so be
253 * conservative here.
254 */
255 param_count = vs->num_uniform_components * 4;
256
257 } else {
258 param_count = vp->program.Base.Parameters->NumParameters * 4;
259 }
260 /* We also upload clip plane data as uniforms */
261 param_count += MAX_CLIP_PLANES * 4;
262
263 c.prog_data.param = rzalloc_array(NULL, const float *, param_count);
264 c.prog_data.pull_param = rzalloc_array(NULL, const float *, param_count);
265
266 GLbitfield64 outputs_written = vp->program.Base.OutputsWritten;
267 c.prog_data.inputs_read = vp->program.Base.InputsRead;
268
269 if (c.key.copy_edgeflag) {
270 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
271 c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
272 }
273
274 if (intel->gen < 6) {
275 /* Put dummy slots into the VUE for the SF to put the replaced
276 * point sprite coords in. We shouldn't need these dummy slots,
277 * which take up precious URB space, but it would mean that the SF
278 * doesn't get nice aligned pairs of input coords into output
279 * coords, which would be a pain to handle.
280 */
281 for (i = 0; i < 8; i++) {
282 if (c.key.point_coord_replace & (1 << i))
283 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
284 }
285 }
286
287 brw_compute_vue_map(brw, &c, outputs_written);
288
289 if (0) {
290 _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG,
291 true);
292 }
293
294 /* Emit GEN4 code.
295 */
296 program = brw_vs_emit(brw, prog, &c, mem_ctx, &program_size);
297 if (program == NULL) {
298 ralloc_free(mem_ctx);
299 return false;
300 }
301
302 if (c.prog_data.nr_pull_params)
303 c.prog_data.num_surfaces = 1;
304 if (c.vp->program.Base.SamplersUsed)
305 c.prog_data.num_surfaces = SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT);
306 if (prog &&
307 prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks) {
308 c.prog_data.num_surfaces =
309 SURF_INDEX_VS_UBO(prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks);
310 }
311
312 /* Scratch space is used for register spilling */
313 if (c.last_scratch) {
314 perf_debug("Vertex shader triggered register spilling. "
315 "Try reducing the number of live vec4 values to "
316 "improve performance.\n");
317
318 c.prog_data.total_scratch = brw_get_scratch_size(c.last_scratch*REG_SIZE);
319
320 brw_get_scratch_bo(intel, &brw->vs.scratch_bo,
321 c.prog_data.total_scratch * brw->max_vs_threads);
322 }
323
324 brw_upload_cache(&brw->cache, BRW_VS_PROG,
325 &c.key, sizeof(c.key),
326 program, program_size,
327 &c.prog_data, sizeof(c.prog_data),
328 &brw->vs.prog_offset, &brw->vs.prog_data);
329 ralloc_free(mem_ctx);
330
331 return true;
332 }
333
334 static bool
335 key_debug(struct intel_context *intel, const char *name, int a, int b)
336 {
337 if (a != b) {
338 perf_debug(" %s %d->%d\n", name, a, b);
339 return true;
340 }
341 return false;
342 }
343
344 void
345 brw_vs_debug_recompile(struct brw_context *brw,
346 struct gl_shader_program *prog,
347 const struct brw_vs_prog_key *key)
348 {
349 struct intel_context *intel = &brw->intel;
350 struct brw_cache_item *c = NULL;
351 const struct brw_vs_prog_key *old_key = NULL;
352 bool found = false;
353
354 perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
355
356 for (unsigned int i = 0; i < brw->cache.size; i++) {
357 for (c = brw->cache.items[i]; c; c = c->next) {
358 if (c->cache_id == BRW_VS_PROG) {
359 old_key = c->key;
360
361 if (old_key->program_string_id == key->program_string_id)
362 break;
363 }
364 }
365 if (c)
366 break;
367 }
368
369 if (!c) {
370 perf_debug(" Didn't find previous compile in the shader cache for "
371 "debug\n");
372 return;
373 }
374
375 for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
376 found |= key_debug(intel, "Vertex attrib w/a flags",
377 old_key->gl_attrib_wa_flags[i],
378 key->gl_attrib_wa_flags[i]);
379 }
380
381 found |= key_debug(intel, "user clip flags",
382 old_key->userclip_active, key->userclip_active);
383
384 found |= key_debug(intel, "user clipping planes as push constants",
385 old_key->nr_userclip_plane_consts,
386 key->nr_userclip_plane_consts);
387
388 found |= key_debug(intel, "clip distance enable",
389 old_key->uses_clip_distance, key->uses_clip_distance);
390 found |= key_debug(intel, "clip plane enable bitfield",
391 old_key->userclip_planes_enabled_gen_4_5,
392 key->userclip_planes_enabled_gen_4_5);
393 found |= key_debug(intel, "copy edgeflag",
394 old_key->copy_edgeflag, key->copy_edgeflag);
395 found |= key_debug(intel, "PointCoord replace",
396 old_key->point_coord_replace, key->point_coord_replace);
397 found |= key_debug(intel, "vertex color clamping",
398 old_key->clamp_vertex_color, key->clamp_vertex_color);
399
400 found |= brw_debug_recompile_sampler_key(intel, &old_key->tex, &key->tex);
401
402 if (!found) {
403 perf_debug(" Something else\n");
404 }
405 }
406
407 static void brw_upload_vs_prog(struct brw_context *brw)
408 {
409 struct intel_context *intel = &brw->intel;
410 struct gl_context *ctx = &intel->ctx;
411 struct brw_vs_prog_key key;
412 /* BRW_NEW_VERTEX_PROGRAM */
413 struct brw_vertex_program *vp =
414 (struct brw_vertex_program *)brw->vertex_program;
415 struct gl_program *prog = (struct gl_program *) brw->vertex_program;
416 int i;
417
418 memset(&key, 0, sizeof(key));
419
420 /* Just upload the program verbatim for now. Always send it all
421 * the inputs it asks for, whether they are varying or not.
422 */
423 key.program_string_id = vp->id;
424 key.userclip_active = (ctx->Transform.ClipPlanesEnabled != 0);
425 key.uses_clip_distance = vp->program.UsesClipDistance;
426 if (key.userclip_active && !key.uses_clip_distance) {
427 if (intel->gen < 6) {
428 key.nr_userclip_plane_consts
429 = _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled);
430 key.userclip_planes_enabled_gen_4_5
431 = ctx->Transform.ClipPlanesEnabled;
432 } else {
433 key.nr_userclip_plane_consts
434 = _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
435 }
436 }
437
438 /* _NEW_POLYGON */
439 if (intel->gen < 6) {
440 key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
441 ctx->Polygon.BackMode != GL_FILL);
442 }
443
444 /* _NEW_LIGHT | _NEW_BUFFERS */
445 key.clamp_vertex_color = ctx->Light._ClampVertexColor;
446
447 /* _NEW_POINT */
448 if (intel->gen < 6 && ctx->Point.PointSprite) {
449 for (i = 0; i < 8; i++) {
450 if (ctx->Point.CoordReplace[i])
451 key.point_coord_replace |= (1 << i);
452 }
453 }
454
455 /* _NEW_TEXTURE */
456 brw_populate_sampler_prog_key_data(ctx, prog, &key.tex);
457
458 /* BRW_NEW_VERTICES */
459 if (intel->gen < 8 && !intel->is_haswell) {
460 /* Prior to Haswell, the hardware can't natively support GL_FIXED or
461 * 2_10_10_10_REV vertex formats. Set appropriate workaround flags.
462 */
463 for (i = 0; i < VERT_ATTRIB_MAX; i++) {
464 if (!(vp->program.Base.InputsRead & BITFIELD64_BIT(i)))
465 continue;
466
467 uint8_t wa_flags = 0;
468
469 switch (brw->vb.inputs[i].glarray->Type) {
470
471 case GL_FIXED:
472 wa_flags = brw->vb.inputs[i].glarray->Size;
473 break;
474
475 case GL_INT_2_10_10_10_REV:
476 wa_flags |= BRW_ATTRIB_WA_SIGN;
477 /* fallthough */
478
479 case GL_UNSIGNED_INT_2_10_10_10_REV:
480 if (brw->vb.inputs[i].glarray->Format == GL_BGRA)
481 wa_flags |= BRW_ATTRIB_WA_BGRA;
482
483 if (brw->vb.inputs[i].glarray->Normalized)
484 wa_flags |= BRW_ATTRIB_WA_NORMALIZE;
485 else if (!brw->vb.inputs[i].glarray->Integer)
486 wa_flags |= BRW_ATTRIB_WA_SCALE;
487
488 break;
489 }
490
491 key.gl_attrib_wa_flags[i] = wa_flags;
492 }
493 }
494
495 if (!brw_search_cache(&brw->cache, BRW_VS_PROG,
496 &key, sizeof(key),
497 &brw->vs.prog_offset, &brw->vs.prog_data)) {
498 bool success = do_vs_prog(brw, ctx->Shader.CurrentVertexProgram,
499 vp, &key);
500
501 assert(success);
502 }
503 if (memcmp(&brw->vs.prog_data->vue_map, &brw->vue_map_geom_out,
504 sizeof(brw->vue_map_geom_out)) != 0) {
505 brw->vue_map_geom_out = brw->vs.prog_data->vue_map;
506 brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT;
507 }
508 }
509
510 /* See brw_vs.c:
511 */
512 const struct brw_tracked_state brw_vs_prog = {
513 .dirty = {
514 .mesa = (_NEW_TRANSFORM | _NEW_POLYGON | _NEW_POINT | _NEW_LIGHT |
515 _NEW_TEXTURE |
516 _NEW_BUFFERS),
517 .brw = (BRW_NEW_VERTEX_PROGRAM |
518 BRW_NEW_VERTICES),
519 .cache = 0
520 },
521 .emit = brw_upload_vs_prog
522 };
523
524 bool
525 brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
526 {
527 struct brw_context *brw = brw_context(ctx);
528 struct brw_vs_prog_key key;
529 uint32_t old_prog_offset = brw->vs.prog_offset;
530 struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
531 bool success;
532
533 if (!prog->_LinkedShaders[MESA_SHADER_VERTEX])
534 return true;
535
536 struct gl_vertex_program *vp = (struct gl_vertex_program *)
537 prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program;
538 struct brw_vertex_program *bvp = brw_vertex_program(vp);
539
540 memset(&key, 0, sizeof(key));
541
542 key.program_string_id = bvp->id;
543 key.clamp_vertex_color = true;
544
545 for (int i = 0; i < MAX_SAMPLERS; i++) {
546 if (vp->Base.ShadowSamplers & (1 << i)) {
547 /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
548 key.tex.swizzles[i] =
549 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE);
550 } else {
551 /* Color sampler: assume no swizzling. */
552 key.tex.swizzles[i] = SWIZZLE_XYZW;
553 }
554 }
555
556 success = do_vs_prog(brw, prog, bvp, &key);
557
558 brw->vs.prog_offset = old_prog_offset;
559 brw->vs.prog_data = old_prog_data;
560
561 return success;
562 }
563
564 void
565 brw_vs_prog_data_free(const void *in_prog_data)
566 {
567 const struct brw_vs_prog_data *prog_data = in_prog_data;
568
569 ralloc_free((void *)prog_data->param);
570 ralloc_free((void *)prog_data->pull_param);
571 }