src/mesa/drivers/dri/i965/brw_vs.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/compiler.h"
  34 #include "brw_context.h"
  35 #include "brw_vs.h"
  36 #include "brw_util.h"
  37 #include "brw_state.h"
  38 #include "program/prog_print.h"
  39 #include "program/prog_parameter.h"
  40
  41 #include "glsl/ralloc.h"
  42
  43 static inline void assign_vue_slot(struct brw_vue_map *vue_map,
  44                                    int vert_result)
  45 {
  46    /* Make sure this vert_result hasn't been assigned a slot already */
  47    assert (vue_map->vert_result_to_slot[vert_result] == -1);
  48
  49    vue_map->vert_result_to_slot[vert_result] = vue_map->num_slots;
  50    vue_map->slot_to_vert_result[vue_map->num_slots++] = vert_result;
  51 }
  52
  53 /**
  54  * Compute the VUE map for vertex shader program.
  55  *
  56  * Note that consumers of this map using cache keys must include
  57  * prog_data->userclip and prog_data->outputs_written in their key
  58  * (generated by CACHE_NEW_VS_PROG).
  59  */
  60 static void
  61 brw_compute_vue_map(struct brw_vs_compile *c)
  62 {
  63    struct brw_context *brw = c->func.brw;
  64    const struct intel_context *intel = &brw->intel;
  65    struct brw_vue_map *vue_map = &c->prog_data.vue_map;
  66    GLbitfield64 outputs_written = c->prog_data.outputs_written;
  67    int i;
  68
  69    vue_map->num_slots = 0;
  70    for (i = 0; i < BRW_VERT_RESULT_MAX; ++i) {
  71       vue_map->vert_result_to_slot[i] = -1;
  72       vue_map->slot_to_vert_result[i] = BRW_VERT_RESULT_MAX;
  73    }
  74
  75    /* VUE header: format depends on chip generation and whether clipping is
  76     * enabled.
  77     */
  78    switch (intel->gen) {
  79    case 4:
  80       /* There are 8 dwords in VUE header pre-Ironlake:
  81        * dword 0-3 is indices, point width, clip flags.
  82        * dword 4-7 is ndc position
  83        * dword 8-11 is the first vertex data.
  84        */
  85       assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
  86       assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
  87       assign_vue_slot(vue_map, VERT_RESULT_HPOS);
  88       break;
  89    case 5:
  90       /* There are 20 DWs (D0-D19) in VUE header on Ironlake:
  91        * dword 0-3 of the header is indices, point width, clip flags.
  92        * dword 4-7 is the ndc position
  93        * dword 8-11 of the vertex header is the 4D space position
  94        * dword 12-19 of the vertex header is the user clip distance.
  95        * dword 20-23 is a pad so that the vertex element data is aligned
  96        * dword 24-27 is the first vertex data we fill.
  97        *
  98        * Note: future pipeline stages expect 4D space position to be
  99        * contiguous with the other vert_results, so we make dword 24-27 a
 100        * duplicate copy of the 4D space position.
 101        */
 102       assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
 103       assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
 104       assign_vue_slot(vue_map, BRW_VERT_RESULT_HPOS_DUPLICATE);
 105       assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
 106       assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
 107       assign_vue_slot(vue_map, BRW_VERT_RESULT_PAD);
 108       assign_vue_slot(vue_map, VERT_RESULT_HPOS);
 109       break;
 110    case 6:
 111    case 7:
 112       /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
 113        * dword 0-3 of the header is indices, point width, clip flags.
 114        * dword 4-7 is the 4D space position
 115        * dword 8-15 of the vertex header is the user clip distance if
 116        * enabled.
 117        * dword 8-11 or 16-19 is the first vertex element data we fill.
 118        */
 119       assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
 120       assign_vue_slot(vue_map, VERT_RESULT_HPOS);
 121       if (c->key.userclip_active) {
 122          assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
 123          assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
 124       }
 125       /* front and back colors need to be consecutive so that we can use
 126        * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
 127        * two-sided color.
 128        */
 129       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL0))
 130          assign_vue_slot(vue_map, VERT_RESULT_COL0);
 131       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC0))
 132          assign_vue_slot(vue_map, VERT_RESULT_BFC0);
 133       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL1))
 134          assign_vue_slot(vue_map, VERT_RESULT_COL1);
 135       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC1))
 136          assign_vue_slot(vue_map, VERT_RESULT_BFC1);
 137       break;
 138    default:
 139       assert (!"VUE map not known for this chip generation");
 140       break;
 141    }
 142
 143    /* The hardware doesn't care about the rest of the vertex outputs, so just
 144     * assign them contiguously.  Don't reassign outputs that already have a
 145     * slot.
 146     *
 147     * Also, prior to Gen6, don't assign a slot for VERT_RESULT_CLIP_VERTEX,
 148     * since it is unsupported.  In Gen6 and above, VERT_RESULT_CLIP_VERTEX may
 149     * be needed for transform feedback; since we don't want to have to
 150     * recompute the VUE map (and everything that depends on it) when transform
 151     * feedback is enabled or disabled, just go ahead and assign a slot for it.
 152     */
 153    for (int i = 0; i < VERT_RESULT_MAX; ++i) {
 154       if (intel->gen < 6 && i == VERT_RESULT_CLIP_VERTEX)
 155          continue;
 156       if ((outputs_written & BITFIELD64_BIT(i)) &&
 157           vue_map->vert_result_to_slot[i] == -1) {
 158          assign_vue_slot(vue_map, i);
 159       }
 160    }
 161 }
 162
 163
 164 /**
 165  * Decide which set of clip planes should be used when clipping via
 166  * gl_Position or gl_ClipVertex.
 167  */
 168 gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
 169 {
 170    if (ctx->Shader.CurrentVertexProgram) {
 171       /* There is currently a GLSL vertex shader, so clip according to GLSL
 172        * rules, which means compare gl_ClipVertex (or gl_Position, if
 173        * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
 174        * that were stored in EyeUserPlane at the time the clip planes were
 175        * specified.
 176        */
 177       return ctx->Transform.EyeUserPlane;
 178    } else {
 179       /* Either we are using fixed function or an ARB vertex program.  In
 180        * either case the clip planes are going to be compared against
 181        * gl_Position (which is in clip coordinates) so we have to clip using
 182        * _ClipUserPlane, which was transformed into clip coordinates by Mesa
 183        * core.
 184        */
 185       return ctx->Transform._ClipUserPlane;
 186    }
 187 }
 188
 189 bool
 190 brw_vs_prog_data_compare(const void *in_a, const void *in_b,
 191                          int aux_size, const void *in_key)
 192 {
 193    const struct brw_vs_prog_data *a = in_a;
 194    const struct brw_vs_prog_data *b = in_b;
 195
 196    /* Compare all the struct up to the pointers. */
 197    if (memcmp(a, b, offsetof(struct brw_vs_prog_data, param)))
 198       return false;
 199
 200    if (memcmp(a->param, b->param, a->nr_params * sizeof(void *)))
 201       return false;
 202
 203    if (memcmp(a->pull_param, b->pull_param, a->nr_pull_params * sizeof(void *)))
 204       return false;
 205
 206    return true;
 207 }
 208
 209 static bool
 210 do_vs_prog(struct brw_context *brw,
 211            struct gl_shader_program *prog,
 212            struct brw_vertex_program *vp,
 213            struct brw_vs_prog_key *key)
 214 {
 215    struct gl_context *ctx = &brw->intel.ctx;
 216    struct intel_context *intel = &brw->intel;
 217    GLuint program_size;
 218    const GLuint *program;
 219    struct brw_vs_compile c;
 220    void *mem_ctx;
 221    int aux_size;
 222    int i;
 223    struct gl_shader *vs = NULL;
 224
 225    if (prog)
 226       vs = prog->_LinkedShaders[MESA_SHADER_VERTEX];
 227
 228    memset(&c, 0, sizeof(c));
 229    memcpy(&c.key, key, sizeof(*key));
 230
 231    mem_ctx = ralloc_context(NULL);
 232
 233    brw_init_compile(brw, &c.func, mem_ctx);
 234    c.vp = vp;
 235
 236    /* Allocate the references to the uniforms that will end up in the
 237     * prog_data associated with the compiled program, and which will be freed
 238     * by the state cache.
 239     */
 240    int param_count;
 241    if (vs) {
 242       /* We add padding around uniform values below vec4 size, with the worst
 243        * case being a float value that gets blown up to a vec4, so be
 244        * conservative here.
 245        */
 246       param_count = vs->num_uniform_components * 4;
 247
 248       /* We also upload clip plane data as uniforms */
 249       param_count += MAX_CLIP_PLANES * 4;
 250    } else {
 251       param_count = vp->program.Base.Parameters->NumParameters * 4;
 252    }
 253    c.prog_data.param = rzalloc_array(NULL, const float *, param_count);
 254    c.prog_data.pull_param = rzalloc_array(NULL, const float *, param_count);
 255
 256    c.prog_data.outputs_written = vp->program.Base.OutputsWritten;
 257    c.prog_data.inputs_read = vp->program.Base.InputsRead;
 258
 259    if (c.key.copy_edgeflag) {
 260       c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_EDGE);
 261       c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
 262    }
 263
 264    /* Put dummy slots into the VUE for the SF to put the replaced
 265     * point sprite coords in.  We shouldn't need these dummy slots,
 266     * which take up precious URB space, but it would mean that the SF
 267     * doesn't get nice aligned pairs of input coords into output
 268     * coords, which would be a pain to handle.
 269     */
 270    for (i = 0; i < 8; i++) {
 271       if (c.key.point_coord_replace & (1 << i))
 272          c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_TEX0 + i);
 273    }
 274
 275    brw_compute_vue_map(&c);
 276
 277    if (0) {
 278       _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG,
 279                                true);
 280    }
 281
 282    /* Emit GEN4 code.
 283     */
 284    if (prog) {
 285       if (!brw_vs_emit(prog, &c)) {
 286          ralloc_free(mem_ctx);
 287          return false;
 288       }
 289    } else {
 290       brw_old_vs_emit(&c);
 291    }
 292
 293    if (c.prog_data.nr_pull_params)
 294       c.prog_data.num_surfaces = 1;
 295    if (c.vp->program.Base.SamplersUsed)
 296       c.prog_data.num_surfaces = SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT);
 297    if (prog &&
 298        prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks) {
 299       c.prog_data.num_surfaces =
 300          SURF_INDEX_VS_UBO(prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks);
 301    }
 302
 303    /* Scratch space is used for register spilling */
 304    if (c.last_scratch) {
 305       perf_debug("Vertex shader triggered register spilling.  "
 306                  "Try reducing the number of live vec4 values to "
 307                  "improve performance.\n");
 308
 309       c.prog_data.total_scratch = brw_get_scratch_size(c.last_scratch*REG_SIZE);
 310
 311       brw_get_scratch_bo(intel, &brw->vs.scratch_bo,
 312                          c.prog_data.total_scratch * brw->max_vs_threads);
 313    }
 314
 315    /* get the program
 316     */
 317    program = brw_get_program(&c.func, &program_size);
 318
 319    /* We upload from &c.prog_data including the constant_map assuming
 320     * they're packed together.  It would be nice to have a
 321     * compile-time assert macro here.
 322     */
 323    assert(c.constant_map == (int8_t *)&c.prog_data +
 324           sizeof(c.prog_data));
 325    assert(ctx->Const.VertexProgram.MaxNativeParameters ==
 326           ARRAY_SIZE(c.constant_map));
 327    (void) ctx;
 328
 329    aux_size = sizeof(c.prog_data);
 330    /* constant_map */
 331    aux_size += c.vp->program.Base.Parameters->NumParameters;
 332
 333    brw_upload_cache(&brw->cache, BRW_VS_PROG,
 334                     &c.key, sizeof(c.key),
 335                     program, program_size,
 336                     &c.prog_data, aux_size,
 337                     &brw->vs.prog_offset, &brw->vs.prog_data);
 338    ralloc_free(mem_ctx);
 339
 340    return true;
 341 }
 342
 343 static bool
 344 key_debug(const char *name, int a, int b)
 345 {
 346    if (a != b) {
 347       perf_debug("  %s %d->%d\n", name, a, b);
 348       return true;
 349    }
 350    return false;
 351 }
 352
 353 void
 354 brw_vs_debug_recompile(struct brw_context *brw,
 355                        struct gl_shader_program *prog,
 356                        const struct brw_vs_prog_key *key)
 357 {
 358    struct brw_cache_item *c = NULL;
 359    const struct brw_vs_prog_key *old_key = NULL;
 360    bool found = false;
 361
 362    perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
 363
 364    for (unsigned int i = 0; i < brw->cache.size; i++) {
 365       for (c = brw->cache.items[i]; c; c = c->next) {
 366          if (c->cache_id == BRW_VS_PROG) {
 367             old_key = c->key;
 368
 369             if (old_key->program_string_id == key->program_string_id)
 370                break;
 371          }
 372       }
 373       if (c)
 374          break;
 375    }
 376
 377    if (!c) {
 378       perf_debug("  Didn't find previous compile in the shader cache for "
 379                  "debug\n");
 380       return;
 381    }
 382
 383    for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
 384       found |= key_debug("GL_FIXED rescaling",
 385                          old_key->gl_fixed_input_size[i],
 386                          key->gl_fixed_input_size[i]);
 387    }
 388
 389    found |= key_debug("user clip flags",
 390                       old_key->userclip_active, key->userclip_active);
 391
 392    found |= key_debug("user clipping planes as push constants",
 393                       old_key->nr_userclip_plane_consts,
 394                       key->nr_userclip_plane_consts);
 395
 396    found |= key_debug("clip distance enable",
 397                       old_key->uses_clip_distance, key->uses_clip_distance);
 398    found |= key_debug("clip plane enable bitfield",
 399                       old_key->userclip_planes_enabled_gen_4_5,
 400                       key->userclip_planes_enabled_gen_4_5);
 401    found |= key_debug("copy edgeflag",
 402                       old_key->copy_edgeflag, key->copy_edgeflag);
 403    found |= key_debug("PointCoord replace",
 404                       old_key->point_coord_replace, key->point_coord_replace);
 405    found |= key_debug("vertex color clamping",
 406                       old_key->clamp_vertex_color, key->clamp_vertex_color);
 407
 408    found |= brw_debug_recompile_sampler_key(&old_key->tex, &key->tex);
 409
 410    if (!found) {
 411       perf_debug("  Something else\n");
 412    }
 413 }
 414
 415 static void brw_upload_vs_prog(struct brw_context *brw)
 416 {
 417    struct intel_context *intel = &brw->intel;
 418    struct gl_context *ctx = &intel->ctx;
 419    struct brw_vs_prog_key key;
 420    /* BRW_NEW_VERTEX_PROGRAM */
 421    struct brw_vertex_program *vp =
 422       (struct brw_vertex_program *)brw->vertex_program;
 423    struct gl_program *prog = (struct gl_program *) brw->vertex_program;
 424    int i;
 425
 426    memset(&key, 0, sizeof(key));
 427
 428    /* Just upload the program verbatim for now.  Always send it all
 429     * the inputs it asks for, whether they are varying or not.
 430     */
 431    key.program_string_id = vp->id;
 432    key.userclip_active = (ctx->Transform.ClipPlanesEnabled != 0);
 433    key.uses_clip_distance = vp->program.UsesClipDistance;
 434    if (key.userclip_active && !key.uses_clip_distance) {
 435       if (intel->gen < 6) {
 436          key.nr_userclip_plane_consts
 437             = _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled);
 438          key.userclip_planes_enabled_gen_4_5
 439             = ctx->Transform.ClipPlanesEnabled;
 440       } else {
 441          key.nr_userclip_plane_consts
 442             = _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
 443       }
 444    }
 445
 446    /* _NEW_POLYGON */
 447    if (intel->gen < 6) {
 448       key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
 449                            ctx->Polygon.BackMode != GL_FILL);
 450    }
 451
 452    /* _NEW_LIGHT | _NEW_BUFFERS */
 453    key.clamp_vertex_color = ctx->Light._ClampVertexColor;
 454
 455    /* _NEW_POINT */
 456    if (ctx->Point.PointSprite) {
 457       for (i = 0; i < 8; i++) {
 458          if (ctx->Point.CoordReplace[i])
 459             key.point_coord_replace |= (1 << i);
 460       }
 461    }
 462
 463    /* _NEW_TEXTURE */
 464    brw_populate_sampler_prog_key_data(ctx, prog, &key.tex);
 465
 466    /* BRW_NEW_VERTICES */
 467    for (i = 0; i < VERT_ATTRIB_MAX; i++) {
 468       if (vp->program.Base.InputsRead & BITFIELD64_BIT(i) &&
 469           brw->vb.inputs[i].glarray->Type == GL_FIXED) {
 470          key.gl_fixed_input_size[i] = brw->vb.inputs[i].glarray->Size;
 471       }
 472    }
 473
 474    if (!brw_search_cache(&brw->cache, BRW_VS_PROG,
 475                          &key, sizeof(key),
 476                          &brw->vs.prog_offset, &brw->vs.prog_data)) {
 477       bool success = do_vs_prog(brw, ctx->Shader.CurrentVertexProgram,
 478                                 vp, &key);
 479
 480       assert(success);
 481    }
 482    brw->vs.constant_map = ((int8_t *)brw->vs.prog_data +
 483                            sizeof(*brw->vs.prog_data));
 484 }
 485
 486 /* See brw_vs.c:
 487  */
 488 const struct brw_tracked_state brw_vs_prog = {
 489    .dirty = {
 490       .mesa  = (_NEW_TRANSFORM | _NEW_POLYGON | _NEW_POINT | _NEW_LIGHT |
 491                 _NEW_TEXTURE |
 492                 _NEW_BUFFERS),
 493       .brw   = (BRW_NEW_VERTEX_PROGRAM |
 494                 BRW_NEW_VERTICES),
 495       .cache = 0
 496    },
 497    .emit = brw_upload_vs_prog
 498 };
 499
 500 bool
 501 brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
 502 {
 503    struct brw_context *brw = brw_context(ctx);
 504    struct brw_vs_prog_key key;
 505    uint32_t old_prog_offset = brw->vs.prog_offset;
 506    struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
 507    bool success;
 508
 509    if (!prog->_LinkedShaders[MESA_SHADER_VERTEX])
 510       return true;
 511
 512    struct gl_vertex_program *vp = (struct gl_vertex_program *)
 513       prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program;
 514    struct brw_vertex_program *bvp = brw_vertex_program(vp);
 515
 516    memset(&key, 0, sizeof(key));
 517
 518    key.program_string_id = bvp->id;
 519    key.clamp_vertex_color = true;
 520
 521    for (int i = 0; i < MAX_SAMPLERS; i++) {
 522       if (vp->Base.ShadowSamplers & (1 << i)) {
 523          /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
 524          key.tex.swizzles[i] =
 525             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE);
 526       } else {
 527          /* Color sampler: assume no swizzling. */
 528          key.tex.swizzles[i] = SWIZZLE_XYZW;
 529       }
 530    }
 531
 532    success = do_vs_prog(brw, prog, bvp, &key);
 533
 534    brw->vs.prog_offset = old_prog_offset;
 535    brw->vs.prog_data = old_prog_data;
 536
 537    return success;
 538 }
 539
 540 void
 541 brw_vs_prog_data_free(const void *in_prog_data)
 542 {
 543    const struct brw_vs_prog_data *prog_data = in_prog_data;
 544
 545    ralloc_free((void *)prog_data->param);
 546    ralloc_free((void *)prog_data->pull_param);
 547 }