i965: Move intel_context::gen and gt fields to brw_context.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vs.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "main/compiler.h"
34 #include "brw_context.h"
35 #include "brw_vs.h"
36 #include "brw_util.h"
37 #include "brw_state.h"
38 #include "program/prog_print.h"
39 #include "program/prog_parameter.h"
40
41 #include "glsl/ralloc.h"
42
43 static inline void assign_vue_slot(struct brw_vue_map *vue_map,
44 int varying)
45 {
46 /* Make sure this varying hasn't been assigned a slot already */
47 assert (vue_map->varying_to_slot[varying] == -1);
48
49 vue_map->varying_to_slot[varying] = vue_map->num_slots;
50 vue_map->slot_to_varying[vue_map->num_slots++] = varying;
51 }
52
53 /**
54 * Compute the VUE map for vertex shader program.
55 *
56 * Note that consumers of this map using cache keys must include
57 * prog_data->userclip and prog_data->outputs_written in their key
58 * (generated by CACHE_NEW_VS_PROG).
59 */
60 void
61 brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
62 GLbitfield64 slots_valid, bool userclip_active)
63 {
64 vue_map->slots_valid = slots_valid;
65 int i;
66
67 /* Make sure that the values we store in vue_map->varying_to_slot and
68 * vue_map->slot_to_varying won't overflow the signed chars that are used
69 * to store them. Note that since vue_map->slot_to_varying sometimes holds
70 * values equal to BRW_VARYING_SLOT_COUNT, we need to ensure that
71 * BRW_VARYING_SLOT_COUNT is <= 127, not 128.
72 */
73 STATIC_ASSERT(BRW_VARYING_SLOT_COUNT <= 127);
74
75 vue_map->num_slots = 0;
76 for (i = 0; i < BRW_VARYING_SLOT_COUNT; ++i) {
77 vue_map->varying_to_slot[i] = -1;
78 vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_COUNT;
79 }
80
81 /* VUE header: format depends on chip generation and whether clipping is
82 * enabled.
83 */
84 switch (brw->gen) {
85 case 4:
86 case 5:
87 /* There are 8 dwords in VUE header pre-Ironlake:
88 * dword 0-3 is indices, point width, clip flags.
89 * dword 4-7 is ndc position
90 * dword 8-11 is the first vertex data.
91 *
92 * On Ironlake the VUE header is nominally 20 dwords, but the hardware
93 * will accept the same header layout as Gen4 [and should be a bit faster]
94 */
95 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
96 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
97 assign_vue_slot(vue_map, VARYING_SLOT_POS);
98 break;
99 case 6:
100 case 7:
101 /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
102 * dword 0-3 of the header is indices, point width, clip flags.
103 * dword 4-7 is the 4D space position
104 * dword 8-15 of the vertex header is the user clip distance if
105 * enabled.
106 * dword 8-11 or 16-19 is the first vertex element data we fill.
107 */
108 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
109 assign_vue_slot(vue_map, VARYING_SLOT_POS);
110 if (userclip_active) {
111 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
112 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
113 }
114 /* front and back colors need to be consecutive so that we can use
115 * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
116 * two-sided color.
117 */
118 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0))
119 assign_vue_slot(vue_map, VARYING_SLOT_COL0);
120 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0))
121 assign_vue_slot(vue_map, VARYING_SLOT_BFC0);
122 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1))
123 assign_vue_slot(vue_map, VARYING_SLOT_COL1);
124 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1))
125 assign_vue_slot(vue_map, VARYING_SLOT_BFC1);
126 break;
127 default:
128 assert (!"VUE map not known for this chip generation");
129 break;
130 }
131
132 /* The hardware doesn't care about the rest of the vertex outputs, so just
133 * assign them contiguously. Don't reassign outputs that already have a
134 * slot.
135 *
136 * We generally don't need to assign a slot for VARYING_SLOT_CLIP_VERTEX,
137 * since it's encoded as the clip distances by emit_clip_distances().
138 * However, it may be output by transform feedback, and we'd rather not
139 * recompute state when TF changes, so we just always include it.
140 */
141 for (int i = 0; i < VARYING_SLOT_MAX; ++i) {
142 if ((slots_valid & BITFIELD64_BIT(i)) &&
143 vue_map->varying_to_slot[i] == -1) {
144 assign_vue_slot(vue_map, i);
145 }
146 }
147 }
148
149
150 /**
151 * Decide which set of clip planes should be used when clipping via
152 * gl_Position or gl_ClipVertex.
153 */
154 gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
155 {
156 if (ctx->Shader.CurrentVertexProgram) {
157 /* There is currently a GLSL vertex shader, so clip according to GLSL
158 * rules, which means compare gl_ClipVertex (or gl_Position, if
159 * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
160 * that were stored in EyeUserPlane at the time the clip planes were
161 * specified.
162 */
163 return ctx->Transform.EyeUserPlane;
164 } else {
165 /* Either we are using fixed function or an ARB vertex program. In
166 * either case the clip planes are going to be compared against
167 * gl_Position (which is in clip coordinates) so we have to clip using
168 * _ClipUserPlane, which was transformed into clip coordinates by Mesa
169 * core.
170 */
171 return ctx->Transform._ClipUserPlane;
172 }
173 }
174
175
176 bool
177 brw_vec4_prog_data_compare(const struct brw_vec4_prog_data *a,
178 const struct brw_vec4_prog_data *b)
179 {
180 /* Compare all the struct up to the pointers. */
181 if (memcmp(a, b, offsetof(struct brw_vec4_prog_data, param)))
182 return false;
183
184 if (memcmp(a->param, b->param, a->nr_params * sizeof(void *)))
185 return false;
186
187 if (memcmp(a->pull_param, b->pull_param, a->nr_pull_params * sizeof(void *)))
188 return false;
189
190 return true;
191 }
192
193
194 bool
195 brw_vs_prog_data_compare(const void *in_a, const void *in_b,
196 int aux_size, const void *in_key)
197 {
198 const struct brw_vs_prog_data *a = in_a;
199 const struct brw_vs_prog_data *b = in_b;
200
201 /* Compare the base vec4 structure. */
202 if (!brw_vec4_prog_data_compare(&a->base, &b->base))
203 return false;
204
205 /* Compare the rest of the struct. */
206 const unsigned offset = sizeof(struct brw_vec4_prog_data);
207 if (memcmp(((char *) &a) + offset, ((char *) &b) + offset,
208 sizeof(struct brw_vs_prog_data) - offset)) {
209 return false;
210 }
211
212 return true;
213 }
214
215 static bool
216 do_vs_prog(struct brw_context *brw,
217 struct gl_shader_program *prog,
218 struct brw_vertex_program *vp,
219 struct brw_vs_prog_key *key)
220 {
221 GLuint program_size;
222 const GLuint *program;
223 struct brw_vs_compile c;
224 struct brw_vs_prog_data prog_data;
225 void *mem_ctx;
226 int i;
227 struct gl_shader *vs = NULL;
228
229 if (prog)
230 vs = prog->_LinkedShaders[MESA_SHADER_VERTEX];
231
232 memset(&c, 0, sizeof(c));
233 memcpy(&c.key, key, sizeof(*key));
234 memset(&prog_data, 0, sizeof(prog_data));
235
236 mem_ctx = ralloc_context(NULL);
237
238 c.vp = vp;
239
240 /* Allocate the references to the uniforms that will end up in the
241 * prog_data associated with the compiled program, and which will be freed
242 * by the state cache.
243 */
244 int param_count;
245 if (vs) {
246 /* We add padding around uniform values below vec4 size, with the worst
247 * case being a float value that gets blown up to a vec4, so be
248 * conservative here.
249 */
250 param_count = vs->num_uniform_components * 4;
251
252 } else {
253 param_count = vp->program.Base.Parameters->NumParameters * 4;
254 }
255 /* We also upload clip plane data as uniforms */
256 param_count += MAX_CLIP_PLANES * 4;
257
258 prog_data.base.param = rzalloc_array(NULL, const float *, param_count);
259 prog_data.base.pull_param = rzalloc_array(NULL, const float *, param_count);
260
261 GLbitfield64 outputs_written = vp->program.Base.OutputsWritten;
262 prog_data.inputs_read = vp->program.Base.InputsRead;
263
264 if (c.key.copy_edgeflag) {
265 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
266 prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
267 }
268
269 if (brw->gen < 6) {
270 /* Put dummy slots into the VUE for the SF to put the replaced
271 * point sprite coords in. We shouldn't need these dummy slots,
272 * which take up precious URB space, but it would mean that the SF
273 * doesn't get nice aligned pairs of input coords into output
274 * coords, which would be a pain to handle.
275 */
276 for (i = 0; i < 8; i++) {
277 if (c.key.point_coord_replace & (1 << i))
278 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
279 }
280 }
281
282 brw_compute_vue_map(brw, &prog_data.base.vue_map, outputs_written,
283 c.key.base.userclip_active);
284
285 if (0) {
286 _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG,
287 true);
288 }
289
290 /* Emit GEN4 code.
291 */
292 program = brw_vs_emit(brw, prog, &c, &prog_data, mem_ctx, &program_size);
293 if (program == NULL) {
294 ralloc_free(mem_ctx);
295 return false;
296 }
297
298 if (prog_data.base.nr_pull_params)
299 prog_data.base.num_surfaces = 1;
300 if (c.vp->program.Base.SamplersUsed)
301 prog_data.base.num_surfaces = SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT);
302 if (prog &&
303 prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks) {
304 prog_data.base.num_surfaces =
305 SURF_INDEX_VS_UBO(prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks);
306 }
307
308 /* Scratch space is used for register spilling */
309 if (c.base.last_scratch) {
310 perf_debug("Vertex shader triggered register spilling. "
311 "Try reducing the number of live vec4 values to "
312 "improve performance.\n");
313
314 prog_data.base.total_scratch
315 = brw_get_scratch_size(c.base.last_scratch*REG_SIZE);
316
317 brw_get_scratch_bo(brw, &brw->vs.scratch_bo,
318 prog_data.base.total_scratch * brw->max_vs_threads);
319 }
320
321 brw_upload_cache(&brw->cache, BRW_VS_PROG,
322 &c.key, sizeof(c.key),
323 program, program_size,
324 &prog_data, sizeof(prog_data),
325 &brw->vs.prog_offset, &brw->vs.prog_data);
326 ralloc_free(mem_ctx);
327
328 return true;
329 }
330
331 static bool
332 key_debug(struct brw_context *brw, const char *name, int a, int b)
333 {
334 if (a != b) {
335 perf_debug(" %s %d->%d\n", name, a, b);
336 return true;
337 }
338 return false;
339 }
340
341 void
342 brw_vs_debug_recompile(struct brw_context *brw,
343 struct gl_shader_program *prog,
344 const struct brw_vs_prog_key *key)
345 {
346 struct brw_cache_item *c = NULL;
347 const struct brw_vs_prog_key *old_key = NULL;
348 bool found = false;
349
350 perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
351
352 for (unsigned int i = 0; i < brw->cache.size; i++) {
353 for (c = brw->cache.items[i]; c; c = c->next) {
354 if (c->cache_id == BRW_VS_PROG) {
355 old_key = c->key;
356
357 if (old_key->base.program_string_id == key->base.program_string_id)
358 break;
359 }
360 }
361 if (c)
362 break;
363 }
364
365 if (!c) {
366 perf_debug(" Didn't find previous compile in the shader cache for "
367 "debug\n");
368 return;
369 }
370
371 for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
372 found |= key_debug(brw, "Vertex attrib w/a flags",
373 old_key->gl_attrib_wa_flags[i],
374 key->gl_attrib_wa_flags[i]);
375 }
376
377 found |= key_debug(brw, "user clip flags",
378 old_key->base.userclip_active, key->base.userclip_active);
379
380 found |= key_debug(brw, "user clipping planes as push constants",
381 old_key->base.nr_userclip_plane_consts,
382 key->base.nr_userclip_plane_consts);
383
384 found |= key_debug(brw, "clip distance enable",
385 old_key->base.uses_clip_distance, key->base.uses_clip_distance);
386 found |= key_debug(brw, "clip plane enable bitfield",
387 old_key->base.userclip_planes_enabled_gen_4_5,
388 key->base.userclip_planes_enabled_gen_4_5);
389 found |= key_debug(brw, "copy edgeflag",
390 old_key->copy_edgeflag, key->copy_edgeflag);
391 found |= key_debug(brw, "PointCoord replace",
392 old_key->point_coord_replace, key->point_coord_replace);
393 found |= key_debug(brw, "vertex color clamping",
394 old_key->base.clamp_vertex_color, key->base.clamp_vertex_color);
395
396 found |= brw_debug_recompile_sampler_key(brw, &old_key->base.tex,
397 &key->base.tex);
398
399 if (!found) {
400 perf_debug(" Something else\n");
401 }
402 }
403
404 static void brw_upload_vs_prog(struct brw_context *brw)
405 {
406 struct gl_context *ctx = &brw->intel.ctx;
407 struct brw_vs_prog_key key;
408 /* BRW_NEW_VERTEX_PROGRAM */
409 struct brw_vertex_program *vp =
410 (struct brw_vertex_program *)brw->vertex_program;
411 struct gl_program *prog = (struct gl_program *) brw->vertex_program;
412 int i;
413
414 memset(&key, 0, sizeof(key));
415
416 /* Just upload the program verbatim for now. Always send it all
417 * the inputs it asks for, whether they are varying or not.
418 */
419 key.base.program_string_id = vp->id;
420 key.base.userclip_active = (ctx->Transform.ClipPlanesEnabled != 0);
421 key.base.uses_clip_distance = vp->program.UsesClipDistance;
422 if (key.base.userclip_active && !key.base.uses_clip_distance) {
423 if (brw->gen < 6) {
424 key.base.nr_userclip_plane_consts
425 = _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled);
426 key.base.userclip_planes_enabled_gen_4_5
427 = ctx->Transform.ClipPlanesEnabled;
428 } else {
429 key.base.nr_userclip_plane_consts
430 = _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
431 }
432 }
433
434 /* _NEW_POLYGON */
435 if (brw->gen < 6) {
436 key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
437 ctx->Polygon.BackMode != GL_FILL);
438 }
439
440 /* _NEW_LIGHT | _NEW_BUFFERS */
441 key.base.clamp_vertex_color = ctx->Light._ClampVertexColor;
442
443 /* _NEW_POINT */
444 if (brw->gen < 6 && ctx->Point.PointSprite) {
445 for (i = 0; i < 8; i++) {
446 if (ctx->Point.CoordReplace[i])
447 key.point_coord_replace |= (1 << i);
448 }
449 }
450
451 /* _NEW_TEXTURE */
452 brw_populate_sampler_prog_key_data(ctx, prog, &key.base.tex);
453
454 /* BRW_NEW_VERTICES */
455 if (brw->gen < 8 && !brw->is_haswell) {
456 /* Prior to Haswell, the hardware can't natively support GL_FIXED or
457 * 2_10_10_10_REV vertex formats. Set appropriate workaround flags.
458 */
459 for (i = 0; i < VERT_ATTRIB_MAX; i++) {
460 if (!(vp->program.Base.InputsRead & BITFIELD64_BIT(i)))
461 continue;
462
463 uint8_t wa_flags = 0;
464
465 switch (brw->vb.inputs[i].glarray->Type) {
466
467 case GL_FIXED:
468 wa_flags = brw->vb.inputs[i].glarray->Size;
469 break;
470
471 case GL_INT_2_10_10_10_REV:
472 wa_flags |= BRW_ATTRIB_WA_SIGN;
473 /* fallthough */
474
475 case GL_UNSIGNED_INT_2_10_10_10_REV:
476 if (brw->vb.inputs[i].glarray->Format == GL_BGRA)
477 wa_flags |= BRW_ATTRIB_WA_BGRA;
478
479 if (brw->vb.inputs[i].glarray->Normalized)
480 wa_flags |= BRW_ATTRIB_WA_NORMALIZE;
481 else if (!brw->vb.inputs[i].glarray->Integer)
482 wa_flags |= BRW_ATTRIB_WA_SCALE;
483
484 break;
485 }
486
487 key.gl_attrib_wa_flags[i] = wa_flags;
488 }
489 }
490
491 if (!brw_search_cache(&brw->cache, BRW_VS_PROG,
492 &key, sizeof(key),
493 &brw->vs.prog_offset, &brw->vs.prog_data)) {
494 bool success = do_vs_prog(brw, ctx->Shader.CurrentVertexProgram,
495 vp, &key);
496
497 assert(success);
498 }
499 if (memcmp(&brw->vs.prog_data->base.vue_map, &brw->vue_map_geom_out,
500 sizeof(brw->vue_map_geom_out)) != 0) {
501 brw->vue_map_geom_out = brw->vs.prog_data->base.vue_map;
502 brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT;
503 }
504 }
505
506 /* See brw_vs.c:
507 */
508 const struct brw_tracked_state brw_vs_prog = {
509 .dirty = {
510 .mesa = (_NEW_TRANSFORM | _NEW_POLYGON | _NEW_POINT | _NEW_LIGHT |
511 _NEW_TEXTURE |
512 _NEW_BUFFERS),
513 .brw = (BRW_NEW_VERTEX_PROGRAM |
514 BRW_NEW_VERTICES),
515 .cache = 0
516 },
517 .emit = brw_upload_vs_prog
518 };
519
520 bool
521 brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
522 {
523 struct brw_context *brw = brw_context(ctx);
524 struct brw_vs_prog_key key;
525 uint32_t old_prog_offset = brw->vs.prog_offset;
526 struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
527 bool success;
528
529 if (!prog->_LinkedShaders[MESA_SHADER_VERTEX])
530 return true;
531
532 struct gl_vertex_program *vp = (struct gl_vertex_program *)
533 prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program;
534 struct brw_vertex_program *bvp = brw_vertex_program(vp);
535
536 memset(&key, 0, sizeof(key));
537
538 key.base.program_string_id = bvp->id;
539 key.base.clamp_vertex_color = ctx->API == API_OPENGL_COMPAT;
540
541 for (int i = 0; i < MAX_SAMPLERS; i++) {
542 if (vp->Base.ShadowSamplers & (1 << i)) {
543 /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
544 key.base.tex.swizzles[i] =
545 MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE);
546 } else {
547 /* Color sampler: assume no swizzling. */
548 key.base.tex.swizzles[i] = SWIZZLE_XYZW;
549 }
550 }
551
552 success = do_vs_prog(brw, prog, bvp, &key);
553
554 brw->vs.prog_offset = old_prog_offset;
555 brw->vs.prog_data = old_prog_data;
556
557 return success;
558 }
559
560
561 void
562 brw_vec4_prog_data_free(const struct brw_vec4_prog_data *prog_data)
563 {
564 ralloc_free((void *)prog_data->param);
565 ralloc_free((void *)prog_data->pull_param);
566 }
567
568
569 void
570 brw_vs_prog_data_free(const void *in_prog_data)
571 {
572 const struct brw_vs_prog_data *prog_data = in_prog_data;
573
574 brw_vec4_prog_data_free(&prog_data->base);
575 }