i965: Store floating point mode choice in brw_stage_prog_data.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vs.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32
33 #include "main/compiler.h"
34 #include "brw_context.h"
35 #include "brw_vs.h"
36 #include "brw_util.h"
37 #include "brw_state.h"
38 #include "program/prog_print.h"
39 #include "program/prog_parameter.h"
40
41 #include "util/ralloc.h"
42
43 static inline void assign_vue_slot(struct brw_vue_map *vue_map,
44 int varying)
45 {
46 /* Make sure this varying hasn't been assigned a slot already */
47 assert (vue_map->varying_to_slot[varying] == -1);
48
49 vue_map->varying_to_slot[varying] = vue_map->num_slots;
50 vue_map->slot_to_varying[vue_map->num_slots++] = varying;
51 }
52
53 /**
54 * Compute the VUE map for vertex shader program.
55 */
56 void
57 brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
58 GLbitfield64 slots_valid)
59 {
60 vue_map->slots_valid = slots_valid;
61 int i;
62
63 /* gl_Layer and gl_ViewportIndex don't get their own varying slots -- they
64 * are stored in the first VUE slot (VARYING_SLOT_PSIZ).
65 */
66 slots_valid &= ~(VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT);
67
68 /* Make sure that the values we store in vue_map->varying_to_slot and
69 * vue_map->slot_to_varying won't overflow the signed chars that are used
70 * to store them. Note that since vue_map->slot_to_varying sometimes holds
71 * values equal to BRW_VARYING_SLOT_COUNT, we need to ensure that
72 * BRW_VARYING_SLOT_COUNT is <= 127, not 128.
73 */
74 STATIC_ASSERT(BRW_VARYING_SLOT_COUNT <= 127);
75
76 vue_map->num_slots = 0;
77 for (i = 0; i < BRW_VARYING_SLOT_COUNT; ++i) {
78 vue_map->varying_to_slot[i] = -1;
79 vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_COUNT;
80 }
81
82 /* VUE header: format depends on chip generation and whether clipping is
83 * enabled.
84 */
85 if (brw->gen < 6) {
86 /* There are 8 dwords in VUE header pre-Ironlake:
87 * dword 0-3 is indices, point width, clip flags.
88 * dword 4-7 is ndc position
89 * dword 8-11 is the first vertex data.
90 *
91 * On Ironlake the VUE header is nominally 20 dwords, but the hardware
92 * will accept the same header layout as Gen4 [and should be a bit faster]
93 */
94 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
95 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
96 assign_vue_slot(vue_map, VARYING_SLOT_POS);
97 } else {
98 /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
99 * dword 0-3 of the header is indices, point width, clip flags.
100 * dword 4-7 is the 4D space position
101 * dword 8-15 of the vertex header is the user clip distance if
102 * enabled.
103 * dword 8-11 or 16-19 is the first vertex element data we fill.
104 */
105 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
106 assign_vue_slot(vue_map, VARYING_SLOT_POS);
107 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0))
108 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
109 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1))
110 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
111
112 /* front and back colors need to be consecutive so that we can use
113 * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
114 * two-sided color.
115 */
116 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0))
117 assign_vue_slot(vue_map, VARYING_SLOT_COL0);
118 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0))
119 assign_vue_slot(vue_map, VARYING_SLOT_BFC0);
120 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1))
121 assign_vue_slot(vue_map, VARYING_SLOT_COL1);
122 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1))
123 assign_vue_slot(vue_map, VARYING_SLOT_BFC1);
124 }
125
126 /* The hardware doesn't care about the rest of the vertex outputs, so just
127 * assign them contiguously. Don't reassign outputs that already have a
128 * slot.
129 *
130 * We generally don't need to assign a slot for VARYING_SLOT_CLIP_VERTEX,
131 * since it's encoded as the clip distances by emit_clip_distances().
132 * However, it may be output by transform feedback, and we'd rather not
133 * recompute state when TF changes, so we just always include it.
134 */
135 for (int i = 0; i < VARYING_SLOT_MAX; ++i) {
136 if ((slots_valid & BITFIELD64_BIT(i)) &&
137 vue_map->varying_to_slot[i] == -1) {
138 assign_vue_slot(vue_map, i);
139 }
140 }
141 }
142
143
144 /**
145 * Decide which set of clip planes should be used when clipping via
146 * gl_Position or gl_ClipVertex.
147 */
148 gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
149 {
150 if (ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX]) {
151 /* There is currently a GLSL vertex shader, so clip according to GLSL
152 * rules, which means compare gl_ClipVertex (or gl_Position, if
153 * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
154 * that were stored in EyeUserPlane at the time the clip planes were
155 * specified.
156 */
157 return ctx->Transform.EyeUserPlane;
158 } else {
159 /* Either we are using fixed function or an ARB vertex program. In
160 * either case the clip planes are going to be compared against
161 * gl_Position (which is in clip coordinates) so we have to clip using
162 * _ClipUserPlane, which was transformed into clip coordinates by Mesa
163 * core.
164 */
165 return ctx->Transform._ClipUserPlane;
166 }
167 }
168
169
170 bool
171 brw_vs_prog_data_compare(const void *in_a, const void *in_b)
172 {
173 const struct brw_vs_prog_data *a = in_a;
174 const struct brw_vs_prog_data *b = in_b;
175
176 /* Compare the base structure. */
177 if (!brw_stage_prog_data_compare(&a->base.base, &b->base.base))
178 return false;
179
180 /* Compare the rest of the struct. */
181 const unsigned offset = sizeof(struct brw_stage_prog_data);
182 if (memcmp(((char *) a) + offset, ((char *) b) + offset,
183 sizeof(struct brw_vs_prog_data) - offset)) {
184 return false;
185 }
186
187 return true;
188 }
189
190 static bool
191 do_vs_prog(struct brw_context *brw,
192 struct gl_shader_program *prog,
193 struct brw_vertex_program *vp,
194 struct brw_vs_prog_key *key)
195 {
196 GLuint program_size;
197 const GLuint *program;
198 struct brw_vs_compile c;
199 struct brw_vs_prog_data prog_data;
200 struct brw_stage_prog_data *stage_prog_data = &prog_data.base.base;
201 void *mem_ctx;
202 int i;
203 struct gl_shader *vs = NULL;
204
205 if (prog)
206 vs = prog->_LinkedShaders[MESA_SHADER_VERTEX];
207
208 memset(&c, 0, sizeof(c));
209 memcpy(&c.key, key, sizeof(*key));
210 memset(&prog_data, 0, sizeof(prog_data));
211
212 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
213 if (!prog)
214 stage_prog_data->use_alt_mode = true;
215
216 mem_ctx = ralloc_context(NULL);
217
218 c.vp = vp;
219
220 /* Allocate the references to the uniforms that will end up in the
221 * prog_data associated with the compiled program, and which will be freed
222 * by the state cache.
223 */
224 int param_count;
225 if (vs) {
226 /* We add padding around uniform values below vec4 size, with the worst
227 * case being a float value that gets blown up to a vec4, so be
228 * conservative here.
229 */
230 param_count = vs->num_uniform_components * 4;
231
232 } else {
233 param_count = vp->program.Base.Parameters->NumParameters * 4;
234 }
235 /* vec4_visitor::setup_uniform_clipplane_values() also uploads user clip
236 * planes as uniforms.
237 */
238 param_count += c.key.base.nr_userclip_plane_consts * 4;
239
240 stage_prog_data->param =
241 rzalloc_array(NULL, const gl_constant_value *, param_count);
242 stage_prog_data->pull_param =
243 rzalloc_array(NULL, const gl_constant_value *, param_count);
244
245 /* Setting nr_params here NOT to the size of the param and pull_param
246 * arrays, but to the number of uniform components vec4_visitor
247 * needs. vec4_visitor::setup_uniforms() will set it back to a proper value.
248 */
249 stage_prog_data->nr_params = ALIGN(param_count, 4) / 4;
250 if (vs) {
251 stage_prog_data->nr_params += vs->num_samplers;
252 }
253
254 GLbitfield64 outputs_written = vp->program.Base.OutputsWritten;
255 prog_data.inputs_read = vp->program.Base.InputsRead;
256
257 if (c.key.copy_edgeflag) {
258 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
259 prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
260 }
261
262 if (brw->gen < 6) {
263 /* Put dummy slots into the VUE for the SF to put the replaced
264 * point sprite coords in. We shouldn't need these dummy slots,
265 * which take up precious URB space, but it would mean that the SF
266 * doesn't get nice aligned pairs of input coords into output
267 * coords, which would be a pain to handle.
268 */
269 for (i = 0; i < 8; i++) {
270 if (c.key.point_coord_replace & (1 << i))
271 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
272 }
273
274 /* if back colors are written, allocate slots for front colors too */
275 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0))
276 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0);
277 if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1))
278 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1);
279 }
280
281 /* In order for legacy clipping to work, we need to populate the clip
282 * distance varying slots whenever clipping is enabled, even if the vertex
283 * shader doesn't write to gl_ClipDistance.
284 */
285 if (c.key.base.userclip_active) {
286 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0);
287 outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1);
288 }
289
290 brw_compute_vue_map(brw, &prog_data.base.vue_map, outputs_written);
291
292 if (0) {
293 _mesa_fprint_program_opt(stderr, &c.vp->program.Base, PROG_PRINT_DEBUG,
294 true);
295 }
296
297 /* Emit GEN4 code.
298 */
299 program = brw_vs_emit(brw, prog, &c, &prog_data, mem_ctx, &program_size);
300 if (program == NULL) {
301 ralloc_free(mem_ctx);
302 return false;
303 }
304
305 /* Scratch space is used for register spilling */
306 if (c.base.last_scratch) {
307 perf_debug("Vertex shader triggered register spilling. "
308 "Try reducing the number of live vec4 values to "
309 "improve performance.\n");
310
311 prog_data.base.base.total_scratch
312 = brw_get_scratch_size(c.base.last_scratch*REG_SIZE);
313
314 brw_get_scratch_bo(brw, &brw->vs.base.scratch_bo,
315 prog_data.base.base.total_scratch *
316 brw->max_vs_threads);
317 }
318
319 brw_upload_cache(&brw->cache, BRW_CACHE_VS_PROG,
320 &c.key, sizeof(c.key),
321 program, program_size,
322 &prog_data, sizeof(prog_data),
323 &brw->vs.base.prog_offset, &brw->vs.prog_data);
324 ralloc_free(mem_ctx);
325
326 return true;
327 }
328
329 static bool
330 key_debug(struct brw_context *brw, const char *name, int a, int b)
331 {
332 if (a != b) {
333 perf_debug(" %s %d->%d\n", name, a, b);
334 return true;
335 }
336 return false;
337 }
338
339 void
340 brw_vs_debug_recompile(struct brw_context *brw,
341 struct gl_shader_program *prog,
342 const struct brw_vs_prog_key *key)
343 {
344 struct brw_cache_item *c = NULL;
345 const struct brw_vs_prog_key *old_key = NULL;
346 bool found = false;
347
348 perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
349
350 for (unsigned int i = 0; i < brw->cache.size; i++) {
351 for (c = brw->cache.items[i]; c; c = c->next) {
352 if (c->cache_id == BRW_CACHE_VS_PROG) {
353 old_key = c->key;
354
355 if (old_key->base.program_string_id == key->base.program_string_id)
356 break;
357 }
358 }
359 if (c)
360 break;
361 }
362
363 if (!c) {
364 perf_debug(" Didn't find previous compile in the shader cache for "
365 "debug\n");
366 return;
367 }
368
369 for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
370 found |= key_debug(brw, "Vertex attrib w/a flags",
371 old_key->gl_attrib_wa_flags[i],
372 key->gl_attrib_wa_flags[i]);
373 }
374
375 found |= key_debug(brw, "user clip flags",
376 old_key->base.userclip_active, key->base.userclip_active);
377
378 found |= key_debug(brw, "user clipping planes as push constants",
379 old_key->base.nr_userclip_plane_consts,
380 key->base.nr_userclip_plane_consts);
381
382 found |= key_debug(brw, "copy edgeflag",
383 old_key->copy_edgeflag, key->copy_edgeflag);
384 found |= key_debug(brw, "PointCoord replace",
385 old_key->point_coord_replace, key->point_coord_replace);
386 found |= key_debug(brw, "vertex color clamping",
387 old_key->clamp_vertex_color, key->clamp_vertex_color);
388
389 found |= brw_debug_recompile_sampler_key(brw, &old_key->base.tex,
390 &key->base.tex);
391
392 if (!found) {
393 perf_debug(" Something else\n");
394 }
395 }
396
397
398 void
399 brw_setup_vec4_key_clip_info(struct brw_context *brw,
400 struct brw_vec4_prog_key *key,
401 bool program_uses_clip_distance)
402 {
403 struct gl_context *ctx = &brw->ctx;
404
405 key->userclip_active = (ctx->Transform.ClipPlanesEnabled != 0);
406 if (key->userclip_active && !program_uses_clip_distance) {
407 key->nr_userclip_plane_consts
408 = _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
409 }
410 }
411
412
413 static void brw_upload_vs_prog(struct brw_context *brw)
414 {
415 struct gl_context *ctx = &brw->ctx;
416 struct brw_vs_prog_key key;
417 /* BRW_NEW_VERTEX_PROGRAM */
418 struct brw_vertex_program *vp =
419 (struct brw_vertex_program *)brw->vertex_program;
420 struct gl_program *prog = (struct gl_program *) brw->vertex_program;
421 int i;
422
423 memset(&key, 0, sizeof(key));
424
425 /* Just upload the program verbatim for now. Always send it all
426 * the inputs it asks for, whether they are varying or not.
427 */
428 key.base.program_string_id = vp->id;
429 brw_setup_vec4_key_clip_info(brw, &key.base,
430 vp->program.Base.UsesClipDistanceOut);
431
432 /* _NEW_POLYGON */
433 if (brw->gen < 6) {
434 key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
435 ctx->Polygon.BackMode != GL_FILL);
436 }
437
438 if (prog->OutputsWritten & (VARYING_BIT_COL0 | VARYING_BIT_COL1 |
439 VARYING_BIT_BFC0 | VARYING_BIT_BFC1)) {
440 /* _NEW_LIGHT | _NEW_BUFFERS */
441 key.clamp_vertex_color = ctx->Light._ClampVertexColor;
442 }
443
444 /* _NEW_POINT */
445 if (brw->gen < 6 && ctx->Point.PointSprite) {
446 for (i = 0; i < 8; i++) {
447 if (ctx->Point.CoordReplace[i])
448 key.point_coord_replace |= (1 << i);
449 }
450 }
451
452 /* _NEW_TEXTURE */
453 brw_populate_sampler_prog_key_data(ctx, prog, brw->vs.base.sampler_count,
454 &key.base.tex);
455
456 /* BRW_NEW_VERTICES */
457 if (brw->gen < 8 && !brw->is_haswell) {
458 /* Prior to Haswell, the hardware can't natively support GL_FIXED or
459 * 2_10_10_10_REV vertex formats. Set appropriate workaround flags.
460 */
461 for (i = 0; i < VERT_ATTRIB_MAX; i++) {
462 if (!(vp->program.Base.InputsRead & BITFIELD64_BIT(i)))
463 continue;
464
465 uint8_t wa_flags = 0;
466
467 switch (brw->vb.inputs[i].glarray->Type) {
468
469 case GL_FIXED:
470 wa_flags = brw->vb.inputs[i].glarray->Size;
471 break;
472
473 case GL_INT_2_10_10_10_REV:
474 wa_flags |= BRW_ATTRIB_WA_SIGN;
475 /* fallthough */
476
477 case GL_UNSIGNED_INT_2_10_10_10_REV:
478 if (brw->vb.inputs[i].glarray->Format == GL_BGRA)
479 wa_flags |= BRW_ATTRIB_WA_BGRA;
480
481 if (brw->vb.inputs[i].glarray->Normalized)
482 wa_flags |= BRW_ATTRIB_WA_NORMALIZE;
483 else if (!brw->vb.inputs[i].glarray->Integer)
484 wa_flags |= BRW_ATTRIB_WA_SCALE;
485
486 break;
487 }
488
489 key.gl_attrib_wa_flags[i] = wa_flags;
490 }
491 }
492
493 if (!brw_search_cache(&brw->cache, BRW_CACHE_VS_PROG,
494 &key, sizeof(key),
495 &brw->vs.base.prog_offset, &brw->vs.prog_data)) {
496 bool success =
497 do_vs_prog(brw, ctx->_Shader->CurrentProgram[MESA_SHADER_VERTEX], vp,
498 &key);
499 (void) success;
500 assert(success);
501 }
502 brw->vs.base.prog_data = &brw->vs.prog_data->base.base;
503
504 if (memcmp(&brw->vs.prog_data->base.vue_map, &brw->vue_map_geom_out,
505 sizeof(brw->vue_map_geom_out)) != 0) {
506 brw->vue_map_vs = brw->vs.prog_data->base.vue_map;
507 brw->state.dirty.brw |= BRW_NEW_VUE_MAP_VS;
508 if (brw->gen < 6) {
509 /* No geometry shader support, so the VS VUE map is the VUE map for
510 * the output of the "geometry" portion of the pipeline.
511 */
512 brw->vue_map_geom_out = brw->vue_map_vs;
513 brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT;
514 }
515 }
516 }
517
518 /* See brw_vs.c:
519 */
520 const struct brw_tracked_state brw_vs_prog = {
521 .dirty = {
522 .mesa = _NEW_BUFFERS |
523 _NEW_LIGHT |
524 _NEW_POINT |
525 _NEW_POLYGON |
526 _NEW_TEXTURE |
527 _NEW_TRANSFORM,
528 .brw = BRW_NEW_VERTEX_PROGRAM |
529 BRW_NEW_VERTICES,
530 },
531 .emit = brw_upload_vs_prog
532 };
533
534 bool
535 brw_vs_precompile(struct gl_context *ctx,
536 struct gl_shader_program *shader_prog,
537 struct gl_program *prog)
538 {
539 struct brw_context *brw = brw_context(ctx);
540 struct brw_vs_prog_key key;
541 uint32_t old_prog_offset = brw->vs.base.prog_offset;
542 struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
543 bool success;
544
545 struct gl_vertex_program *vp = (struct gl_vertex_program *) prog;
546 struct brw_vertex_program *bvp = brw_vertex_program(vp);
547
548 memset(&key, 0, sizeof(key));
549
550 brw_vec4_setup_prog_key_for_precompile(ctx, &key.base, bvp->id, &vp->Base);
551 key.clamp_vertex_color =
552 (prog->OutputsWritten & (VARYING_BIT_COL0 | VARYING_BIT_COL1 |
553 VARYING_BIT_BFC0 | VARYING_BIT_BFC1));
554
555 success = do_vs_prog(brw, shader_prog, bvp, &key);
556
557 brw->vs.base.prog_offset = old_prog_offset;
558 brw->vs.prog_data = old_prog_data;
559
560 return success;
561 }