2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
33 #include "main/compiler.h"
34 #include "brw_context.h"
37 #include "brw_state.h"
38 #include "program/prog_print.h"
39 #include "program/prog_parameter.h"
41 #include "glsl/ralloc.h"
43 static inline void assign_vue_slot(struct brw_vue_map
*vue_map
,
46 /* Make sure this varying hasn't been assigned a slot already */
47 assert (vue_map
->varying_to_slot
[varying
] == -1);
49 vue_map
->varying_to_slot
[varying
] = vue_map
->num_slots
;
50 vue_map
->slot_to_varying
[vue_map
->num_slots
++] = varying
;
54 * Compute the VUE map for vertex shader program.
56 * Note that consumers of this map using cache keys must include
57 * prog_data->userclip and prog_data->outputs_written in their key
58 * (generated by CACHE_NEW_VS_PROG).
61 brw_compute_vue_map(struct brw_context
*brw
, struct brw_vs_compile
*c
)
63 const struct intel_context
*intel
= &brw
->intel
;
64 struct brw_vue_map
*vue_map
= &c
->prog_data
.vue_map
;
65 GLbitfield64 outputs_written
= c
->prog_data
.outputs_written
;
68 vue_map
->num_slots
= 0;
69 for (i
= 0; i
< BRW_VARYING_SLOT_COUNT
; ++i
) {
70 vue_map
->varying_to_slot
[i
] = -1;
71 vue_map
->slot_to_varying
[i
] = BRW_VARYING_SLOT_COUNT
;
74 /* VUE header: format depends on chip generation and whether clipping is
79 /* There are 8 dwords in VUE header pre-Ironlake:
80 * dword 0-3 is indices, point width, clip flags.
81 * dword 4-7 is ndc position
82 * dword 8-11 is the first vertex data.
84 assign_vue_slot(vue_map
, VARYING_SLOT_PSIZ
);
85 assign_vue_slot(vue_map
, BRW_VARYING_SLOT_NDC
);
86 assign_vue_slot(vue_map
, VARYING_SLOT_POS
);
89 /* There are 20 DWs (D0-D19) in VUE header on Ironlake:
90 * dword 0-3 of the header is indices, point width, clip flags.
91 * dword 4-7 is the ndc position
92 * dword 8-11 of the vertex header is the 4D space position
93 * dword 12-19 of the vertex header is the user clip distance.
94 * dword 20-23 is a pad so that the vertex element data is aligned
95 * dword 24-27 is the first vertex data we fill.
97 * Note: future pipeline stages expect 4D space position to be
98 * contiguous with the other varyings, so we make dword 24-27 a
99 * duplicate copy of the 4D space position.
101 assign_vue_slot(vue_map
, VARYING_SLOT_PSIZ
);
102 assign_vue_slot(vue_map
, BRW_VARYING_SLOT_NDC
);
103 assign_vue_slot(vue_map
, BRW_VARYING_SLOT_POS_DUPLICATE
);
104 assign_vue_slot(vue_map
, VARYING_SLOT_CLIP_DIST0
);
105 assign_vue_slot(vue_map
, VARYING_SLOT_CLIP_DIST1
);
106 assign_vue_slot(vue_map
, BRW_VARYING_SLOT_PAD
);
107 assign_vue_slot(vue_map
, VARYING_SLOT_POS
);
111 /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
112 * dword 0-3 of the header is indices, point width, clip flags.
113 * dword 4-7 is the 4D space position
114 * dword 8-15 of the vertex header is the user clip distance if
116 * dword 8-11 or 16-19 is the first vertex element data we fill.
118 assign_vue_slot(vue_map
, VARYING_SLOT_PSIZ
);
119 assign_vue_slot(vue_map
, VARYING_SLOT_POS
);
120 if (c
->key
.userclip_active
) {
121 assign_vue_slot(vue_map
, VARYING_SLOT_CLIP_DIST0
);
122 assign_vue_slot(vue_map
, VARYING_SLOT_CLIP_DIST1
);
124 /* front and back colors need to be consecutive so that we can use
125 * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
128 if (outputs_written
& BITFIELD64_BIT(VARYING_SLOT_COL0
))
129 assign_vue_slot(vue_map
, VARYING_SLOT_COL0
);
130 if (outputs_written
& BITFIELD64_BIT(VARYING_SLOT_BFC0
))
131 assign_vue_slot(vue_map
, VARYING_SLOT_BFC0
);
132 if (outputs_written
& BITFIELD64_BIT(VARYING_SLOT_COL1
))
133 assign_vue_slot(vue_map
, VARYING_SLOT_COL1
);
134 if (outputs_written
& BITFIELD64_BIT(VARYING_SLOT_BFC1
))
135 assign_vue_slot(vue_map
, VARYING_SLOT_BFC1
);
138 assert (!"VUE map not known for this chip generation");
142 /* The hardware doesn't care about the rest of the vertex outputs, so just
143 * assign them contiguously. Don't reassign outputs that already have a
146 * Also, prior to Gen6, don't assign a slot for VARYING_SLOT_CLIP_VERTEX,
147 * since it is unsupported. In Gen6 and above, VARYING_SLOT_CLIP_VERTEX may
148 * be needed for transform feedback; since we don't want to have to
149 * recompute the VUE map (and everything that depends on it) when transform
150 * feedback is enabled or disabled, just go ahead and assign a slot for it.
152 for (int i
= 0; i
< VARYING_SLOT_MAX
; ++i
) {
153 if (intel
->gen
< 6 && i
== VARYING_SLOT_CLIP_VERTEX
)
155 if ((outputs_written
& BITFIELD64_BIT(i
)) &&
156 vue_map
->varying_to_slot
[i
] == -1) {
157 assign_vue_slot(vue_map
, i
);
164 * Decide which set of clip planes should be used when clipping via
165 * gl_Position or gl_ClipVertex.
167 gl_clip_plane
*brw_select_clip_planes(struct gl_context
*ctx
)
169 if (ctx
->Shader
.CurrentVertexProgram
) {
170 /* There is currently a GLSL vertex shader, so clip according to GLSL
171 * rules, which means compare gl_ClipVertex (or gl_Position, if
172 * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
173 * that were stored in EyeUserPlane at the time the clip planes were
176 return ctx
->Transform
.EyeUserPlane
;
178 /* Either we are using fixed function or an ARB vertex program. In
179 * either case the clip planes are going to be compared against
180 * gl_Position (which is in clip coordinates) so we have to clip using
181 * _ClipUserPlane, which was transformed into clip coordinates by Mesa
184 return ctx
->Transform
._ClipUserPlane
;
189 brw_vs_prog_data_compare(const void *in_a
, const void *in_b
,
190 int aux_size
, const void *in_key
)
192 const struct brw_vs_prog_data
*a
= in_a
;
193 const struct brw_vs_prog_data
*b
= in_b
;
195 /* Compare all the struct up to the pointers. */
196 if (memcmp(a
, b
, offsetof(struct brw_vs_prog_data
, param
)))
199 if (memcmp(a
->param
, b
->param
, a
->nr_params
* sizeof(void *)))
202 if (memcmp(a
->pull_param
, b
->pull_param
, a
->nr_pull_params
* sizeof(void *)))
209 do_vs_prog(struct brw_context
*brw
,
210 struct gl_shader_program
*prog
,
211 struct brw_vertex_program
*vp
,
212 struct brw_vs_prog_key
*key
)
214 struct intel_context
*intel
= &brw
->intel
;
216 const GLuint
*program
;
217 struct brw_vs_compile c
;
220 struct gl_shader
*vs
= NULL
;
223 vs
= prog
->_LinkedShaders
[MESA_SHADER_VERTEX
];
225 memset(&c
, 0, sizeof(c
));
226 memcpy(&c
.key
, key
, sizeof(*key
));
228 mem_ctx
= ralloc_context(NULL
);
232 /* Allocate the references to the uniforms that will end up in the
233 * prog_data associated with the compiled program, and which will be freed
234 * by the state cache.
238 /* We add padding around uniform values below vec4 size, with the worst
239 * case being a float value that gets blown up to a vec4, so be
242 param_count
= vs
->num_uniform_components
* 4;
245 param_count
= vp
->program
.Base
.Parameters
->NumParameters
* 4;
247 /* We also upload clip plane data as uniforms */
248 param_count
+= MAX_CLIP_PLANES
* 4;
250 c
.prog_data
.param
= rzalloc_array(NULL
, const float *, param_count
);
251 c
.prog_data
.pull_param
= rzalloc_array(NULL
, const float *, param_count
);
253 c
.prog_data
.outputs_written
= vp
->program
.Base
.OutputsWritten
;
254 c
.prog_data
.inputs_read
= vp
->program
.Base
.InputsRead
;
256 if (c
.key
.copy_edgeflag
) {
257 c
.prog_data
.outputs_written
|= BITFIELD64_BIT(VARYING_SLOT_EDGE
);
258 c
.prog_data
.inputs_read
|= VERT_BIT_EDGEFLAG
;
261 if (intel
->gen
< 6) {
262 /* Put dummy slots into the VUE for the SF to put the replaced
263 * point sprite coords in. We shouldn't need these dummy slots,
264 * which take up precious URB space, but it would mean that the SF
265 * doesn't get nice aligned pairs of input coords into output
266 * coords, which would be a pain to handle.
268 for (i
= 0; i
< 8; i
++) {
269 if (c
.key
.point_coord_replace
& (1 << i
))
270 c
.prog_data
.outputs_written
|= BITFIELD64_BIT(VARYING_SLOT_TEX0
+ i
);
274 brw_compute_vue_map(brw
, &c
);
277 _mesa_fprint_program_opt(stdout
, &c
.vp
->program
.Base
, PROG_PRINT_DEBUG
,
283 program
= brw_vs_emit(brw
, prog
, &c
, mem_ctx
, &program_size
);
284 if (program
== NULL
) {
285 ralloc_free(mem_ctx
);
289 if (c
.prog_data
.nr_pull_params
)
290 c
.prog_data
.num_surfaces
= 1;
291 if (c
.vp
->program
.Base
.SamplersUsed
)
292 c
.prog_data
.num_surfaces
= SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT
);
294 prog
->_LinkedShaders
[MESA_SHADER_VERTEX
]->NumUniformBlocks
) {
295 c
.prog_data
.num_surfaces
=
296 SURF_INDEX_VS_UBO(prog
->_LinkedShaders
[MESA_SHADER_VERTEX
]->NumUniformBlocks
);
299 /* Scratch space is used for register spilling */
300 if (c
.last_scratch
) {
301 perf_debug("Vertex shader triggered register spilling. "
302 "Try reducing the number of live vec4 values to "
303 "improve performance.\n");
305 c
.prog_data
.total_scratch
= brw_get_scratch_size(c
.last_scratch
*REG_SIZE
);
307 brw_get_scratch_bo(intel
, &brw
->vs
.scratch_bo
,
308 c
.prog_data
.total_scratch
* brw
->max_vs_threads
);
311 brw_upload_cache(&brw
->cache
, BRW_VS_PROG
,
312 &c
.key
, sizeof(c
.key
),
313 program
, program_size
,
314 &c
.prog_data
, sizeof(c
.prog_data
),
315 &brw
->vs
.prog_offset
, &brw
->vs
.prog_data
);
316 ralloc_free(mem_ctx
);
322 key_debug(struct intel_context
*intel
, const char *name
, int a
, int b
)
325 perf_debug(" %s %d->%d\n", name
, a
, b
);
332 brw_vs_debug_recompile(struct brw_context
*brw
,
333 struct gl_shader_program
*prog
,
334 const struct brw_vs_prog_key
*key
)
336 struct intel_context
*intel
= &brw
->intel
;
337 struct brw_cache_item
*c
= NULL
;
338 const struct brw_vs_prog_key
*old_key
= NULL
;
341 perf_debug("Recompiling vertex shader for program %d\n", prog
->Name
);
343 for (unsigned int i
= 0; i
< brw
->cache
.size
; i
++) {
344 for (c
= brw
->cache
.items
[i
]; c
; c
= c
->next
) {
345 if (c
->cache_id
== BRW_VS_PROG
) {
348 if (old_key
->program_string_id
== key
->program_string_id
)
357 perf_debug(" Didn't find previous compile in the shader cache for "
362 for (unsigned int i
= 0; i
< VERT_ATTRIB_MAX
; i
++) {
363 found
|= key_debug(intel
, "Vertex attrib w/a flags",
364 old_key
->gl_attrib_wa_flags
[i
],
365 key
->gl_attrib_wa_flags
[i
]);
368 found
|= key_debug(intel
, "user clip flags",
369 old_key
->userclip_active
, key
->userclip_active
);
371 found
|= key_debug(intel
, "user clipping planes as push constants",
372 old_key
->nr_userclip_plane_consts
,
373 key
->nr_userclip_plane_consts
);
375 found
|= key_debug(intel
, "clip distance enable",
376 old_key
->uses_clip_distance
, key
->uses_clip_distance
);
377 found
|= key_debug(intel
, "clip plane enable bitfield",
378 old_key
->userclip_planes_enabled_gen_4_5
,
379 key
->userclip_planes_enabled_gen_4_5
);
380 found
|= key_debug(intel
, "copy edgeflag",
381 old_key
->copy_edgeflag
, key
->copy_edgeflag
);
382 found
|= key_debug(intel
, "PointCoord replace",
383 old_key
->point_coord_replace
, key
->point_coord_replace
);
384 found
|= key_debug(intel
, "vertex color clamping",
385 old_key
->clamp_vertex_color
, key
->clamp_vertex_color
);
387 found
|= brw_debug_recompile_sampler_key(intel
, &old_key
->tex
, &key
->tex
);
390 perf_debug(" Something else\n");
394 static void brw_upload_vs_prog(struct brw_context
*brw
)
396 struct intel_context
*intel
= &brw
->intel
;
397 struct gl_context
*ctx
= &intel
->ctx
;
398 struct brw_vs_prog_key key
;
399 /* BRW_NEW_VERTEX_PROGRAM */
400 struct brw_vertex_program
*vp
=
401 (struct brw_vertex_program
*)brw
->vertex_program
;
402 struct gl_program
*prog
= (struct gl_program
*) brw
->vertex_program
;
405 memset(&key
, 0, sizeof(key
));
407 /* Just upload the program verbatim for now. Always send it all
408 * the inputs it asks for, whether they are varying or not.
410 key
.program_string_id
= vp
->id
;
411 key
.userclip_active
= (ctx
->Transform
.ClipPlanesEnabled
!= 0);
412 key
.uses_clip_distance
= vp
->program
.UsesClipDistance
;
413 if (key
.userclip_active
&& !key
.uses_clip_distance
) {
414 if (intel
->gen
< 6) {
415 key
.nr_userclip_plane_consts
416 = _mesa_bitcount_64(ctx
->Transform
.ClipPlanesEnabled
);
417 key
.userclip_planes_enabled_gen_4_5
418 = ctx
->Transform
.ClipPlanesEnabled
;
420 key
.nr_userclip_plane_consts
421 = _mesa_logbase2(ctx
->Transform
.ClipPlanesEnabled
) + 1;
426 if (intel
->gen
< 6) {
427 key
.copy_edgeflag
= (ctx
->Polygon
.FrontMode
!= GL_FILL
||
428 ctx
->Polygon
.BackMode
!= GL_FILL
);
431 /* _NEW_LIGHT | _NEW_BUFFERS */
432 key
.clamp_vertex_color
= ctx
->Light
._ClampVertexColor
;
435 if (intel
->gen
< 6 && ctx
->Point
.PointSprite
) {
436 for (i
= 0; i
< 8; i
++) {
437 if (ctx
->Point
.CoordReplace
[i
])
438 key
.point_coord_replace
|= (1 << i
);
443 brw_populate_sampler_prog_key_data(ctx
, prog
, &key
.tex
);
445 /* BRW_NEW_VERTICES */
446 if (intel
->gen
< 8 && !intel
->is_haswell
) {
447 /* Prior to Haswell, the hardware can't natively support GL_FIXED or
448 * 2_10_10_10_REV vertex formats. Set appropriate workaround flags.
450 for (i
= 0; i
< VERT_ATTRIB_MAX
; i
++) {
451 if (!(vp
->program
.Base
.InputsRead
& BITFIELD64_BIT(i
)))
454 uint8_t wa_flags
= 0;
456 switch (brw
->vb
.inputs
[i
].glarray
->Type
) {
459 wa_flags
= brw
->vb
.inputs
[i
].glarray
->Size
;
462 case GL_INT_2_10_10_10_REV
:
463 wa_flags
|= BRW_ATTRIB_WA_SIGN
;
466 case GL_UNSIGNED_INT_2_10_10_10_REV
:
467 if (brw
->vb
.inputs
[i
].glarray
->Format
== GL_BGRA
)
468 wa_flags
|= BRW_ATTRIB_WA_BGRA
;
470 if (brw
->vb
.inputs
[i
].glarray
->Normalized
)
471 wa_flags
|= BRW_ATTRIB_WA_NORMALIZE
;
472 else if (!brw
->vb
.inputs
[i
].glarray
->Integer
)
473 wa_flags
|= BRW_ATTRIB_WA_SCALE
;
478 key
.gl_attrib_wa_flags
[i
] = wa_flags
;
482 if (!brw_search_cache(&brw
->cache
, BRW_VS_PROG
,
484 &brw
->vs
.prog_offset
, &brw
->vs
.prog_data
)) {
485 bool success
= do_vs_prog(brw
, ctx
->Shader
.CurrentVertexProgram
,
494 const struct brw_tracked_state brw_vs_prog
= {
496 .mesa
= (_NEW_TRANSFORM
| _NEW_POLYGON
| _NEW_POINT
| _NEW_LIGHT
|
499 .brw
= (BRW_NEW_VERTEX_PROGRAM
|
503 .emit
= brw_upload_vs_prog
507 brw_vs_precompile(struct gl_context
*ctx
, struct gl_shader_program
*prog
)
509 struct brw_context
*brw
= brw_context(ctx
);
510 struct brw_vs_prog_key key
;
511 uint32_t old_prog_offset
= brw
->vs
.prog_offset
;
512 struct brw_vs_prog_data
*old_prog_data
= brw
->vs
.prog_data
;
515 if (!prog
->_LinkedShaders
[MESA_SHADER_VERTEX
])
518 struct gl_vertex_program
*vp
= (struct gl_vertex_program
*)
519 prog
->_LinkedShaders
[MESA_SHADER_VERTEX
]->Program
;
520 struct brw_vertex_program
*bvp
= brw_vertex_program(vp
);
522 memset(&key
, 0, sizeof(key
));
524 key
.program_string_id
= bvp
->id
;
525 key
.clamp_vertex_color
= true;
527 for (int i
= 0; i
< MAX_SAMPLERS
; i
++) {
528 if (vp
->Base
.ShadowSamplers
& (1 << i
)) {
529 /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
530 key
.tex
.swizzles
[i
] =
531 MAKE_SWIZZLE4(SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_X
, SWIZZLE_ONE
);
533 /* Color sampler: assume no swizzling. */
534 key
.tex
.swizzles
[i
] = SWIZZLE_XYZW
;
538 success
= do_vs_prog(brw
, prog
, bvp
, &key
);
540 brw
->vs
.prog_offset
= old_prog_offset
;
541 brw
->vs
.prog_data
= old_prog_data
;
547 brw_vs_prog_data_free(const void *in_prog_data
)
549 const struct brw_vs_prog_data
*prog_data
= in_prog_data
;
551 ralloc_free((void *)prog_data
->param
);
552 ralloc_free((void *)prog_data
->pull_param
);