src/mesa/drivers/dri/i965/brw_vs.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/compiler.h"
  34 #include "brw_context.h"
  35 #include "brw_vs.h"
  36 #include "brw_util.h"
  37 #include "brw_state.h"
  38 #include "program/prog_print.h"
  39 #include "program/prog_parameter.h"
  40
  41 #include "glsl/ralloc.h"
  42
  43 static inline void assign_vue_slot(struct brw_vue_map *vue_map,
  44                                    int vert_result)
  45 {
  46    /* Make sure this vert_result hasn't been assigned a slot already */
  47    assert (vue_map->vert_result_to_slot[vert_result] == -1);
  48
  49    vue_map->vert_result_to_slot[vert_result] = vue_map->num_slots;
  50    vue_map->slot_to_vert_result[vue_map->num_slots++] = vert_result;
  51 }
  52
  53 /**
  54  * Compute the VUE map for vertex shader program.
  55  *
  56  * Note that consumers of this map using cache keys must include
  57  * prog_data->userclip and prog_data->outputs_written in their key
  58  * (generated by CACHE_NEW_VS_PROG).
  59  */
  60 static void
  61 brw_compute_vue_map(struct brw_context *brw, struct brw_vs_compile *c)
  62 {
  63    const struct intel_context *intel = &brw->intel;
  64    struct brw_vue_map *vue_map = &c->prog_data.vue_map;
  65    GLbitfield64 outputs_written = c->prog_data.outputs_written;
  66    int i;
  67
  68    vue_map->num_slots = 0;
  69    for (i = 0; i < BRW_VERT_RESULT_MAX; ++i) {
  70       vue_map->vert_result_to_slot[i] = -1;
  71       vue_map->slot_to_vert_result[i] = BRW_VERT_RESULT_MAX;
  72    }
  73
  74    /* VUE header: format depends on chip generation and whether clipping is
  75     * enabled.
  76     */
  77    switch (intel->gen) {
  78    case 4:
  79       /* There are 8 dwords in VUE header pre-Ironlake:
  80        * dword 0-3 is indices, point width, clip flags.
  81        * dword 4-7 is ndc position
  82        * dword 8-11 is the first vertex data.
  83        */
  84       assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
  85       assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
  86       assign_vue_slot(vue_map, VERT_RESULT_HPOS);
  87       break;
  88    case 5:
  89       /* There are 20 DWs (D0-D19) in VUE header on Ironlake:
  90        * dword 0-3 of the header is indices, point width, clip flags.
  91        * dword 4-7 is the ndc position
  92        * dword 8-11 of the vertex header is the 4D space position
  93        * dword 12-19 of the vertex header is the user clip distance.
  94        * dword 20-23 is a pad so that the vertex element data is aligned
  95        * dword 24-27 is the first vertex data we fill.
  96        *
  97        * Note: future pipeline stages expect 4D space position to be
  98        * contiguous with the other vert_results, so we make dword 24-27 a
  99        * duplicate copy of the 4D space position.
 100        */
 101       assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
 102       assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
 103       assign_vue_slot(vue_map, BRW_VERT_RESULT_HPOS_DUPLICATE);
 104       assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
 105       assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
 106       assign_vue_slot(vue_map, BRW_VERT_RESULT_PAD);
 107       assign_vue_slot(vue_map, VERT_RESULT_HPOS);
 108       break;
 109    case 6:
 110    case 7:
 111       /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
 112        * dword 0-3 of the header is indices, point width, clip flags.
 113        * dword 4-7 is the 4D space position
 114        * dword 8-15 of the vertex header is the user clip distance if
 115        * enabled.
 116        * dword 8-11 or 16-19 is the first vertex element data we fill.
 117        */
 118       assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
 119       assign_vue_slot(vue_map, VERT_RESULT_HPOS);
 120       if (c->key.userclip_active) {
 121          assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
 122          assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
 123       }
 124       /* front and back colors need to be consecutive so that we can use
 125        * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
 126        * two-sided color.
 127        */
 128       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL0))
 129          assign_vue_slot(vue_map, VERT_RESULT_COL0);
 130       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC0))
 131          assign_vue_slot(vue_map, VERT_RESULT_BFC0);
 132       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL1))
 133          assign_vue_slot(vue_map, VERT_RESULT_COL1);
 134       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC1))
 135          assign_vue_slot(vue_map, VERT_RESULT_BFC1);
 136       break;
 137    default:
 138       assert (!"VUE map not known for this chip generation");
 139       break;
 140    }
 141
 142    /* The hardware doesn't care about the rest of the vertex outputs, so just
 143     * assign them contiguously.  Don't reassign outputs that already have a
 144     * slot.
 145     *
 146     * Also, prior to Gen6, don't assign a slot for VERT_RESULT_CLIP_VERTEX,
 147     * since it is unsupported.  In Gen6 and above, VERT_RESULT_CLIP_VERTEX may
 148     * be needed for transform feedback; since we don't want to have to
 149     * recompute the VUE map (and everything that depends on it) when transform
 150     * feedback is enabled or disabled, just go ahead and assign a slot for it.
 151     */
 152    for (int i = 0; i < VERT_RESULT_MAX; ++i) {
 153       if (intel->gen < 6 && i == VERT_RESULT_CLIP_VERTEX)
 154          continue;
 155       if ((outputs_written & BITFIELD64_BIT(i)) &&
 156           vue_map->vert_result_to_slot[i] == -1) {
 157          assign_vue_slot(vue_map, i);
 158       }
 159    }
 160 }
 161
 162
 163 /**
 164  * Decide which set of clip planes should be used when clipping via
 165  * gl_Position or gl_ClipVertex.
 166  */
 167 gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
 168 {
 169    if (ctx->Shader.CurrentVertexProgram) {
 170       /* There is currently a GLSL vertex shader, so clip according to GLSL
 171        * rules, which means compare gl_ClipVertex (or gl_Position, if
 172        * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
 173        * that were stored in EyeUserPlane at the time the clip planes were
 174        * specified.
 175        */
 176       return ctx->Transform.EyeUserPlane;
 177    } else {
 178       /* Either we are using fixed function or an ARB vertex program.  In
 179        * either case the clip planes are going to be compared against
 180        * gl_Position (which is in clip coordinates) so we have to clip using
 181        * _ClipUserPlane, which was transformed into clip coordinates by Mesa
 182        * core.
 183        */
 184       return ctx->Transform._ClipUserPlane;
 185    }
 186 }
 187
 188 bool
 189 brw_vs_prog_data_compare(const void *in_a, const void *in_b,
 190                          int aux_size, const void *in_key)
 191 {
 192    const struct brw_vs_prog_data *a = in_a;
 193    const struct brw_vs_prog_data *b = in_b;
 194
 195    /* Compare all the struct up to the pointers. */
 196    if (memcmp(a, b, offsetof(struct brw_vs_prog_data, param)))
 197       return false;
 198
 199    if (memcmp(a->param, b->param, a->nr_params * sizeof(void *)))
 200       return false;
 201
 202    if (memcmp(a->pull_param, b->pull_param, a->nr_pull_params * sizeof(void *)))
 203       return false;
 204
 205    return true;
 206 }
 207
 208 static bool
 209 do_vs_prog(struct brw_context *brw,
 210            struct gl_shader_program *prog,
 211            struct brw_vertex_program *vp,
 212            struct brw_vs_prog_key *key)
 213 {
 214    struct intel_context *intel = &brw->intel;
 215    GLuint program_size;
 216    const GLuint *program;
 217    struct brw_vs_compile c;
 218    void *mem_ctx;
 219    int i;
 220    struct gl_shader *vs = NULL;
 221
 222    if (prog)
 223       vs = prog->_LinkedShaders[MESA_SHADER_VERTEX];
 224
 225    memset(&c, 0, sizeof(c));
 226    memcpy(&c.key, key, sizeof(*key));
 227
 228    mem_ctx = ralloc_context(NULL);
 229
 230    c.vp = vp;
 231
 232    /* Allocate the references to the uniforms that will end up in the
 233     * prog_data associated with the compiled program, and which will be freed
 234     * by the state cache.
 235     */
 236    int param_count;
 237    if (vs) {
 238       /* We add padding around uniform values below vec4 size, with the worst
 239        * case being a float value that gets blown up to a vec4, so be
 240        * conservative here.
 241        */
 242       param_count = vs->num_uniform_components * 4;
 243
 244    } else {
 245       param_count = vp->program.Base.Parameters->NumParameters * 4;
 246    }
 247    /* We also upload clip plane data as uniforms */
 248    param_count += MAX_CLIP_PLANES * 4;
 249
 250    c.prog_data.param = rzalloc_array(NULL, const float *, param_count);
 251    c.prog_data.pull_param = rzalloc_array(NULL, const float *, param_count);
 252
 253    c.prog_data.outputs_written = vp->program.Base.OutputsWritten;
 254    c.prog_data.inputs_read = vp->program.Base.InputsRead;
 255
 256    if (c.key.copy_edgeflag) {
 257       c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_EDGE);
 258       c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
 259    }
 260
 261    /* Put dummy slots into the VUE for the SF to put the replaced
 262     * point sprite coords in.  We shouldn't need these dummy slots,
 263     * which take up precious URB space, but it would mean that the SF
 264     * doesn't get nice aligned pairs of input coords into output
 265     * coords, which would be a pain to handle.
 266     */
 267    for (i = 0; i < 8; i++) {
 268       if (c.key.point_coord_replace & (1 << i))
 269          c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_TEX0 + i);
 270    }
 271
 272    brw_compute_vue_map(brw, &c);
 273
 274    if (0) {
 275       _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG,
 276                                true);
 277    }
 278
 279    /* Emit GEN4 code.
 280     */
 281    program = brw_vs_emit(brw, prog, &c, mem_ctx, &program_size);
 282    if (program == NULL) {
 283       ralloc_free(mem_ctx);
 284       return false;
 285    }
 286
 287    if (c.prog_data.nr_pull_params)
 288       c.prog_data.num_surfaces = 1;
 289    if (c.vp->program.Base.SamplersUsed)
 290       c.prog_data.num_surfaces = SURF_INDEX_VS_TEXTURE(BRW_MAX_TEX_UNIT);
 291    if (prog &&
 292        prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks) {
 293       c.prog_data.num_surfaces =
 294          SURF_INDEX_VS_UBO(prog->_LinkedShaders[MESA_SHADER_VERTEX]->NumUniformBlocks);
 295    }
 296
 297    /* Scratch space is used for register spilling */
 298    if (c.last_scratch) {
 299       perf_debug("Vertex shader triggered register spilling.  "
 300                  "Try reducing the number of live vec4 values to "
 301                  "improve performance.\n");
 302
 303       c.prog_data.total_scratch = brw_get_scratch_size(c.last_scratch*REG_SIZE);
 304
 305       brw_get_scratch_bo(intel, &brw->vs.scratch_bo,
 306                          c.prog_data.total_scratch * brw->max_vs_threads);
 307    }
 308
 309    brw_upload_cache(&brw->cache, BRW_VS_PROG,
 310                     &c.key, sizeof(c.key),
 311                     program, program_size,
 312                     &c.prog_data, sizeof(c.prog_data),
 313                     &brw->vs.prog_offset, &brw->vs.prog_data);
 314    ralloc_free(mem_ctx);
 315
 316    return true;
 317 }
 318
 319 static bool
 320 key_debug(const char *name, int a, int b)
 321 {
 322    if (a != b) {
 323       perf_debug("  %s %d->%d\n", name, a, b);
 324       return true;
 325    }
 326    return false;
 327 }
 328
 329 void
 330 brw_vs_debug_recompile(struct brw_context *brw,
 331                        struct gl_shader_program *prog,
 332                        const struct brw_vs_prog_key *key)
 333 {
 334    struct brw_cache_item *c = NULL;
 335    const struct brw_vs_prog_key *old_key = NULL;
 336    bool found = false;
 337
 338    perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
 339
 340    for (unsigned int i = 0; i < brw->cache.size; i++) {
 341       for (c = brw->cache.items[i]; c; c = c->next) {
 342          if (c->cache_id == BRW_VS_PROG) {
 343             old_key = c->key;
 344
 345             if (old_key->program_string_id == key->program_string_id)
 346                break;
 347          }
 348       }
 349       if (c)
 350          break;
 351    }
 352
 353    if (!c) {
 354       perf_debug("  Didn't find previous compile in the shader cache for "
 355                  "debug\n");
 356       return;
 357    }
 358
 359    for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
 360       found |= key_debug("Vertex attrib w/a flags",
 361                          old_key->gl_attrib_wa_flags[i],
 362                          key->gl_attrib_wa_flags[i]);
 363    }
 364
 365    found |= key_debug("user clip flags",
 366                       old_key->userclip_active, key->userclip_active);
 367
 368    found |= key_debug("user clipping planes as push constants",
 369                       old_key->nr_userclip_plane_consts,
 370                       key->nr_userclip_plane_consts);
 371
 372    found |= key_debug("clip distance enable",
 373                       old_key->uses_clip_distance, key->uses_clip_distance);
 374    found |= key_debug("clip plane enable bitfield",
 375                       old_key->userclip_planes_enabled_gen_4_5,
 376                       key->userclip_planes_enabled_gen_4_5);
 377    found |= key_debug("copy edgeflag",
 378                       old_key->copy_edgeflag, key->copy_edgeflag);
 379    found |= key_debug("PointCoord replace",
 380                       old_key->point_coord_replace, key->point_coord_replace);
 381    found |= key_debug("vertex color clamping",
 382                       old_key->clamp_vertex_color, key->clamp_vertex_color);
 383
 384    found |= brw_debug_recompile_sampler_key(&old_key->tex, &key->tex);
 385
 386    if (!found) {
 387       perf_debug("  Something else\n");
 388    }
 389 }
 390
 391 static void brw_upload_vs_prog(struct brw_context *brw)
 392 {
 393    struct intel_context *intel = &brw->intel;
 394    struct gl_context *ctx = &intel->ctx;
 395    struct brw_vs_prog_key key;
 396    /* BRW_NEW_VERTEX_PROGRAM */
 397    struct brw_vertex_program *vp =
 398       (struct brw_vertex_program *)brw->vertex_program;
 399    struct gl_program *prog = (struct gl_program *) brw->vertex_program;
 400    int i;
 401
 402    memset(&key, 0, sizeof(key));
 403
 404    /* Just upload the program verbatim for now.  Always send it all
 405     * the inputs it asks for, whether they are varying or not.
 406     */
 407    key.program_string_id = vp->id;
 408    key.userclip_active = (ctx->Transform.ClipPlanesEnabled != 0);
 409    key.uses_clip_distance = vp->program.UsesClipDistance;
 410    if (key.userclip_active && !key.uses_clip_distance) {
 411       if (intel->gen < 6) {
 412          key.nr_userclip_plane_consts
 413             = _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled);
 414          key.userclip_planes_enabled_gen_4_5
 415             = ctx->Transform.ClipPlanesEnabled;
 416       } else {
 417          key.nr_userclip_plane_consts
 418             = _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
 419       }
 420    }
 421
 422    /* _NEW_POLYGON */
 423    if (intel->gen < 6) {
 424       key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
 425                            ctx->Polygon.BackMode != GL_FILL);
 426    }
 427
 428    /* _NEW_LIGHT | _NEW_BUFFERS */
 429    key.clamp_vertex_color = ctx->Light._ClampVertexColor;
 430
 431    /* _NEW_POINT */
 432    if (ctx->Point.PointSprite) {
 433       for (i = 0; i < 8; i++) {
 434          if (ctx->Point.CoordReplace[i])
 435             key.point_coord_replace |= (1 << i);
 436       }
 437    }
 438
 439    /* _NEW_TEXTURE */
 440    brw_populate_sampler_prog_key_data(ctx, prog, &key.tex);
 441
 442    /* BRW_NEW_VERTICES */
 443    if (intel->gen < 8 && !intel->is_haswell) {
 444       /* Prior to Haswell, the hardware can't natively support GL_FIXED or
 445        * 2_10_10_10_REV vertex formats.  Set appropriate workaround flags.
 446        */
 447       for (i = 0; i < VERT_ATTRIB_MAX; i++) {
 448          if (!(vp->program.Base.InputsRead & BITFIELD64_BIT(i)))
 449             continue;
 450
 451          uint8_t wa_flags = 0;
 452
 453          switch (brw->vb.inputs[i].glarray->Type) {
 454
 455          case GL_FIXED:
 456             wa_flags = brw->vb.inputs[i].glarray->Size;
 457             break;
 458
 459          case GL_INT_2_10_10_10_REV:
 460             wa_flags |= BRW_ATTRIB_WA_SIGN;
 461             /* fallthough */
 462
 463          case GL_UNSIGNED_INT_2_10_10_10_REV:
 464             if (brw->vb.inputs[i].glarray->Format == GL_BGRA)
 465                wa_flags |= BRW_ATTRIB_WA_BGRA;
 466
 467             if (brw->vb.inputs[i].glarray->Normalized)
 468                wa_flags |= BRW_ATTRIB_WA_NORMALIZE;
 469             else if (!brw->vb.inputs[i].glarray->Integer)
 470                wa_flags |= BRW_ATTRIB_WA_SCALE;
 471
 472             break;
 473          }
 474
 475          key.gl_attrib_wa_flags[i] = wa_flags;
 476       }
 477    }
 478
 479    if (!brw_search_cache(&brw->cache, BRW_VS_PROG,
 480                          &key, sizeof(key),
 481                          &brw->vs.prog_offset, &brw->vs.prog_data)) {
 482       bool success = do_vs_prog(brw, ctx->Shader.CurrentVertexProgram,
 483                                 vp, &key);
 484
 485       assert(success);
 486    }
 487 }
 488
 489 /* See brw_vs.c:
 490  */
 491 const struct brw_tracked_state brw_vs_prog = {
 492    .dirty = {
 493       .mesa  = (_NEW_TRANSFORM | _NEW_POLYGON | _NEW_POINT | _NEW_LIGHT |
 494                 _NEW_TEXTURE |
 495                 _NEW_BUFFERS),
 496       .brw   = (BRW_NEW_VERTEX_PROGRAM |
 497                 BRW_NEW_VERTICES),
 498       .cache = 0
 499    },
 500    .emit = brw_upload_vs_prog
 501 };
 502
 503 bool
 504 brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
 505 {
 506    struct brw_context *brw = brw_context(ctx);
 507    struct brw_vs_prog_key key;
 508    uint32_t old_prog_offset = brw->vs.prog_offset;
 509    struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
 510    bool success;
 511
 512    if (!prog->_LinkedShaders[MESA_SHADER_VERTEX])
 513       return true;
 514
 515    struct gl_vertex_program *vp = (struct gl_vertex_program *)
 516       prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program;
 517    struct brw_vertex_program *bvp = brw_vertex_program(vp);
 518
 519    memset(&key, 0, sizeof(key));
 520
 521    key.program_string_id = bvp->id;
 522    key.clamp_vertex_color = true;
 523
 524    for (int i = 0; i < MAX_SAMPLERS; i++) {
 525       if (vp->Base.ShadowSamplers & (1 << i)) {
 526          /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
 527          key.tex.swizzles[i] =
 528             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE);
 529       } else {
 530          /* Color sampler: assume no swizzling. */
 531          key.tex.swizzles[i] = SWIZZLE_XYZW;
 532       }
 533    }
 534
 535    success = do_vs_prog(brw, prog, bvp, &key);
 536
 537    brw->vs.prog_offset = old_prog_offset;
 538    brw->vs.prog_data = old_prog_data;
 539
 540    return success;
 541 }
 542
 543 void
 544 brw_vs_prog_data_free(const void *in_prog_data)
 545 {
 546    const struct brw_vs_prog_data *prog_data = in_prog_data;
 547
 548    ralloc_free((void *)prog_data->param);
 549    ralloc_free((void *)prog_data->pull_param);
 550 }