src/mesa/drivers/dri/i965/brw_vs.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/compiler.h"
  34 #include "brw_context.h"
  35 #include "brw_vs.h"
  36 #include "brw_util.h"
  37 #include "brw_state.h"
  38 #include "program/prog_print.h"
  39 #include "program/prog_parameter.h"
  40
  41 #include "glsl/ralloc.h"
  42
  43 static inline void assign_vue_slot(struct brw_vue_map *vue_map,
  44                                    int vert_result)
  45 {
  46    /* Make sure this vert_result hasn't been assigned a slot already */
  47    assert (vue_map->vert_result_to_slot[vert_result] == -1);
  48
  49    vue_map->vert_result_to_slot[vert_result] = vue_map->num_slots;
  50    vue_map->slot_to_vert_result[vue_map->num_slots++] = vert_result;
  51 }
  52
  53 /**
  54  * Compute the VUE map for vertex shader program.
  55  */
  56 void
  57 brw_compute_vue_map(struct brw_vue_map *vue_map,
  58                     const struct intel_context *intel,
  59                     bool userclip_active,
  60                     GLbitfield64 outputs_written)
  61 {
  62    int i;
  63
  64    vue_map->num_slots = 0;
  65    for (i = 0; i < BRW_VERT_RESULT_MAX; ++i) {
  66       vue_map->vert_result_to_slot[i] = -1;
  67       vue_map->slot_to_vert_result[i] = BRW_VERT_RESULT_MAX;
  68    }
  69
  70    /* VUE header: format depends on chip generation and whether clipping is
  71     * enabled.
  72     */
  73    switch (intel->gen) {
  74    case 4:
  75       /* There are 8 dwords in VUE header pre-Ironlake:
  76        * dword 0-3 is indices, point width, clip flags.
  77        * dword 4-7 is ndc position
  78        * dword 8-11 is the first vertex data.
  79        */
  80       assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
  81       assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
  82       assign_vue_slot(vue_map, VERT_RESULT_HPOS);
  83       break;
  84    case 5:
  85       /* There are 20 DWs (D0-D19) in VUE header on Ironlake:
  86        * dword 0-3 of the header is indices, point width, clip flags.
  87        * dword 4-7 is the ndc position
  88        * dword 8-11 of the vertex header is the 4D space position
  89        * dword 12-19 of the vertex header is the user clip distance.
  90        * dword 20-23 is a pad so that the vertex element data is aligned
  91        * dword 24-27 is the first vertex data we fill.
  92        *
  93        * Note: future pipeline stages expect 4D space position to be
  94        * contiguous with the other vert_results, so we make dword 24-27 a
  95        * duplicate copy of the 4D space position.
  96        */
  97       assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
  98       assign_vue_slot(vue_map, BRW_VERT_RESULT_NDC);
  99       assign_vue_slot(vue_map, BRW_VERT_RESULT_HPOS_DUPLICATE);
 100       assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
 101       assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
 102       assign_vue_slot(vue_map, BRW_VERT_RESULT_PAD);
 103       assign_vue_slot(vue_map, VERT_RESULT_HPOS);
 104       break;
 105    case 6:
 106    case 7:
 107       /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
 108        * dword 0-3 of the header is indices, point width, clip flags.
 109        * dword 4-7 is the 4D space position
 110        * dword 8-15 of the vertex header is the user clip distance if
 111        * enabled.
 112        * dword 8-11 or 16-19 is the first vertex element data we fill.
 113        */
 114       assign_vue_slot(vue_map, VERT_RESULT_PSIZ);
 115       assign_vue_slot(vue_map, VERT_RESULT_HPOS);
 116       if (userclip_active) {
 117          assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST0);
 118          assign_vue_slot(vue_map, VERT_RESULT_CLIP_DIST1);
 119       }
 120       /* front and back colors need to be consecutive so that we can use
 121        * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
 122        * two-sided color.
 123        */
 124       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL0))
 125          assign_vue_slot(vue_map, VERT_RESULT_COL0);
 126       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC0))
 127          assign_vue_slot(vue_map, VERT_RESULT_BFC0);
 128       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_COL1))
 129          assign_vue_slot(vue_map, VERT_RESULT_COL1);
 130       if (outputs_written & BITFIELD64_BIT(VERT_RESULT_BFC1))
 131          assign_vue_slot(vue_map, VERT_RESULT_BFC1);
 132       break;
 133    default:
 134       assert (!"VUE map not known for this chip generation");
 135       break;
 136    }
 137
 138    /* The hardware doesn't care about the rest of the vertex outputs, so just
 139     * assign them contiguously.  Don't reassign outputs that already have a
 140     * slot.
 141     *
 142     * Also, prior to Gen6, don't assign a slot for VERT_RESULT_CLIP_VERTEX,
 143     * since it is unsupported.  In Gen6 and above, VERT_RESULT_CLIP_VERTEX may
 144     * be needed for transform feedback; since we don't want to have to
 145     * recompute the VUE map (and everything that depends on it) when transform
 146     * feedback is enabled or disabled, just go ahead and assign a slot for it.
 147     */
 148    for (int i = 0; i < VERT_RESULT_MAX; ++i) {
 149       if (intel->gen < 6 && i == VERT_RESULT_CLIP_VERTEX)
 150          continue;
 151       if ((outputs_written & BITFIELD64_BIT(i)) &&
 152           vue_map->vert_result_to_slot[i] == -1) {
 153          assign_vue_slot(vue_map, i);
 154       }
 155    }
 156 }
 157
 158
 159 /**
 160  * Decide which set of clip planes should be used when clipping via
 161  * gl_Position or gl_ClipVertex.
 162  */
 163 gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
 164 {
 165    if (ctx->Shader.CurrentVertexProgram) {
 166       /* There is currently a GLSL vertex shader, so clip according to GLSL
 167        * rules, which means compare gl_ClipVertex (or gl_Position, if
 168        * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
 169        * that were stored in EyeUserPlane at the time the clip planes were
 170        * specified.
 171        */
 172       return ctx->Transform.EyeUserPlane;
 173    } else {
 174       /* Either we are using fixed function or an ARB vertex program.  In
 175        * either case the clip planes are going to be compared against
 176        * gl_Position (which is in clip coordinates) so we have to clip using
 177        * _ClipUserPlane, which was transformed into clip coordinates by Mesa
 178        * core.
 179        */
 180       return ctx->Transform._ClipUserPlane;
 181    }
 182 }
 183
 184
 185 static bool
 186 do_vs_prog(struct brw_context *brw,
 187            struct gl_shader_program *prog,
 188            struct brw_vertex_program *vp,
 189            struct brw_vs_prog_key *key)
 190 {
 191    struct gl_context *ctx = &brw->intel.ctx;
 192    struct intel_context *intel = &brw->intel;
 193    GLuint program_size;
 194    const GLuint *program;
 195    struct brw_vs_compile c;
 196    void *mem_ctx;
 197    int aux_size;
 198    int i;
 199
 200    memset(&c, 0, sizeof(c));
 201    memcpy(&c.key, key, sizeof(*key));
 202
 203    mem_ctx = ralloc_context(NULL);
 204
 205    brw_init_compile(brw, &c.func, mem_ctx);
 206    c.vp = vp;
 207
 208    c.prog_data.outputs_written = vp->program.Base.OutputsWritten;
 209    c.prog_data.inputs_read = vp->program.Base.InputsRead;
 210
 211    if (c.key.copy_edgeflag) {
 212       c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_EDGE);
 213       c.prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
 214    }
 215
 216    /* Put dummy slots into the VUE for the SF to put the replaced
 217     * point sprite coords in.  We shouldn't need these dummy slots,
 218     * which take up precious URB space, but it would mean that the SF
 219     * doesn't get nice aligned pairs of input coords into output
 220     * coords, which would be a pain to handle.
 221     */
 222    for (i = 0; i < 8; i++) {
 223       if (c.key.point_coord_replace & (1 << i))
 224          c.prog_data.outputs_written |= BITFIELD64_BIT(VERT_RESULT_TEX0 + i);
 225    }
 226
 227    if (0) {
 228       _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG,
 229                                true);
 230    }
 231
 232    /* Emit GEN4 code.
 233     */
 234    if (prog) {
 235       if (!brw_vs_emit(prog, &c)) {
 236          ralloc_free(mem_ctx);
 237          return false;
 238       }
 239    } else {
 240       brw_old_vs_emit(&c);
 241    }
 242
 243    /* Scratch space is used for register spilling */
 244    if (c.last_scratch) {
 245       c.prog_data.total_scratch = brw_get_scratch_size(c.last_scratch);
 246
 247       brw_get_scratch_bo(intel, &brw->vs.scratch_bo,
 248                          c.prog_data.total_scratch * brw->max_vs_threads);
 249    }
 250
 251    /* get the program
 252     */
 253    program = brw_get_program(&c.func, &program_size);
 254
 255    /* We upload from &c.prog_data including the constant_map assuming
 256     * they're packed together.  It would be nice to have a
 257     * compile-time assert macro here.
 258     */
 259    assert(c.constant_map == (int8_t *)&c.prog_data +
 260           sizeof(c.prog_data));
 261    assert(ctx->Const.VertexProgram.MaxNativeParameters ==
 262           ARRAY_SIZE(c.constant_map));
 263    (void) ctx;
 264
 265    aux_size = sizeof(c.prog_data);
 266    /* constant_map */
 267    aux_size += c.vp->program.Base.Parameters->NumParameters;
 268
 269    brw_upload_cache(&brw->cache, BRW_VS_PROG,
 270                     &c.key, sizeof(c.key),
 271                     program, program_size,
 272                     &c.prog_data, aux_size,
 273                     &brw->vs.prog_offset, &brw->vs.prog_data);
 274    ralloc_free(mem_ctx);
 275
 276    return true;
 277 }
 278
 279
 280 static void brw_upload_vs_prog(struct brw_context *brw)
 281 {
 282    struct intel_context *intel = &brw->intel;
 283    struct gl_context *ctx = &intel->ctx;
 284    struct brw_vs_prog_key key;
 285    /* BRW_NEW_VERTEX_PROGRAM */
 286    struct brw_vertex_program *vp =
 287       (struct brw_vertex_program *)brw->vertex_program;
 288    struct gl_program *prog = (struct gl_program *) brw->vertex_program;
 289    int i;
 290
 291    memset(&key, 0, sizeof(key));
 292
 293    /* Just upload the program verbatim for now.  Always send it all
 294     * the inputs it asks for, whether they are varying or not.
 295     */
 296    key.program_string_id = vp->id;
 297    key.userclip_active = (ctx->Transform.ClipPlanesEnabled != 0);
 298    key.uses_clip_distance = vp->program.UsesClipDistance;
 299    if (key.userclip_active && !key.uses_clip_distance) {
 300       if (intel->gen < 6) {
 301          key.nr_userclip_plane_consts
 302             = _mesa_bitcount_64(ctx->Transform.ClipPlanesEnabled);
 303          key.userclip_planes_enabled_gen_4_5
 304             = ctx->Transform.ClipPlanesEnabled;
 305       } else {
 306          key.nr_userclip_plane_consts
 307             = _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
 308       }
 309    }
 310    key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
 311                         ctx->Polygon.BackMode != GL_FILL);
 312
 313    /* _NEW_LIGHT | _NEW_BUFFERS */
 314    key.clamp_vertex_color = ctx->Light._ClampVertexColor;
 315
 316    /* _NEW_POINT */
 317    if (ctx->Point.PointSprite) {
 318       for (i = 0; i < 8; i++) {
 319          if (ctx->Point.CoordReplace[i])
 320             key.point_coord_replace |= (1 << i);
 321       }
 322    }
 323
 324    /* _NEW_TEXTURE */
 325    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 326       if (prog->TexturesUsed[i])
 327          brw_populate_sampler_prog_key_data(ctx, &key.tex, i);
 328    }
 329
 330    /* BRW_NEW_VERTICES */
 331    for (i = 0; i < VERT_ATTRIB_MAX; i++) {
 332       if (vp->program.Base.InputsRead & BITFIELD64_BIT(i) &&
 333           brw->vb.inputs[i].glarray->Type == GL_FIXED) {
 334          key.gl_fixed_input_size[i] = brw->vb.inputs[i].glarray->Size;
 335       }
 336    }
 337
 338    if (!brw_search_cache(&brw->cache, BRW_VS_PROG,
 339                          &key, sizeof(key),
 340                          &brw->vs.prog_offset, &brw->vs.prog_data)) {
 341       bool success = do_vs_prog(brw, ctx->Shader.CurrentVertexProgram,
 342                                 vp, &key);
 343
 344       assert(success);
 345    }
 346    brw->vs.constant_map = ((int8_t *)brw->vs.prog_data +
 347                            sizeof(*brw->vs.prog_data));
 348 }
 349
 350 /* See brw_vs.c:
 351  */
 352 const struct brw_tracked_state brw_vs_prog = {
 353    .dirty = {
 354       .mesa  = (_NEW_TRANSFORM | _NEW_POLYGON | _NEW_POINT | _NEW_LIGHT |
 355                 _NEW_TEXTURE |
 356                 _NEW_BUFFERS),
 357       .brw   = (BRW_NEW_VERTEX_PROGRAM |
 358                 BRW_NEW_VERTICES),
 359       .cache = 0
 360    },
 361    .emit = brw_upload_vs_prog
 362 };
 363
 364 bool
 365 brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
 366 {
 367    struct brw_context *brw = brw_context(ctx);
 368    struct brw_vs_prog_key key;
 369    uint32_t old_prog_offset = brw->vs.prog_offset;
 370    struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
 371    bool success;
 372
 373    if (!prog->_LinkedShaders[MESA_SHADER_VERTEX])
 374       return true;
 375
 376    struct gl_vertex_program *vp = (struct gl_vertex_program *)
 377       prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program;
 378    struct brw_vertex_program *bvp = brw_vertex_program(vp);
 379
 380    memset(&key, 0, sizeof(key));
 381
 382    key.program_string_id = bvp->id;
 383    key.clamp_vertex_color = true;
 384
 385    success = do_vs_prog(brw, prog, bvp, &key);
 386
 387    brw->vs.prog_offset = old_prog_offset;
 388    brw->vs.prog_data = old_prog_data;
 389
 390    return success;
 391 }