src/mesa/drivers/dri/i965/brw_vs.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #include "main/compiler.h"
  34 #include "brw_context.h"
  35 #include "brw_vs.h"
  36 #include "brw_util.h"
  37 #include "brw_state.h"
  38 #include "program/prog_print.h"
  39 #include "program/prog_parameter.h"
  40
  41 #include "glsl/ralloc.h"
  42
  43 static inline void assign_vue_slot(struct brw_vue_map *vue_map,
  44                                    int varying)
  45 {
  46    /* Make sure this varying hasn't been assigned a slot already */
  47    assert (vue_map->varying_to_slot[varying] == -1);
  48
  49    vue_map->varying_to_slot[varying] = vue_map->num_slots;
  50    vue_map->slot_to_varying[vue_map->num_slots++] = varying;
  51 }
  52
  53 /**
  54  * Compute the VUE map for vertex shader program.
  55  */
  56 void
  57 brw_compute_vue_map(struct brw_context *brw, struct brw_vue_map *vue_map,
  58                     GLbitfield64 slots_valid)
  59 {
  60    vue_map->slots_valid = slots_valid;
  61    int i;
  62
  63    /* gl_Layer doesn't get its own varying slot--it's stored in the virst VUE
  64     * slot (VARYING_SLOT_PSIZ).
  65     */
  66    slots_valid &= ~VARYING_BIT_LAYER;
  67
  68    /* Make sure that the values we store in vue_map->varying_to_slot and
  69     * vue_map->slot_to_varying won't overflow the signed chars that are used
  70     * to store them.  Note that since vue_map->slot_to_varying sometimes holds
  71     * values equal to BRW_VARYING_SLOT_COUNT, we need to ensure that
  72     * BRW_VARYING_SLOT_COUNT is <= 127, not 128.
  73     */
  74    STATIC_ASSERT(BRW_VARYING_SLOT_COUNT <= 127);
  75
  76    vue_map->num_slots = 0;
  77    for (i = 0; i < BRW_VARYING_SLOT_COUNT; ++i) {
  78       vue_map->varying_to_slot[i] = -1;
  79       vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_COUNT;
  80    }
  81
  82    /* VUE header: format depends on chip generation and whether clipping is
  83     * enabled.
  84     */
  85    switch (brw->gen) {
  86    case 4:
  87    case 5:
  88       /* There are 8 dwords in VUE header pre-Ironlake:
  89        * dword 0-3 is indices, point width, clip flags.
  90        * dword 4-7 is ndc position
  91        * dword 8-11 is the first vertex data.
  92        *
  93        * On Ironlake the VUE header is nominally 20 dwords, but the hardware
  94        * will accept the same header layout as Gen4 [and should be a bit faster]
  95        */
  96       assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
  97       assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC);
  98       assign_vue_slot(vue_map, VARYING_SLOT_POS);
  99       break;
 100    case 6:
 101    case 7:
 102       /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
 103        * dword 0-3 of the header is indices, point width, clip flags.
 104        * dword 4-7 is the 4D space position
 105        * dword 8-15 of the vertex header is the user clip distance if
 106        * enabled.
 107        * dword 8-11 or 16-19 is the first vertex element data we fill.
 108        */
 109       assign_vue_slot(vue_map, VARYING_SLOT_PSIZ);
 110       assign_vue_slot(vue_map, VARYING_SLOT_POS);
 111       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0))
 112          assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0);
 113       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1))
 114          assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1);
 115
 116       /* front and back colors need to be consecutive so that we can use
 117        * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
 118        * two-sided color.
 119        */
 120       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0))
 121          assign_vue_slot(vue_map, VARYING_SLOT_COL0);
 122       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0))
 123          assign_vue_slot(vue_map, VARYING_SLOT_BFC0);
 124       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1))
 125          assign_vue_slot(vue_map, VARYING_SLOT_COL1);
 126       if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1))
 127          assign_vue_slot(vue_map, VARYING_SLOT_BFC1);
 128       break;
 129    default:
 130       assert (!"VUE map not known for this chip generation");
 131       break;
 132    }
 133
 134    /* The hardware doesn't care about the rest of the vertex outputs, so just
 135     * assign them contiguously.  Don't reassign outputs that already have a
 136     * slot.
 137     *
 138     * We generally don't need to assign a slot for VARYING_SLOT_CLIP_VERTEX,
 139     * since it's encoded as the clip distances by emit_clip_distances().
 140     * However, it may be output by transform feedback, and we'd rather not
 141     * recompute state when TF changes, so we just always include it.
 142     */
 143    for (int i = 0; i < VARYING_SLOT_MAX; ++i) {
 144       if ((slots_valid & BITFIELD64_BIT(i)) &&
 145           vue_map->varying_to_slot[i] == -1) {
 146          assign_vue_slot(vue_map, i);
 147       }
 148    }
 149 }
 150
 151
 152 /**
 153  * Decide which set of clip planes should be used when clipping via
 154  * gl_Position or gl_ClipVertex.
 155  */
 156 gl_clip_plane *brw_select_clip_planes(struct gl_context *ctx)
 157 {
 158    if (ctx->Shader.CurrentVertexProgram) {
 159       /* There is currently a GLSL vertex shader, so clip according to GLSL
 160        * rules, which means compare gl_ClipVertex (or gl_Position, if
 161        * gl_ClipVertex wasn't assigned) against the eye-coordinate clip planes
 162        * that were stored in EyeUserPlane at the time the clip planes were
 163        * specified.
 164        */
 165       return ctx->Transform.EyeUserPlane;
 166    } else {
 167       /* Either we are using fixed function or an ARB vertex program.  In
 168        * either case the clip planes are going to be compared against
 169        * gl_Position (which is in clip coordinates) so we have to clip using
 170        * _ClipUserPlane, which was transformed into clip coordinates by Mesa
 171        * core.
 172        */
 173       return ctx->Transform._ClipUserPlane;
 174    }
 175 }
 176
 177
 178 bool
 179 brw_vs_prog_data_compare(const void *in_a, const void *in_b,
 180                          int aux_size, const void *in_key)
 181 {
 182    const struct brw_vs_prog_data *a = in_a;
 183    const struct brw_vs_prog_data *b = in_b;
 184
 185    /* Compare the base vec4 structure. */
 186    if (!brw_vec4_prog_data_compare(&a->base, &b->base))
 187       return false;
 188
 189    /* Compare the rest of the struct. */
 190    const unsigned offset = sizeof(struct brw_vec4_prog_data);
 191    if (memcmp(((char *) &a) + offset, ((char *) &b) + offset,
 192               sizeof(struct brw_vs_prog_data) - offset)) {
 193       return false;
 194    }
 195
 196    return true;
 197 }
 198
 199 static bool
 200 do_vs_prog(struct brw_context *brw,
 201            struct gl_shader_program *prog,
 202            struct brw_vertex_program *vp,
 203            struct brw_vs_prog_key *key)
 204 {
 205    GLuint program_size;
 206    const GLuint *program;
 207    struct brw_vs_compile c;
 208    struct brw_vs_prog_data prog_data;
 209    void *mem_ctx;
 210    int i;
 211    struct gl_shader *vs = NULL;
 212
 213    if (prog)
 214       vs = prog->_LinkedShaders[MESA_SHADER_VERTEX];
 215
 216    memset(&c, 0, sizeof(c));
 217    memcpy(&c.key, key, sizeof(*key));
 218    memset(&prog_data, 0, sizeof(prog_data));
 219
 220    mem_ctx = ralloc_context(NULL);
 221
 222    c.vp = vp;
 223
 224    /* Allocate the references to the uniforms that will end up in the
 225     * prog_data associated with the compiled program, and which will be freed
 226     * by the state cache.
 227     */
 228    int param_count;
 229    if (vs) {
 230       /* We add padding around uniform values below vec4 size, with the worst
 231        * case being a float value that gets blown up to a vec4, so be
 232        * conservative here.
 233        */
 234       param_count = vs->num_uniform_components * 4;
 235
 236    } else {
 237       param_count = vp->program.Base.Parameters->NumParameters * 4;
 238    }
 239    /* vec4_visitor::setup_uniform_clipplane_values() also uploads user clip
 240     * planes as uniforms.
 241     */
 242    param_count += c.key.base.nr_userclip_plane_consts * 4;
 243
 244    prog_data.base.param = rzalloc_array(NULL, const float *, param_count);
 245    prog_data.base.pull_param = rzalloc_array(NULL, const float *, param_count);
 246
 247    GLbitfield64 outputs_written = vp->program.Base.OutputsWritten;
 248    prog_data.inputs_read = vp->program.Base.InputsRead;
 249
 250    if (c.key.copy_edgeflag) {
 251       outputs_written |= BITFIELD64_BIT(VARYING_SLOT_EDGE);
 252       prog_data.inputs_read |= VERT_BIT_EDGEFLAG;
 253    }
 254
 255    if (brw->gen < 6) {
 256       /* Put dummy slots into the VUE for the SF to put the replaced
 257        * point sprite coords in.  We shouldn't need these dummy slots,
 258        * which take up precious URB space, but it would mean that the SF
 259        * doesn't get nice aligned pairs of input coords into output
 260        * coords, which would be a pain to handle.
 261        */
 262       for (i = 0; i < 8; i++) {
 263          if (c.key.point_coord_replace & (1 << i))
 264             outputs_written |= BITFIELD64_BIT(VARYING_SLOT_TEX0 + i);
 265       }
 266
 267       /* if back colors are written, allocate slots for front colors too */
 268       if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC0))
 269          outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL0);
 270       if (outputs_written & BITFIELD64_BIT(VARYING_SLOT_BFC1))
 271          outputs_written |= BITFIELD64_BIT(VARYING_SLOT_COL1);
 272    }
 273
 274    /* In order for legacy clipping to work, we need to populate the clip
 275     * distance varying slots whenever clipping is enabled, even if the vertex
 276     * shader doesn't write to gl_ClipDistance.
 277     */
 278    if (c.key.base.userclip_active) {
 279       outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0);
 280       outputs_written |= BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1);
 281    }
 282
 283    brw_compute_vue_map(brw, &prog_data.base.vue_map, outputs_written);
 284
 285    if (0) {
 286       _mesa_fprint_program_opt(stdout, &c.vp->program.Base, PROG_PRINT_DEBUG,
 287                                true);
 288    }
 289
 290    /* Emit GEN4 code.
 291     */
 292    program = brw_vs_emit(brw, prog, &c, &prog_data, mem_ctx, &program_size);
 293    if (program == NULL) {
 294       ralloc_free(mem_ctx);
 295       return false;
 296    }
 297
 298    /* Scratch space is used for register spilling */
 299    if (c.base.last_scratch) {
 300       perf_debug("Vertex shader triggered register spilling.  "
 301                  "Try reducing the number of live vec4 values to "
 302                  "improve performance.\n");
 303
 304       prog_data.base.total_scratch
 305          = brw_get_scratch_size(c.base.last_scratch*REG_SIZE);
 306
 307       brw_get_scratch_bo(brw, &brw->vs.base.scratch_bo,
 308                          prog_data.base.total_scratch * brw->max_vs_threads);
 309    }
 310
 311    brw_upload_cache(&brw->cache, BRW_VS_PROG,
 312                     &c.key, sizeof(c.key),
 313                     program, program_size,
 314                     &prog_data, sizeof(prog_data),
 315                     &brw->vs.base.prog_offset, &brw->vs.prog_data);
 316    ralloc_free(mem_ctx);
 317
 318    return true;
 319 }
 320
 321 static bool
 322 key_debug(struct brw_context *brw, const char *name, int a, int b)
 323 {
 324    if (a != b) {
 325       perf_debug("  %s %d->%d\n", name, a, b);
 326       return true;
 327    }
 328    return false;
 329 }
 330
 331 void
 332 brw_vs_debug_recompile(struct brw_context *brw,
 333                        struct gl_shader_program *prog,
 334                        const struct brw_vs_prog_key *key)
 335 {
 336    struct brw_cache_item *c = NULL;
 337    const struct brw_vs_prog_key *old_key = NULL;
 338    bool found = false;
 339
 340    perf_debug("Recompiling vertex shader for program %d\n", prog->Name);
 341
 342    for (unsigned int i = 0; i < brw->cache.size; i++) {
 343       for (c = brw->cache.items[i]; c; c = c->next) {
 344          if (c->cache_id == BRW_VS_PROG) {
 345             old_key = c->key;
 346
 347             if (old_key->base.program_string_id == key->base.program_string_id)
 348                break;
 349          }
 350       }
 351       if (c)
 352          break;
 353    }
 354
 355    if (!c) {
 356       perf_debug("  Didn't find previous compile in the shader cache for "
 357                  "debug\n");
 358       return;
 359    }
 360
 361    for (unsigned int i = 0; i < VERT_ATTRIB_MAX; i++) {
 362       found |= key_debug(brw, "Vertex attrib w/a flags",
 363                          old_key->gl_attrib_wa_flags[i],
 364                          key->gl_attrib_wa_flags[i]);
 365    }
 366
 367    found |= key_debug(brw, "user clip flags",
 368                       old_key->base.userclip_active, key->base.userclip_active);
 369
 370    found |= key_debug(brw, "user clipping planes as push constants",
 371                       old_key->base.nr_userclip_plane_consts,
 372                       key->base.nr_userclip_plane_consts);
 373
 374    found |= key_debug(brw, "clip distance enable",
 375                       old_key->base.uses_clip_distance, key->base.uses_clip_distance);
 376    found |= key_debug(brw, "copy edgeflag",
 377                       old_key->copy_edgeflag, key->copy_edgeflag);
 378    found |= key_debug(brw, "PointCoord replace",
 379                       old_key->point_coord_replace, key->point_coord_replace);
 380    found |= key_debug(brw, "vertex color clamping",
 381                       old_key->base.clamp_vertex_color, key->base.clamp_vertex_color);
 382
 383    found |= brw_debug_recompile_sampler_key(brw, &old_key->base.tex,
 384                                             &key->base.tex);
 385
 386    if (!found) {
 387       perf_debug("  Something else\n");
 388    }
 389 }
 390
 391
 392 void
 393 brw_setup_vec4_key_clip_info(struct brw_context *brw,
 394                              struct brw_vec4_prog_key *key,
 395                              bool program_uses_clip_distance)
 396 {
 397    struct gl_context *ctx = &brw->ctx;
 398
 399    key->userclip_active = (ctx->Transform.ClipPlanesEnabled != 0);
 400    key->uses_clip_distance = program_uses_clip_distance;
 401    if (key->userclip_active && !key->uses_clip_distance) {
 402       key->nr_userclip_plane_consts
 403          = _mesa_logbase2(ctx->Transform.ClipPlanesEnabled) + 1;
 404    }
 405 }
 406
 407
 408 static void brw_upload_vs_prog(struct brw_context *brw)
 409 {
 410    struct gl_context *ctx = &brw->ctx;
 411    struct brw_vs_prog_key key;
 412    /* BRW_NEW_VERTEX_PROGRAM */
 413    struct brw_vertex_program *vp =
 414       (struct brw_vertex_program *)brw->vertex_program;
 415    struct gl_program *prog = (struct gl_program *) brw->vertex_program;
 416    int i;
 417
 418    memset(&key, 0, sizeof(key));
 419
 420    /* Just upload the program verbatim for now.  Always send it all
 421     * the inputs it asks for, whether they are varying or not.
 422     */
 423    key.base.program_string_id = vp->id;
 424    brw_setup_vec4_key_clip_info(brw, &key.base, vp->program.UsesClipDistance);
 425
 426    /* _NEW_POLYGON */
 427    if (brw->gen < 6) {
 428       key.copy_edgeflag = (ctx->Polygon.FrontMode != GL_FILL ||
 429                            ctx->Polygon.BackMode != GL_FILL);
 430    }
 431
 432    /* _NEW_LIGHT | _NEW_BUFFERS */
 433    key.base.clamp_vertex_color = ctx->Light._ClampVertexColor;
 434
 435    /* _NEW_POINT */
 436    if (brw->gen < 6 && ctx->Point.PointSprite) {
 437       for (i = 0; i < 8; i++) {
 438          if (ctx->Point.CoordReplace[i])
 439             key.point_coord_replace |= (1 << i);
 440       }
 441    }
 442
 443    /* _NEW_TEXTURE */
 444    brw_populate_sampler_prog_key_data(ctx, prog, brw->vs.base.sampler_count,
 445                                       &key.base.tex);
 446
 447    /* BRW_NEW_VERTICES */
 448    if (brw->gen < 8 && !brw->is_haswell) {
 449       /* Prior to Haswell, the hardware can't natively support GL_FIXED or
 450        * 2_10_10_10_REV vertex formats.  Set appropriate workaround flags.
 451        */
 452       for (i = 0; i < VERT_ATTRIB_MAX; i++) {
 453          if (!(vp->program.Base.InputsRead & BITFIELD64_BIT(i)))
 454             continue;
 455
 456          uint8_t wa_flags = 0;
 457
 458          switch (brw->vb.inputs[i].glarray->Type) {
 459
 460          case GL_FIXED:
 461             wa_flags = brw->vb.inputs[i].glarray->Size;
 462             break;
 463
 464          case GL_INT_2_10_10_10_REV:
 465             wa_flags |= BRW_ATTRIB_WA_SIGN;
 466             /* fallthough */
 467
 468          case GL_UNSIGNED_INT_2_10_10_10_REV:
 469             if (brw->vb.inputs[i].glarray->Format == GL_BGRA)
 470                wa_flags |= BRW_ATTRIB_WA_BGRA;
 471
 472             if (brw->vb.inputs[i].glarray->Normalized)
 473                wa_flags |= BRW_ATTRIB_WA_NORMALIZE;
 474             else if (!brw->vb.inputs[i].glarray->Integer)
 475                wa_flags |= BRW_ATTRIB_WA_SCALE;
 476
 477             break;
 478          }
 479
 480          key.gl_attrib_wa_flags[i] = wa_flags;
 481       }
 482    }
 483
 484    if (!brw_search_cache(&brw->cache, BRW_VS_PROG,
 485                          &key, sizeof(key),
 486                          &brw->vs.base.prog_offset, &brw->vs.prog_data)) {
 487       bool success = do_vs_prog(brw, ctx->Shader.CurrentVertexProgram,
 488                                 vp, &key);
 489       (void) success;
 490       assert(success);
 491    }
 492    if (memcmp(&brw->vs.prog_data->base.vue_map, &brw->vue_map_geom_out,
 493               sizeof(brw->vue_map_geom_out)) != 0) {
 494       brw->vue_map_vs = brw->vs.prog_data->base.vue_map;
 495       brw->state.dirty.brw |= BRW_NEW_VUE_MAP_VS;
 496       if (brw->gen < 7) {
 497          /* No geometry shader support, so the VS VUE map is the VUE map for
 498           * the output of the "geometry" portion of the pipeline.
 499           */
 500          brw->vue_map_geom_out = brw->vue_map_vs;
 501          brw->state.dirty.brw |= BRW_NEW_VUE_MAP_GEOM_OUT;
 502       }
 503    }
 504 }
 505
 506 /* See brw_vs.c:
 507  */
 508 const struct brw_tracked_state brw_vs_prog = {
 509    .dirty = {
 510       .mesa  = (_NEW_TRANSFORM | _NEW_POLYGON | _NEW_POINT | _NEW_LIGHT |
 511                 _NEW_TEXTURE |
 512                 _NEW_BUFFERS),
 513       .brw   = (BRW_NEW_VERTEX_PROGRAM |
 514                 BRW_NEW_VERTICES),
 515       .cache = 0
 516    },
 517    .emit = brw_upload_vs_prog
 518 };
 519
 520 bool
 521 brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog)
 522 {
 523    struct brw_context *brw = brw_context(ctx);
 524    struct brw_vs_prog_key key;
 525    uint32_t old_prog_offset = brw->vs.base.prog_offset;
 526    struct brw_vs_prog_data *old_prog_data = brw->vs.prog_data;
 527    bool success;
 528
 529    if (!prog->_LinkedShaders[MESA_SHADER_VERTEX])
 530       return true;
 531
 532    struct gl_vertex_program *vp = (struct gl_vertex_program *)
 533       prog->_LinkedShaders[MESA_SHADER_VERTEX]->Program;
 534    struct brw_vertex_program *bvp = brw_vertex_program(vp);
 535
 536    memset(&key, 0, sizeof(key));
 537
 538    key.base.program_string_id = bvp->id;
 539    key.base.clamp_vertex_color = ctx->API == API_OPENGL_COMPAT;
 540
 541    unsigned sampler_count = _mesa_fls(vp->Base.SamplersUsed);
 542    for (unsigned i = 0; i < sampler_count; i++) {
 543       if (vp->Base.ShadowSamplers & (1 << i)) {
 544          /* Assume DEPTH_TEXTURE_MODE is the default: X, X, X, 1 */
 545          key.base.tex.swizzles[i] =
 546             MAKE_SWIZZLE4(SWIZZLE_X, SWIZZLE_X, SWIZZLE_X, SWIZZLE_ONE);
 547       } else {
 548          /* Color sampler: assume no swizzling. */
 549          key.base.tex.swizzles[i] = SWIZZLE_XYZW;
 550       }
 551    }
 552
 553    success = do_vs_prog(brw, prog, bvp, &key);
 554
 555    brw->vs.base.prog_offset = old_prog_offset;
 556    brw->vs.prog_data = old_prog_data;
 557
 558    return success;
 559 }
 560
 561
 562 void
 563 brw_vs_prog_data_free(const void *in_prog_data)
 564 {
 565    const struct brw_vs_prog_data *prog_data = in_prog_data;
 566
 567    brw_vec4_prog_data_free(&prog_data->base);
 568 }