src/mesa/drivers/dri/i965/brw_vs.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keithw@vmware.com>
  30   */
  31
  32
  33 #ifndef BRW_VS_H
  34 #define BRW_VS_H
  35
  36
  37 #include "brw_context.h"
  38 #include "brw_eu.h"
  39 #include "brw_vec4.h"
  40 #include "program/program.h"
  41
  42 /**
  43  * The VF can't natively handle certain types of attributes, such as GL_FIXED
  44  * or most 10_10_10_2 types.  These flags enable various VS workarounds to
  45  * "fix" attributes at the beginning of shaders.
  46  */
  47 #define BRW_ATTRIB_WA_COMPONENT_MASK    7  /* mask for GL_FIXED scale channel count */
  48 #define BRW_ATTRIB_WA_NORMALIZE     8   /* normalize in shader */
  49 #define BRW_ATTRIB_WA_BGRA          16  /* swap r/b channels in shader */
  50 #define BRW_ATTRIB_WA_SIGN          32  /* interpret as signed in shader */
  51 #define BRW_ATTRIB_WA_SCALE         64  /* interpret as scaled in shader */
  52
  53 struct brw_vs_prog_key {
  54    struct brw_vec4_prog_key base;
  55
  56    /*
  57     * Per-attribute workaround flags
  58     */
  59    uint8_t gl_attrib_wa_flags[VERT_ATTRIB_MAX];
  60
  61    GLuint copy_edgeflag:1;
  62
  63    /**
  64     * For pre-Gen6 hardware, a bitfield indicating which texture coordinates
  65     * are going to be replaced with point coordinates (as a consequence of a
  66     * call to glTexEnvi(GL_POINT_SPRITE, GL_COORD_REPLACE, GL_TRUE)).  Because
  67     * our SF thread requires exact matching between VS outputs and FS inputs,
  68     * these texture coordinates will need to be unconditionally included in
  69     * the VUE, even if they aren't written by the vertex shader.
  70     */
  71    GLuint point_coord_replace:8;
  72 };
  73
  74
  75 struct brw_vs_compile {
  76    struct brw_vec4_compile base;
  77    struct brw_vs_prog_key key;
  78
  79    struct brw_vertex_program *vp;
  80 };
  81
  82 #ifdef __cplusplus
  83 extern "C" {
  84 #endif
  85
  86 const unsigned *brw_vs_emit(struct brw_context *brw,
  87                             struct gl_shader_program *prog,
  88                             struct brw_vs_compile *c,
  89                             struct brw_vs_prog_data *prog_data,
  90                             void *mem_ctx,
  91                             unsigned *program_size);
  92 bool brw_vs_precompile(struct gl_context *ctx, struct gl_shader_program *prog);
  93 void brw_vs_debug_recompile(struct brw_context *brw,
  94                             struct gl_shader_program *prog,
  95                             const struct brw_vs_prog_key *key);
  96 bool brw_vs_prog_data_compare(const void *a, const void *b);
  97
  98 #ifdef __cplusplus
  99 } /* extern "C" */
 100
 101
 102 namespace brw {
 103
 104 class vec4_vs_visitor : public vec4_visitor
 105 {
 106 public:
 107    vec4_vs_visitor(struct brw_context *brw,
 108                    struct brw_vs_compile *vs_compile,
 109                    struct brw_vs_prog_data *vs_prog_data,
 110                    struct gl_shader_program *prog,
 111                    void *mem_ctx);
 112
 113 protected:
 114    virtual dst_reg *make_reg_for_system_value(ir_variable *ir);
 115    virtual void setup_payload();
 116    virtual void emit_prolog();
 117    virtual void emit_program_code();
 118    virtual void emit_thread_end();
 119    virtual void emit_urb_write_header(int mrf);
 120    virtual vec4_instruction *emit_urb_write_opcode(bool complete);
 121
 122 private:
 123    int setup_attributes(int payload_reg);
 124    void setup_vp_regs();
 125    dst_reg get_vp_dst_reg(const prog_dst_register &dst);
 126    src_reg get_vp_src_reg(const prog_src_register &src);
 127
 128    struct brw_vs_compile * const vs_compile;
 129    struct brw_vs_prog_data * const vs_prog_data;
 130    src_reg *vp_temp_regs;
 131    src_reg vp_addr_reg;
 132 };
 133
 134 } /* namespace brw */
 135
 136
 137 #endif
 138
 139 #endif