src/mesa/drivers/dri/i965/brw_vtbl.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26 **********************************************************************/
  27
  28 /*
  29  * Authors:
  30  *   Keith Whitwell <keith@tungstengraphics.com>
  31  */
  32
  33 #include "main/glheader.h"
  34 #include "main/mtypes.h"
  35 #include "main/imports.h"
  36 #include "main/macros.h"
  37 #include "main/colormac.h"
  38 #include "main/renderbuffer.h"
  39 #include "main/framebuffer.h"
  40
  41 #include "intel_batchbuffer.h"
  42 #include "intel_regions.h"
  43 #include "intel_fbo.h"
  44
  45 #include "brw_context.h"
  46 #include "brw_defines.h"
  47 #include "brw_state.h"
  48 #include "brw_draw.h"
  49 #include "brw_vs.h"
  50 #include "brw_wm.h"
  51
  52 #include "gen6_blorp.h"
  53 #include "gen7_blorp.h"
  54
  55 #include "glsl/ralloc.h"
  56
  57 static void
  58 dri_bo_release(drm_intel_bo **bo)
  59 {
  60    drm_intel_bo_unreference(*bo);
  61    *bo = NULL;
  62 }
  63
  64
  65 /**
  66  * called from intelDestroyContext()
  67  */
  68 static void brw_destroy_context( struct intel_context *intel )
  69 {
  70    struct brw_context *brw = brw_context(&intel->ctx);
  71
  72    brw_destroy_state(brw);
  73    brw_draw_destroy( brw );
  74
  75    dri_bo_release(&brw->curbe.curbe_bo);
  76    dri_bo_release(&brw->vs.const_bo);
  77    dri_bo_release(&brw->wm.const_bo);
  78
  79    free(brw->curbe.last_buf);
  80    free(brw->curbe.next_buf);
  81
  82    drm_intel_gem_context_destroy(intel->hw_ctx);
  83 }
  84
  85 /**
  86  * Update the hardware state for drawing into a window or framebuffer object.
  87  *
  88  * Called by glDrawBuffer, glBindFramebufferEXT, MakeCurrent, and other
  89  * places within the driver.
  90  *
  91  * Basically, this needs to be called any time the current framebuffer
  92  * changes, the renderbuffers change, or we need to draw into different
  93  * color buffers.
  94  */
  95 static void
  96 brw_update_draw_buffer(struct intel_context *intel)
  97 {
  98    struct gl_context *ctx = &intel->ctx;
  99    struct gl_framebuffer *fb = ctx->DrawBuffer;
 100
 101    if (!fb) {
 102       /* this can happen during the initial context initialization */
 103       return;
 104    }
 105
 106    /* Do this here, not core Mesa, since this function is called from
 107     * many places within the driver.
 108     */
 109    if (ctx->NewState & _NEW_BUFFERS) {
 110       /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */
 111       _mesa_update_framebuffer(ctx);
 112       /* this updates the DrawBuffer's Width/Height if it's a FBO */
 113       _mesa_update_draw_buffer_bounds(ctx);
 114    }
 115
 116    if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
 117       /* this may occur when we're called by glBindFrameBuffer() during
 118        * the process of someone setting up renderbuffers, etc.
 119        */
 120       /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/
 121       return;
 122    }
 123
 124    /* Mesa's Stencil._Enabled field is updated when
 125     * _NEW_BUFFERS | _NEW_STENCIL, but i965 code assumes that the value
 126     * only changes with _NEW_STENCIL (which seems sensible).  So flag it
 127     * here since this is the _NEW_BUFFERS path.
 128     */
 129    intel->NewGLState |= (_NEW_DEPTH | _NEW_STENCIL);
 130
 131    /* The driver uses this in places that need to look up
 132     * renderbuffers' buffer objects.
 133     */
 134    intel->NewGLState |= _NEW_BUFFERS;
 135
 136    /* update viewport/scissor since it depends on window size */
 137    intel->NewGLState |= _NEW_VIEWPORT | _NEW_SCISSOR;
 138
 139    /* Update culling direction which changes depending on the
 140     * orientation of the buffer:
 141     */
 142    intel->NewGLState |= _NEW_POLYGON;
 143 }
 144
 145 /**
 146  * called from intel_batchbuffer_flush and children before sending a
 147  * batchbuffer off.
 148  *
 149  * Note that ALL state emitted here must fit in the reserved space
 150  * at the end of a batchbuffer.  If you add more GPU state, increase
 151  * the BATCH_RESERVED macro.
 152  */
 153 static void brw_finish_batch(struct intel_context *intel)
 154 {
 155    struct brw_context *brw = brw_context(&intel->ctx);
 156    brw_emit_query_end(brw);
 157
 158    if (brw->curbe.curbe_bo) {
 159       drm_intel_gem_bo_unmap_gtt(brw->curbe.curbe_bo);
 160       drm_intel_bo_unreference(brw->curbe.curbe_bo);
 161       brw->curbe.curbe_bo = NULL;
 162    }
 163 }
 164
 165
 166 /**
 167  * called from intelFlushBatchLocked
 168  */
 169 static void brw_new_batch( struct intel_context *intel )
 170 {
 171    struct brw_context *brw = brw_context(&intel->ctx);
 172
 173    /* If the kernel supports hardware contexts, then most hardware state is
 174     * preserved between batches; we only need to re-emit state that is required
 175     * to be in every batch.  Otherwise we need to re-emit all the state that
 176     * would otherwise be stored in the context (which for all intents and
 177     * purposes means everything).
 178     */
 179    if (intel->hw_ctx == NULL)
 180       brw->state.dirty.brw |= BRW_NEW_CONTEXT;
 181
 182    brw->state.dirty.brw |= BRW_NEW_BATCH;
 183
 184    /* Assume that the last command before the start of our batch was a
 185     * primitive, for safety.
 186     */
 187    intel->batch.need_workaround_flush = true;
 188
 189    brw->state_batch_count = 0;
 190
 191    /* Gen7 needs to track what the real transform feedback vertex count was at
 192     * the start of the batch, since the kernel will be resetting the offset to
 193     * 0.
 194     */
 195    brw->sol.offset_0_batch_start = brw->sol.svbi_0_starting_index;
 196
 197    brw->ib.type = -1;
 198
 199    /* Mark that the current program cache BO has been used by the GPU.
 200     * It will be reallocated if we need to put new programs in for the
 201     * next batch.
 202     */
 203    brw->cache.bo_used_by_gpu = true;
 204 }
 205
 206 static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
 207 {
 208    /* nothing */
 209 }
 210
 211 /**
 212  * \see intel_context.vtbl.is_hiz_depth_format
 213  */
 214 static bool brw_is_hiz_depth_format(struct intel_context *intel,
 215                                     gl_format format)
 216 {
 217    if (!intel->has_hiz)
 218       return false;
 219
 220    switch (format) {
 221    case MESA_FORMAT_Z32_FLOAT:
 222    case MESA_FORMAT_Z32_FLOAT_X24S8:
 223    case MESA_FORMAT_X8_Z24:
 224    case MESA_FORMAT_S8_Z24:
 225       return true;
 226    default:
 227       return false;
 228    }
 229 }
 230
 231 void brwInitVtbl( struct brw_context *brw )
 232 {
 233    brw->intel.vtbl.check_vertex_size = 0;
 234    brw->intel.vtbl.emit_state = 0;
 235    brw->intel.vtbl.reduced_primitive_state = 0;
 236    brw->intel.vtbl.render_start = 0;
 237    brw->intel.vtbl.update_texture_state = 0;
 238
 239    brw->intel.vtbl.invalidate_state = brw_invalidate_state;
 240    brw->intel.vtbl.new_batch = brw_new_batch;
 241    brw->intel.vtbl.finish_batch = brw_finish_batch;
 242    brw->intel.vtbl.destroy = brw_destroy_context;
 243    brw->intel.vtbl.update_draw_buffer = brw_update_draw_buffer;
 244    brw->intel.vtbl.debug_batch = brw_debug_batch;
 245    brw->intel.vtbl.annotate_aub = brw_annotate_aub;
 246    brw->intel.vtbl.render_target_supported = brw_render_target_supported;
 247    brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format;
 248
 249    assert(brw->intel.gen >= 4);
 250    if (brw->intel.gen >= 7) {
 251       gen7_init_vtable_surface_functions(brw);
 252    } else if (brw->intel.gen >= 4) {
 253       gen4_init_vtable_surface_functions(brw);
 254    }
 255 }