52be1754a952fa577c0663f831bb9f9917acc1cd
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vtbl.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27
28 /*
29 * Authors:
30 * Keith Whitwell <keith@tungstengraphics.com>
31 */
32
33 #include "main/glheader.h"
34 #include "main/mtypes.h"
35 #include "main/imports.h"
36 #include "main/macros.h"
37 #include "main/colormac.h"
38 #include "main/renderbuffer.h"
39 #include "main/framebuffer.h"
40
41 #include "intel_batchbuffer.h"
42 #include "intel_regions.h"
43 #include "intel_fbo.h"
44
45 #include "brw_context.h"
46 #include "brw_defines.h"
47 #include "brw_state.h"
48 #include "brw_draw.h"
49 #include "brw_vs.h"
50 #include "brw_wm.h"
51
52 #include "gen6_hiz.h"
53
54 #include "glsl/ralloc.h"
55
56 static void
57 dri_bo_release(drm_intel_bo **bo)
58 {
59 drm_intel_bo_unreference(*bo);
60 *bo = NULL;
61 }
62
63
64 /**
65 * called from intelDestroyContext()
66 */
67 static void brw_destroy_context( struct intel_context *intel )
68 {
69 struct brw_context *brw = brw_context(&intel->ctx);
70
71 brw_destroy_state(brw);
72 brw_draw_destroy( brw );
73 brw_clear_validated_bos(brw);
74 ralloc_free(brw->wm.compile_data);
75
76 dri_bo_release(&brw->curbe.curbe_bo);
77 dri_bo_release(&brw->vs.const_bo);
78 dri_bo_release(&brw->wm.const_bo);
79
80 free(brw->curbe.last_buf);
81 free(brw->curbe.next_buf);
82 }
83
84 /**
85 * Update the hardware state for drawing into a window or framebuffer object.
86 *
87 * Called by glDrawBuffer, glBindFramebufferEXT, MakeCurrent, and other
88 * places within the driver.
89 *
90 * Basically, this needs to be called any time the current framebuffer
91 * changes, the renderbuffers change, or we need to draw into different
92 * color buffers.
93 */
94 static void
95 brw_update_draw_buffer(struct intel_context *intel)
96 {
97 struct gl_context *ctx = &intel->ctx;
98 struct gl_framebuffer *fb = ctx->DrawBuffer;
99 struct intel_renderbuffer *irbDepth = NULL, *irbStencil = NULL;
100 bool fb_has_hiz = intel_framebuffer_has_hiz(fb);
101
102 if (!fb) {
103 /* this can happen during the initial context initialization */
104 return;
105 }
106
107 /*
108 * If intel_context is using separate stencil, but the depth attachment
109 * (gl_framebuffer.Attachment[BUFFER_DEPTH]) has a packed depth/stencil
110 * format, then we must install the real depth buffer at fb->_DepthBuffer
111 * and set fb->_DepthBuffer->Wrapped before calling _mesa_update_framebuffer.
112 * Otherwise, _mesa_update_framebuffer will create and install a swras
113 * depth wrapper instead.
114 *
115 * Ditto for stencil.
116 */
117 irbDepth = intel_get_renderbuffer(fb, BUFFER_DEPTH);
118 if (irbDepth && irbDepth->Base.Format == MESA_FORMAT_X8_Z24) {
119 _mesa_reference_renderbuffer(&fb->_DepthBuffer, &irbDepth->Base);
120 irbDepth->Base.Wrapped = fb->Attachment[BUFFER_DEPTH].Renderbuffer;
121 }
122
123 irbStencil = intel_get_renderbuffer(fb, BUFFER_STENCIL);
124 if (irbStencil && irbStencil->Base.Format == MESA_FORMAT_S8) {
125 _mesa_reference_renderbuffer(&fb->_StencilBuffer, &irbStencil->Base);
126 irbStencil->Base.Wrapped = fb->Attachment[BUFFER_STENCIL].Renderbuffer;
127 }
128
129 /* Do this here, not core Mesa, since this function is called from
130 * many places within the driver.
131 */
132 if (ctx->NewState & _NEW_BUFFERS) {
133 /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */
134 _mesa_update_framebuffer(ctx);
135 /* this updates the DrawBuffer's Width/Height if it's a FBO */
136 _mesa_update_draw_buffer_bounds(ctx);
137 }
138
139 if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
140 /* this may occur when we're called by glBindFrameBuffer() during
141 * the process of someone setting up renderbuffers, etc.
142 */
143 /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/
144 return;
145 }
146
147 /* Check some stencil invariants. These should probably be in
148 * emit_depthbuffer().
149 */
150 if (irbStencil && irbStencil->region) {
151 if (!intel->has_separate_stencil)
152 assert(irbStencil->Base.Format == MESA_FORMAT_S8_Z24);
153 if (fb_has_hiz || intel->must_use_separate_stencil)
154 assert(irbStencil->Base.Format == MESA_FORMAT_S8);
155 if (irbStencil->Base.Format == MESA_FORMAT_S8)
156 assert(intel->has_separate_stencil);
157 }
158
159 /* Mesa's Stencil._Enabled field is updated when
160 * _NEW_BUFFERS | _NEW_STENCIL, but i965 code assumes that the value
161 * only changes with _NEW_STENCIL (which seems sensible). So flag it
162 * here since this is the _NEW_BUFFERS path.
163 */
164 intel->NewGLState |= (_NEW_DEPTH | _NEW_STENCIL);
165
166 /* The driver uses this in places that need to look up
167 * renderbuffers' buffer objects.
168 */
169 intel->NewGLState |= _NEW_BUFFERS;
170
171 /* update viewport/scissor since it depends on window size */
172 intel->NewGLState |= _NEW_VIEWPORT | _NEW_SCISSOR;
173
174 /* Update culling direction which changes depending on the
175 * orientation of the buffer:
176 */
177 intel->NewGLState |= _NEW_POLYGON;
178 }
179
180 /**
181 * called from intel_batchbuffer_flush and children before sending a
182 * batchbuffer off.
183 */
184 static void brw_finish_batch(struct intel_context *intel)
185 {
186 struct brw_context *brw = brw_context(&intel->ctx);
187 brw_emit_query_end(brw);
188
189 if (brw->curbe.curbe_bo) {
190 drm_intel_gem_bo_unmap_gtt(brw->curbe.curbe_bo);
191 drm_intel_bo_unreference(brw->curbe.curbe_bo);
192 brw->curbe.curbe_bo = NULL;
193 }
194 }
195
196
197 /**
198 * called from intelFlushBatchLocked
199 */
200 static void brw_new_batch( struct intel_context *intel )
201 {
202 struct brw_context *brw = brw_context(&intel->ctx);
203
204 /* Mark all context state as needing to be re-emitted.
205 * This is probably not as severe as on 915, since almost all of our state
206 * is just in referenced buffers.
207 */
208 brw->state.dirty.brw |= BRW_NEW_CONTEXT | BRW_NEW_BATCH;
209
210 /* Assume that the last command before the start of our batch was a
211 * primitive, for safety.
212 */
213 intel->batch.need_workaround_flush = true;
214
215 brw->state_batch_count = 0;
216
217 brw->vb.nr_current_buffers = 0;
218 brw->ib.type = -1;
219
220 /* Mark that the current program cache BO has been used by the GPU.
221 * It will be reallocated if we need to put new programs in for the
222 * next batch.
223 */
224 brw->cache.bo_used_by_gpu = true;
225 }
226
227 static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
228 {
229 /* nothing */
230 }
231
232 /**
233 * \see intel_context.vtbl.is_hiz_depth_format
234 */
235 static bool brw_is_hiz_depth_format(struct intel_context *intel,
236 gl_format format)
237 {
238 /* In the future, this will support Z_FLOAT32. */
239 return intel->has_hiz && (format == MESA_FORMAT_X8_Z24);
240 }
241
242 static void brw_hiz_resolve_noop(struct intel_context *intel,
243 struct intel_region *depth_region)
244 {
245 /* empty */
246 }
247
248 void brwInitVtbl( struct brw_context *brw )
249 {
250 brw->intel.vtbl.check_vertex_size = 0;
251 brw->intel.vtbl.emit_state = 0;
252 brw->intel.vtbl.reduced_primitive_state = 0;
253 brw->intel.vtbl.render_start = 0;
254 brw->intel.vtbl.update_texture_state = 0;
255
256 brw->intel.vtbl.invalidate_state = brw_invalidate_state;
257 brw->intel.vtbl.new_batch = brw_new_batch;
258 brw->intel.vtbl.finish_batch = brw_finish_batch;
259 brw->intel.vtbl.destroy = brw_destroy_context;
260 brw->intel.vtbl.update_draw_buffer = brw_update_draw_buffer;
261 brw->intel.vtbl.debug_batch = brw_debug_batch;
262 brw->intel.vtbl.render_target_supported = brw_render_target_supported;
263 brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format;
264
265 if (brw->intel.has_hiz) {
266 brw->intel.vtbl.hiz_resolve_hizbuffer = gen6_hiz_resolve_hizbuffer;
267 brw->intel.vtbl.hiz_resolve_depthbuffer = gen6_hiz_resolve_depthbuffer;
268 } else {
269 brw->intel.vtbl.hiz_resolve_hizbuffer = brw_hiz_resolve_noop;
270 brw->intel.vtbl.hiz_resolve_depthbuffer = brw_hiz_resolve_noop;
271 }
272 }