src/mesa/drivers/dri/i965/brw_vtbl.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33
  34
  35 #include "glheader.h"
  36 #include "mtypes.h"
  37 #include "imports.h"
  38 #include "macros.h"
  39 #include "colormac.h"
  40
  41 #include "intel_batchbuffer.h"
  42 #include "intel_regions.h"
  43
  44 #include "brw_context.h"
  45 #include "brw_defines.h"
  46 #include "brw_state.h"
  47
  48 #include "brw_draw.h"
  49 #include "brw_state.h"
  50 #include "brw_fallback.h"
  51 #include "brw_vs.h"
  52
  53
  54
  55 /* called from intelDestroyContext()
  56  */
  57 static void brw_destroy_context( struct intel_context *intel )
  58 {
  59    GLcontext *ctx = &intel->ctx;
  60    struct brw_context *brw = brw_context(&intel->ctx);
  61
  62    brw_destroy_metaops(brw);
  63    brw_destroy_state(brw);
  64    brw_draw_destroy( brw );
  65
  66    brw_ProgramCacheDestroy( ctx );
  67    brw_FrameBufferTexDestroy( brw );
  68 }
  69
  70 /* called from intelDrawBuffer()
  71  */
  72 static void brw_set_draw_region( struct intel_context *intel,
  73                                   struct intel_region *draw_region,
  74                                   struct intel_region *depth_region)
  75 {
  76    struct brw_context *brw = brw_context(&intel->ctx);
  77
  78    intel_region_release(intel, &brw->state.draw_region);
  79    intel_region_release(intel, &brw->state.depth_region);
  80    intel_region_reference(&brw->state.draw_region, draw_region);
  81    intel_region_reference(&brw->state.depth_region, depth_region);
  82 }
  83
  84
  85 /* called from intelFlushBatchLocked
  86  */
  87 static void brw_lost_hardware( struct intel_context *intel )
  88 {
  89    struct brw_context *brw = brw_context(&intel->ctx);
  90
  91    /* Note that we effectively lose the context after this.
  92     *
  93     * Setting this flag provokes a state buffer wrap and also flushes
  94     * the hardware caches.
  95     */
  96    brw->state.dirty.brw |= BRW_NEW_CONTEXT;
  97
  98    /* Which means there shouldn't be any commands already queued:
  99     */
 100    assert(intel->batch->ptr == intel->batch->map + intel->batch->offset);
 101
 102    brw->state.dirty.mesa |= ~0;
 103    brw->state.dirty.brw |= ~0;
 104    brw->state.dirty.cache |= ~0;
 105 }
 106
 107 static void brw_note_fence( struct intel_context *intel,
 108                             GLuint fence )
 109 {
 110    brw_context(&intel->ctx)->state.dirty.brw |= BRW_NEW_FENCE;
 111 }
 112
 113 static void brw_note_unlock( struct intel_context *intel )
 114 {
 115   struct brw_context *brw = brw_context(&intel->ctx);
 116
 117    brw_pool_check_wrap(brw, &brw->pool[BRW_GS_POOL]);
 118    brw_pool_check_wrap(brw, &brw->pool[BRW_SS_POOL]);
 119
 120    brw_context(&intel->ctx)->state.dirty.brw |= BRW_NEW_LOCK;
 121 }
 122
 123
 124 void brw_do_flush( struct brw_context *brw,
 125                    GLuint flags )
 126 {
 127    struct brw_mi_flush flush;
 128    memset(&flush, 0, sizeof(flush));
 129    flush.opcode = CMD_MI_FLUSH;
 130    flush.flags = flags;
 131    BRW_BATCH_STRUCT(brw, &flush);
 132 }
 133
 134
 135 static void brw_emit_flush( struct intel_context *intel,
 136                         GLuint unused )
 137 {
 138    brw_do_flush(brw_context(&intel->ctx),
 139                 BRW_FLUSH_STATE_CACHE|BRW_FLUSH_READ_CACHE);
 140 }
 141
 142
 143 /* called from intelWaitForIdle() and intelFlush()
 144  *
 145  * For now, just flush everything.  Could be smarter later.
 146  */
 147 static GLuint brw_flush_cmd( void )
 148 {
 149    struct brw_mi_flush flush;
 150    flush.opcode = CMD_MI_FLUSH;
 151    flush.pad = 0;
 152    flush.flags = BRW_FLUSH_READ_CACHE | BRW_FLUSH_STATE_CACHE;
 153    return *(GLuint *)&flush;
 154 }
 155
 156
 157
 158
 159 static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
 160 {
 161    /* nothing */
 162 }
 163
 164
 165 void brwInitVtbl( struct brw_context *brw )
 166 {
 167    brw->intel.vtbl.check_vertex_size = 0;
 168    brw->intel.vtbl.emit_state = 0;
 169    brw->intel.vtbl.reduced_primitive_state = 0;
 170    brw->intel.vtbl.render_start = 0;
 171    brw->intel.vtbl.update_texture_state = 0;
 172
 173    brw->intel.vtbl.invalidate_state = brw_invalidate_state;
 174    brw->intel.vtbl.note_fence = brw_note_fence;
 175    brw->intel.vtbl.note_unlock = brw_note_unlock;
 176    brw->intel.vtbl.lost_hardware = brw_lost_hardware;
 177    brw->intel.vtbl.destroy = brw_destroy_context;
 178    brw->intel.vtbl.set_draw_region = brw_set_draw_region;
 179    brw->intel.vtbl.flush_cmd = brw_flush_cmd;
 180    brw->intel.vtbl.emit_flush = brw_emit_flush;
 181 }
 182