i965: Add HiZ operation state to brw_context
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vtbl.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27
28 /*
29 * Authors:
30 * Keith Whitwell <keith@tungstengraphics.com>
31 */
32
33 #include "main/glheader.h"
34 #include "main/mtypes.h"
35 #include "main/imports.h"
36 #include "main/macros.h"
37 #include "main/colormac.h"
38 #include "main/renderbuffer.h"
39 #include "main/framebuffer.h"
40
41 #include "intel_batchbuffer.h"
42 #include "intel_regions.h"
43 #include "intel_fbo.h"
44
45 #include "brw_context.h"
46 #include "brw_defines.h"
47 #include "brw_state.h"
48 #include "brw_draw.h"
49 #include "brw_vs.h"
50 #include "brw_wm.h"
51
52 #include "gen6_hiz.h"
53
54 #include "glsl/ralloc.h"
55
56 static void
57 dri_bo_release(drm_intel_bo **bo)
58 {
59 drm_intel_bo_unreference(*bo);
60 *bo = NULL;
61 }
62
63
64 /**
65 * called from intelDestroyContext()
66 */
67 static void brw_destroy_context( struct intel_context *intel )
68 {
69 struct brw_context *brw = brw_context(&intel->ctx);
70
71 brw_destroy_state(brw);
72 brw_draw_destroy( brw );
73 ralloc_free(brw->wm.compile_data);
74
75 dri_bo_release(&brw->curbe.curbe_bo);
76 dri_bo_release(&brw->vs.const_bo);
77 dri_bo_release(&brw->wm.const_bo);
78
79 free(brw->curbe.last_buf);
80 free(brw->curbe.next_buf);
81 }
82
83 /**
84 * Update the hardware state for drawing into a window or framebuffer object.
85 *
86 * Called by glDrawBuffer, glBindFramebufferEXT, MakeCurrent, and other
87 * places within the driver.
88 *
89 * Basically, this needs to be called any time the current framebuffer
90 * changes, the renderbuffers change, or we need to draw into different
91 * color buffers.
92 */
93 static void
94 brw_update_draw_buffer(struct intel_context *intel)
95 {
96 struct gl_context *ctx = &intel->ctx;
97 struct gl_framebuffer *fb = ctx->DrawBuffer;
98 struct intel_renderbuffer *irbStencil = NULL;
99 bool fb_has_hiz = intel_framebuffer_has_hiz(fb);
100
101 if (!fb) {
102 /* this can happen during the initial context initialization */
103 return;
104 }
105
106 irbStencil = intel_get_renderbuffer(fb, BUFFER_STENCIL);
107
108 /* Do this here, not core Mesa, since this function is called from
109 * many places within the driver.
110 */
111 if (ctx->NewState & _NEW_BUFFERS) {
112 /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */
113 _mesa_update_framebuffer(ctx);
114 /* this updates the DrawBuffer's Width/Height if it's a FBO */
115 _mesa_update_draw_buffer_bounds(ctx);
116 }
117
118 if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
119 /* this may occur when we're called by glBindFrameBuffer() during
120 * the process of someone setting up renderbuffers, etc.
121 */
122 /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/
123 return;
124 }
125
126 /* Check some stencil invariants. These should probably be in
127 * emit_depthbuffer().
128 */
129 if (irbStencil && irbStencil->mt) {
130 if (!intel->has_separate_stencil)
131 assert(irbStencil->Base.Format == MESA_FORMAT_S8_Z24);
132 if (fb_has_hiz || intel->must_use_separate_stencil)
133 assert(irbStencil->Base.Format == MESA_FORMAT_S8);
134 if (irbStencil->Base.Format == MESA_FORMAT_S8)
135 assert(intel->has_separate_stencil);
136 }
137
138 /* Mesa's Stencil._Enabled field is updated when
139 * _NEW_BUFFERS | _NEW_STENCIL, but i965 code assumes that the value
140 * only changes with _NEW_STENCIL (which seems sensible). So flag it
141 * here since this is the _NEW_BUFFERS path.
142 */
143 intel->NewGLState |= (_NEW_DEPTH | _NEW_STENCIL);
144
145 /* The driver uses this in places that need to look up
146 * renderbuffers' buffer objects.
147 */
148 intel->NewGLState |= _NEW_BUFFERS;
149
150 /* update viewport/scissor since it depends on window size */
151 intel->NewGLState |= _NEW_VIEWPORT | _NEW_SCISSOR;
152
153 /* Update culling direction which changes depending on the
154 * orientation of the buffer:
155 */
156 intel->NewGLState |= _NEW_POLYGON;
157 }
158
159 /**
160 * called from intel_batchbuffer_flush and children before sending a
161 * batchbuffer off.
162 */
163 static void brw_finish_batch(struct intel_context *intel)
164 {
165 struct brw_context *brw = brw_context(&intel->ctx);
166 brw_emit_query_end(brw);
167
168 if (brw->curbe.curbe_bo) {
169 drm_intel_gem_bo_unmap_gtt(brw->curbe.curbe_bo);
170 drm_intel_bo_unreference(brw->curbe.curbe_bo);
171 brw->curbe.curbe_bo = NULL;
172 }
173 }
174
175
176 /**
177 * called from intelFlushBatchLocked
178 */
179 static void brw_new_batch( struct intel_context *intel )
180 {
181 struct brw_context *brw = brw_context(&intel->ctx);
182
183 /* Mark all context state as needing to be re-emitted.
184 * This is probably not as severe as on 915, since almost all of our state
185 * is just in referenced buffers.
186 */
187 brw->state.dirty.brw |= BRW_NEW_CONTEXT | BRW_NEW_BATCH;
188
189 /* Assume that the last command before the start of our batch was a
190 * primitive, for safety.
191 */
192 intel->batch.need_workaround_flush = true;
193
194 brw->state_batch_count = 0;
195
196 brw->vb.nr_current_buffers = 0;
197 brw->ib.type = -1;
198
199 /* Mark that the current program cache BO has been used by the GPU.
200 * It will be reallocated if we need to put new programs in for the
201 * next batch.
202 */
203 brw->cache.bo_used_by_gpu = true;
204 }
205
206 static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
207 {
208 /* nothing */
209 }
210
211 /**
212 * \see intel_context.vtbl.is_hiz_depth_format
213 */
214 static bool brw_is_hiz_depth_format(struct intel_context *intel,
215 gl_format format)
216 {
217 /* In the future, this will support Z_FLOAT32. */
218 return intel->has_hiz && (format == MESA_FORMAT_X8_Z24);
219 }
220
221 void brwInitVtbl( struct brw_context *brw )
222 {
223 brw->intel.vtbl.check_vertex_size = 0;
224 brw->intel.vtbl.emit_state = 0;
225 brw->intel.vtbl.reduced_primitive_state = 0;
226 brw->intel.vtbl.render_start = 0;
227 brw->intel.vtbl.update_texture_state = 0;
228
229 brw->intel.vtbl.invalidate_state = brw_invalidate_state;
230 brw->intel.vtbl.new_batch = brw_new_batch;
231 brw->intel.vtbl.finish_batch = brw_finish_batch;
232 brw->intel.vtbl.destroy = brw_destroy_context;
233 brw->intel.vtbl.update_draw_buffer = brw_update_draw_buffer;
234 brw->intel.vtbl.debug_batch = brw_debug_batch;
235 brw->intel.vtbl.render_target_supported = brw_render_target_supported;
236 brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format;
237
238 if (brw->intel.has_hiz) {
239 brw->intel.vtbl.resolve_depth_slice = gen6_resolve_depth_slice;
240 brw->intel.vtbl.resolve_hiz_slice = gen6_resolve_hiz_slice;
241 }
242
243 if (brw->intel.gen >= 7) {
244 gen7_init_vtable_surface_functions(brw);
245 } else if (brw->intel.gen >= 4) {
246 gen4_init_vtable_surface_functions(brw);
247 }
248 }