i965: Remove the validated BO list, now that it's unused.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vtbl.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27
28 /*
29 * Authors:
30 * Keith Whitwell <keith@tungstengraphics.com>
31 */
32
33 #include "main/glheader.h"
34 #include "main/mtypes.h"
35 #include "main/imports.h"
36 #include "main/macros.h"
37 #include "main/colormac.h"
38 #include "main/renderbuffer.h"
39 #include "main/framebuffer.h"
40
41 #include "intel_batchbuffer.h"
42 #include "intel_regions.h"
43 #include "intel_fbo.h"
44
45 #include "brw_context.h"
46 #include "brw_defines.h"
47 #include "brw_state.h"
48 #include "brw_draw.h"
49 #include "brw_vs.h"
50 #include "brw_wm.h"
51
52 #include "gen6_hiz.h"
53
54 #include "glsl/ralloc.h"
55
56 static void
57 dri_bo_release(drm_intel_bo **bo)
58 {
59 drm_intel_bo_unreference(*bo);
60 *bo = NULL;
61 }
62
63
64 /**
65 * called from intelDestroyContext()
66 */
67 static void brw_destroy_context( struct intel_context *intel )
68 {
69 struct brw_context *brw = brw_context(&intel->ctx);
70
71 brw_destroy_state(brw);
72 brw_draw_destroy( brw );
73 ralloc_free(brw->wm.compile_data);
74
75 dri_bo_release(&brw->curbe.curbe_bo);
76 dri_bo_release(&brw->vs.const_bo);
77 dri_bo_release(&brw->wm.const_bo);
78
79 free(brw->curbe.last_buf);
80 free(brw->curbe.next_buf);
81 }
82
83 /**
84 * Update the hardware state for drawing into a window or framebuffer object.
85 *
86 * Called by glDrawBuffer, glBindFramebufferEXT, MakeCurrent, and other
87 * places within the driver.
88 *
89 * Basically, this needs to be called any time the current framebuffer
90 * changes, the renderbuffers change, or we need to draw into different
91 * color buffers.
92 */
93 static void
94 brw_update_draw_buffer(struct intel_context *intel)
95 {
96 struct gl_context *ctx = &intel->ctx;
97 struct gl_framebuffer *fb = ctx->DrawBuffer;
98 struct intel_renderbuffer *irbDepth = NULL, *irbStencil = NULL;
99 bool fb_has_hiz = intel_framebuffer_has_hiz(fb);
100
101 if (!fb) {
102 /* this can happen during the initial context initialization */
103 return;
104 }
105
106 /*
107 * If intel_context is using separate stencil, but the depth attachment
108 * (gl_framebuffer.Attachment[BUFFER_DEPTH]) has a packed depth/stencil
109 * format, then we must install the real depth buffer at fb->_DepthBuffer
110 * and set fb->_DepthBuffer->Wrapped before calling _mesa_update_framebuffer.
111 * Otherwise, _mesa_update_framebuffer will create and install a swras
112 * depth wrapper instead.
113 *
114 * Ditto for stencil.
115 */
116 irbDepth = intel_get_renderbuffer(fb, BUFFER_DEPTH);
117 if (irbDepth && irbDepth->Base.Format == MESA_FORMAT_X8_Z24) {
118 _mesa_reference_renderbuffer(&fb->_DepthBuffer, &irbDepth->Base);
119 irbDepth->Base.Wrapped = fb->Attachment[BUFFER_DEPTH].Renderbuffer;
120 }
121
122 irbStencil = intel_get_renderbuffer(fb, BUFFER_STENCIL);
123 if (irbStencil && irbStencil->Base.Format == MESA_FORMAT_S8) {
124 _mesa_reference_renderbuffer(&fb->_StencilBuffer, &irbStencil->Base);
125 irbStencil->Base.Wrapped = fb->Attachment[BUFFER_STENCIL].Renderbuffer;
126 }
127
128 /* Do this here, not core Mesa, since this function is called from
129 * many places within the driver.
130 */
131 if (ctx->NewState & _NEW_BUFFERS) {
132 /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */
133 _mesa_update_framebuffer(ctx);
134 /* this updates the DrawBuffer's Width/Height if it's a FBO */
135 _mesa_update_draw_buffer_bounds(ctx);
136 }
137
138 if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
139 /* this may occur when we're called by glBindFrameBuffer() during
140 * the process of someone setting up renderbuffers, etc.
141 */
142 /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/
143 return;
144 }
145
146 /* Check some stencil invariants. These should probably be in
147 * emit_depthbuffer().
148 */
149 if (irbStencil && irbStencil->region) {
150 if (!intel->has_separate_stencil)
151 assert(irbStencil->Base.Format == MESA_FORMAT_S8_Z24);
152 if (fb_has_hiz || intel->must_use_separate_stencil)
153 assert(irbStencil->Base.Format == MESA_FORMAT_S8);
154 if (irbStencil->Base.Format == MESA_FORMAT_S8)
155 assert(intel->has_separate_stencil);
156 }
157
158 /* Mesa's Stencil._Enabled field is updated when
159 * _NEW_BUFFERS | _NEW_STENCIL, but i965 code assumes that the value
160 * only changes with _NEW_STENCIL (which seems sensible). So flag it
161 * here since this is the _NEW_BUFFERS path.
162 */
163 intel->NewGLState |= (_NEW_DEPTH | _NEW_STENCIL);
164
165 /* The driver uses this in places that need to look up
166 * renderbuffers' buffer objects.
167 */
168 intel->NewGLState |= _NEW_BUFFERS;
169
170 /* update viewport/scissor since it depends on window size */
171 intel->NewGLState |= _NEW_VIEWPORT | _NEW_SCISSOR;
172
173 /* Update culling direction which changes depending on the
174 * orientation of the buffer:
175 */
176 intel->NewGLState |= _NEW_POLYGON;
177 }
178
179 /**
180 * called from intel_batchbuffer_flush and children before sending a
181 * batchbuffer off.
182 */
183 static void brw_finish_batch(struct intel_context *intel)
184 {
185 struct brw_context *brw = brw_context(&intel->ctx);
186 brw_emit_query_end(brw);
187
188 if (brw->curbe.curbe_bo) {
189 drm_intel_gem_bo_unmap_gtt(brw->curbe.curbe_bo);
190 drm_intel_bo_unreference(brw->curbe.curbe_bo);
191 brw->curbe.curbe_bo = NULL;
192 }
193 }
194
195
196 /**
197 * called from intelFlushBatchLocked
198 */
199 static void brw_new_batch( struct intel_context *intel )
200 {
201 struct brw_context *brw = brw_context(&intel->ctx);
202
203 /* Mark all context state as needing to be re-emitted.
204 * This is probably not as severe as on 915, since almost all of our state
205 * is just in referenced buffers.
206 */
207 brw->state.dirty.brw |= BRW_NEW_CONTEXT | BRW_NEW_BATCH;
208
209 /* Assume that the last command before the start of our batch was a
210 * primitive, for safety.
211 */
212 intel->batch.need_workaround_flush = true;
213
214 brw->state_batch_count = 0;
215
216 brw->vb.nr_current_buffers = 0;
217 brw->ib.type = -1;
218
219 /* Mark that the current program cache BO has been used by the GPU.
220 * It will be reallocated if we need to put new programs in for the
221 * next batch.
222 */
223 brw->cache.bo_used_by_gpu = true;
224 }
225
226 static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
227 {
228 /* nothing */
229 }
230
231 /**
232 * \see intel_context.vtbl.is_hiz_depth_format
233 */
234 static bool brw_is_hiz_depth_format(struct intel_context *intel,
235 gl_format format)
236 {
237 /* In the future, this will support Z_FLOAT32. */
238 return intel->has_hiz && (format == MESA_FORMAT_X8_Z24);
239 }
240
241 static void brw_hiz_resolve_noop(struct intel_context *intel,
242 struct intel_region *depth_region)
243 {
244 /* empty */
245 }
246
247 void brwInitVtbl( struct brw_context *brw )
248 {
249 brw->intel.vtbl.check_vertex_size = 0;
250 brw->intel.vtbl.emit_state = 0;
251 brw->intel.vtbl.reduced_primitive_state = 0;
252 brw->intel.vtbl.render_start = 0;
253 brw->intel.vtbl.update_texture_state = 0;
254
255 brw->intel.vtbl.invalidate_state = brw_invalidate_state;
256 brw->intel.vtbl.new_batch = brw_new_batch;
257 brw->intel.vtbl.finish_batch = brw_finish_batch;
258 brw->intel.vtbl.destroy = brw_destroy_context;
259 brw->intel.vtbl.update_draw_buffer = brw_update_draw_buffer;
260 brw->intel.vtbl.debug_batch = brw_debug_batch;
261 brw->intel.vtbl.render_target_supported = brw_render_target_supported;
262 brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format;
263
264 if (brw->intel.has_hiz) {
265 brw->intel.vtbl.hiz_resolve_hizbuffer = gen6_hiz_resolve_hizbuffer;
266 brw->intel.vtbl.hiz_resolve_depthbuffer = gen6_hiz_resolve_depthbuffer;
267 } else {
268 brw->intel.vtbl.hiz_resolve_hizbuffer = brw_hiz_resolve_noop;
269 brw->intel.vtbl.hiz_resolve_depthbuffer = brw_hiz_resolve_noop;
270 }
271 }