Make sure bmBufferOffset is called for all active buffers every time
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vtbl.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33
34
35 #include "glheader.h"
36 #include "mtypes.h"
37 #include "imports.h"
38 #include "macros.h"
39 #include "colormac.h"
40
41 #include "intel_batchbuffer.h"
42 #include "intel_regions.h"
43
44 #include "brw_context.h"
45 #include "brw_defines.h"
46 #include "brw_state.h"
47
48 #include "brw_draw.h"
49 #include "brw_exec.h"
50 #include "brw_save.h"
51 #include "brw_state.h"
52 #include "brw_aub.h"
53 #include "brw_fallback.h"
54 #include "brw_vs.h"
55
56
57
58 /* called from intelDestroyContext()
59 */
60 static void brw_destroy_context( struct intel_context *intel )
61 {
62 GLcontext *ctx = &intel->ctx;
63 struct brw_context *brw = brw_context(&intel->ctx);
64
65 brw_aub_destroy(brw);
66
67 brw_destroy_metaops(brw);
68 brw_destroy_state(brw);
69 brw_draw_destroy( brw );
70
71 brw_exec_destroy( ctx );
72 brw_save_destroy( ctx );
73
74 brw_ProgramCacheDestroy( ctx );
75 }
76
77 /* called from intelDrawBuffer()
78 */
79 static void brw_set_draw_region( struct intel_context *intel,
80 struct intel_region *draw_region,
81 struct intel_region *depth_region)
82 {
83 struct brw_context *brw = brw_context(&intel->ctx);
84
85 intel_region_release(intel, &brw->state.draw_region);
86 intel_region_release(intel, &brw->state.depth_region);
87 intel_region_reference(&brw->state.draw_region, draw_region);
88 intel_region_reference(&brw->state.depth_region, depth_region);
89 }
90
91
92 /* called from intelFlushBatchLocked
93 */
94 static void brw_lost_hardware( struct intel_context *intel )
95 {
96 struct brw_context *brw = brw_context(&intel->ctx);
97
98 /* Note that we effectively lose the context after this.
99 *
100 * Setting this flag provokes a state buffer wrap and also flushes
101 * the hardware caches.
102 */
103 brw->state.dirty.brw |= BRW_NEW_CONTEXT;
104
105 /* Which means there shouldn't be any commands already queued:
106 */
107 assert(intel->batch->ptr == intel->batch->map + intel->batch->offset);
108
109 brw->state.dirty.mesa |= ~0;
110 brw->state.dirty.brw |= ~0;
111 brw->state.dirty.cache |= ~0;
112 }
113
114 static void brw_note_fence( struct intel_context *intel,
115 GLuint fence )
116 {
117 brw_context(&intel->ctx)->state.dirty.brw |= BRW_NEW_FENCE;
118 }
119
120 static void brw_note_unlock( struct intel_context *intel )
121 {
122 struct brw_context *brw = brw_context(&intel->ctx);
123
124 brw_pool_check_wrap(brw, &brw->pool[BRW_GS_POOL]);
125 brw_pool_check_wrap(brw, &brw->pool[BRW_SS_POOL]);
126
127 brw_context(&intel->ctx)->state.dirty.brw |= BRW_NEW_LOCK;
128 }
129
130
131 void brw_do_flush( struct brw_context *brw,
132 GLuint flags )
133 {
134 struct brw_mi_flush flush;
135 memset(&flush, 0, sizeof(flush));
136 flush.opcode = CMD_MI_FLUSH;
137 flush.flags = flags;
138 BRW_BATCH_STRUCT(brw, &flush);
139 }
140
141
142 static void brw_emit_flush( struct intel_context *intel,
143 GLuint unused )
144 {
145 brw_do_flush(brw_context(&intel->ctx),
146 BRW_FLUSH_STATE_CACHE|BRW_FLUSH_READ_CACHE);
147 }
148
149
150 /* called from intelWaitForIdle() and intelFlush()
151 *
152 * For now, just flush everything. Could be smarter later.
153 */
154 static GLuint brw_flush_cmd( void )
155 {
156 struct brw_mi_flush flush;
157 flush.opcode = CMD_MI_FLUSH;
158 flush.pad = 0;
159 flush.flags = BRW_FLUSH_READ_CACHE | BRW_FLUSH_STATE_CACHE;
160 return *(GLuint *)&flush;
161 }
162
163
164
165
166 static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
167 {
168 GLcontext *ctx = &intel->ctx;
169
170 brw_exec_invalidate_state(ctx, new_state);
171 brw_save_invalidate_state(ctx, new_state);
172 }
173
174
175 void brwInitVtbl( struct brw_context *brw )
176 {
177 brw->intel.vtbl.check_vertex_size = 0;
178 brw->intel.vtbl.emit_state = 0;
179 brw->intel.vtbl.reduced_primitive_state = 0;
180 brw->intel.vtbl.render_start = 0;
181 brw->intel.vtbl.update_texture_state = 0;
182
183 brw->intel.vtbl.invalidate_state = brw_invalidate_state;
184 brw->intel.vtbl.note_fence = brw_note_fence;
185 brw->intel.vtbl.note_unlock = brw_note_unlock;
186 brw->intel.vtbl.lost_hardware = brw_lost_hardware;
187 brw->intel.vtbl.destroy = brw_destroy_context;
188 brw->intel.vtbl.set_draw_region = brw_set_draw_region;
189 brw->intel.vtbl.flush_cmd = brw_flush_cmd;
190 brw->intel.vtbl.emit_flush = brw_emit_flush;
191 }
192