src/mesa/drivers/dri/i965/brw_vtbl.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26 **********************************************************************/
  27
  28 /*
  29  * Authors:
  30  *   Keith Whitwell <keith@tungstengraphics.com>
  31  */
  32
  33 #include "main/glheader.h"
  34 #include "main/mtypes.h"
  35 #include "main/imports.h"
  36 #include "main/macros.h"
  37 #include "main/colormac.h"
  38 #include "main/renderbuffer.h"
  39 #include "main/framebuffer.h"
  40
  41 #include "intel_batchbuffer.h"
  42 #include "intel_regions.h"
  43 #include "intel_fbo.h"
  44
  45 #include "brw_context.h"
  46 #include "brw_program.h"
  47 #include "brw_defines.h"
  48 #include "brw_state.h"
  49 #include "brw_draw.h"
  50 #include "brw_vs.h"
  51 #include "brw_wm.h"
  52
  53 #include "gen6_blorp.h"
  54 #include "gen7_blorp.h"
  55
  56 #include "glsl/ralloc.h"
  57
  58 static void
  59 dri_bo_release(drm_intel_bo **bo)
  60 {
  61    drm_intel_bo_unreference(*bo);
  62    *bo = NULL;
  63 }
  64
  65
  66 /**
  67  * called from intelDestroyContext()
  68  */
  69 static void brw_destroy_context( struct intel_context *intel )
  70 {
  71    struct brw_context *brw = brw_context(&intel->ctx);
  72
  73    if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
  74       /* Force a report. */
  75       brw->shader_time.report_time = 0;
  76
  77       brw_collect_and_report_shader_time(brw);
  78       brw_destroy_shader_time(brw);
  79    }
  80
  81    brw_destroy_state(brw);
  82    brw_draw_destroy( brw );
  83
  84    dri_bo_release(&brw->curbe.curbe_bo);
  85    dri_bo_release(&brw->vs.const_bo);
  86    dri_bo_release(&brw->wm.const_bo);
  87
  88    free(brw->curbe.last_buf);
  89    free(brw->curbe.next_buf);
  90
  91    drm_intel_gem_context_destroy(intel->hw_ctx);
  92 }
  93
  94 /**
  95  * Update the hardware state for drawing into a window or framebuffer object.
  96  *
  97  * Called by glDrawBuffer, glBindFramebufferEXT, MakeCurrent, and other
  98  * places within the driver.
  99  *
 100  * Basically, this needs to be called any time the current framebuffer
 101  * changes, the renderbuffers change, or we need to draw into different
 102  * color buffers.
 103  */
 104 static void
 105 brw_update_draw_buffer(struct intel_context *intel)
 106 {
 107    struct gl_context *ctx = &intel->ctx;
 108    struct gl_framebuffer *fb = ctx->DrawBuffer;
 109
 110    if (!fb) {
 111       /* this can happen during the initial context initialization */
 112       return;
 113    }
 114
 115    /* Do this here, not core Mesa, since this function is called from
 116     * many places within the driver.
 117     */
 118    if (ctx->NewState & _NEW_BUFFERS) {
 119       /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */
 120       _mesa_update_framebuffer(ctx);
 121       /* this updates the DrawBuffer's Width/Height if it's a FBO */
 122       _mesa_update_draw_buffer_bounds(ctx);
 123    }
 124
 125    if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
 126       /* this may occur when we're called by glBindFrameBuffer() during
 127        * the process of someone setting up renderbuffers, etc.
 128        */
 129       /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/
 130       return;
 131    }
 132
 133    /* Mesa's Stencil._Enabled field is updated when
 134     * _NEW_BUFFERS | _NEW_STENCIL, but i965 code assumes that the value
 135     * only changes with _NEW_STENCIL (which seems sensible).  So flag it
 136     * here since this is the _NEW_BUFFERS path.
 137     */
 138    intel->NewGLState |= (_NEW_DEPTH | _NEW_STENCIL);
 139
 140    /* The driver uses this in places that need to look up
 141     * renderbuffers' buffer objects.
 142     */
 143    intel->NewGLState |= _NEW_BUFFERS;
 144
 145    /* update viewport/scissor since it depends on window size */
 146    intel->NewGLState |= _NEW_VIEWPORT | _NEW_SCISSOR;
 147
 148    /* Update culling direction which changes depending on the
 149     * orientation of the buffer:
 150     */
 151    intel->NewGLState |= _NEW_POLYGON;
 152 }
 153
 154 /**
 155  * called from intel_batchbuffer_flush and children before sending a
 156  * batchbuffer off.
 157  *
 158  * Note that ALL state emitted here must fit in the reserved space
 159  * at the end of a batchbuffer.  If you add more GPU state, increase
 160  * the BATCH_RESERVED macro.
 161  */
 162 static void brw_finish_batch(struct intel_context *intel)
 163 {
 164    struct brw_context *brw = brw_context(&intel->ctx);
 165    brw_emit_query_end(brw);
 166
 167    if (brw->curbe.curbe_bo) {
 168       drm_intel_gem_bo_unmap_gtt(brw->curbe.curbe_bo);
 169       drm_intel_bo_unreference(brw->curbe.curbe_bo);
 170       brw->curbe.curbe_bo = NULL;
 171    }
 172 }
 173
 174
 175 /**
 176  * called from intelFlushBatchLocked
 177  */
 178 static void brw_new_batch( struct intel_context *intel )
 179 {
 180    struct brw_context *brw = brw_context(&intel->ctx);
 181
 182    /* If the kernel supports hardware contexts, then most hardware state is
 183     * preserved between batches; we only need to re-emit state that is required
 184     * to be in every batch.  Otherwise we need to re-emit all the state that
 185     * would otherwise be stored in the context (which for all intents and
 186     * purposes means everything).
 187     */
 188    if (intel->hw_ctx == NULL)
 189       brw->state.dirty.brw |= BRW_NEW_CONTEXT;
 190
 191    brw->state.dirty.brw |= BRW_NEW_BATCH;
 192
 193    /* Assume that the last command before the start of our batch was a
 194     * primitive, for safety.
 195     */
 196    intel->batch.need_workaround_flush = true;
 197
 198    brw->state_batch_count = 0;
 199
 200    /* Gen7 needs to track what the real transform feedback vertex count was at
 201     * the start of the batch, since the kernel will be resetting the offset to
 202     * 0.
 203     */
 204    brw->sol.offset_0_batch_start = brw->sol.svbi_0_starting_index;
 205
 206    brw->ib.type = -1;
 207
 208    /* Mark that the current program cache BO has been used by the GPU.
 209     * It will be reallocated if we need to put new programs in for the
 210     * next batch.
 211     */
 212    brw->cache.bo_used_by_gpu = true;
 213
 214    /* We need to periodically reap the shader time results, because rollover
 215     * happens every few seconds.  We also want to see results every once in a
 216     * while, because many programs won't cleanly destroy our context, so the
 217     * end-of-run printout may not happen.
 218     */
 219    if (INTEL_DEBUG & DEBUG_SHADER_TIME)
 220       brw_collect_and_report_shader_time(brw);
 221 }
 222
 223 static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
 224 {
 225    /* nothing */
 226 }
 227
 228 /**
 229  * \see intel_context.vtbl.is_hiz_depth_format
 230  */
 231 static bool brw_is_hiz_depth_format(struct intel_context *intel,
 232                                     gl_format format)
 233 {
 234    if (!intel->has_hiz)
 235       return false;
 236
 237    switch (format) {
 238    case MESA_FORMAT_Z32_FLOAT:
 239    case MESA_FORMAT_Z32_FLOAT_X24S8:
 240    case MESA_FORMAT_X8_Z24:
 241    case MESA_FORMAT_S8_Z24:
 242    case MESA_FORMAT_Z16:
 243       return true;
 244    default:
 245       return false;
 246    }
 247 }
 248
 249 void brwInitVtbl( struct brw_context *brw )
 250 {
 251    brw->intel.vtbl.check_vertex_size = 0;
 252    brw->intel.vtbl.emit_state = 0;
 253    brw->intel.vtbl.reduced_primitive_state = 0;
 254    brw->intel.vtbl.render_start = 0;
 255    brw->intel.vtbl.update_texture_state = 0;
 256
 257    brw->intel.vtbl.invalidate_state = brw_invalidate_state;
 258    brw->intel.vtbl.new_batch = brw_new_batch;
 259    brw->intel.vtbl.finish_batch = brw_finish_batch;
 260    brw->intel.vtbl.destroy = brw_destroy_context;
 261    brw->intel.vtbl.update_draw_buffer = brw_update_draw_buffer;
 262    brw->intel.vtbl.debug_batch = brw_debug_batch;
 263    brw->intel.vtbl.annotate_aub = brw_annotate_aub;
 264    brw->intel.vtbl.render_target_supported = brw_render_target_supported;
 265    brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format;
 266
 267    assert(brw->intel.gen >= 4);
 268    if (brw->intel.gen >= 7) {
 269       gen7_init_vtable_surface_functions(brw);
 270       brw->intel.vtbl.emit_depth_stencil_hiz = gen7_emit_depth_stencil_hiz;
 271    } else if (brw->intel.gen >= 4) {
 272       gen4_init_vtable_surface_functions(brw);
 273       brw->intel.vtbl.emit_depth_stencil_hiz = brw_emit_depth_stencil_hiz;
 274    }
 275 }