i965: Add separate stencil/HiZ setup for MESA_FORMAT_Z32_FLOAT_X24S8.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vtbl.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27
28 /*
29 * Authors:
30 * Keith Whitwell <keith@tungstengraphics.com>
31 */
32
33 #include "main/glheader.h"
34 #include "main/mtypes.h"
35 #include "main/imports.h"
36 #include "main/macros.h"
37 #include "main/colormac.h"
38 #include "main/renderbuffer.h"
39 #include "main/framebuffer.h"
40
41 #include "intel_batchbuffer.h"
42 #include "intel_regions.h"
43 #include "intel_fbo.h"
44
45 #include "brw_context.h"
46 #include "brw_defines.h"
47 #include "brw_state.h"
48 #include "brw_draw.h"
49 #include "brw_vs.h"
50 #include "brw_wm.h"
51
52 #include "gen6_hiz.h"
53
54 #include "glsl/ralloc.h"
55
56 static void
57 dri_bo_release(drm_intel_bo **bo)
58 {
59 drm_intel_bo_unreference(*bo);
60 *bo = NULL;
61 }
62
63
64 /**
65 * called from intelDestroyContext()
66 */
67 static void brw_destroy_context( struct intel_context *intel )
68 {
69 struct brw_context *brw = brw_context(&intel->ctx);
70
71 brw_destroy_state(brw);
72 brw_draw_destroy( brw );
73 ralloc_free(brw->wm.compile_data);
74
75 dri_bo_release(&brw->curbe.curbe_bo);
76 dri_bo_release(&brw->vs.const_bo);
77 dri_bo_release(&brw->wm.const_bo);
78
79 free(brw->curbe.last_buf);
80 free(brw->curbe.next_buf);
81 }
82
83 /**
84 * Update the hardware state for drawing into a window or framebuffer object.
85 *
86 * Called by glDrawBuffer, glBindFramebufferEXT, MakeCurrent, and other
87 * places within the driver.
88 *
89 * Basically, this needs to be called any time the current framebuffer
90 * changes, the renderbuffers change, or we need to draw into different
91 * color buffers.
92 */
93 static void
94 brw_update_draw_buffer(struct intel_context *intel)
95 {
96 struct gl_context *ctx = &intel->ctx;
97 struct gl_framebuffer *fb = ctx->DrawBuffer;
98
99 if (!fb) {
100 /* this can happen during the initial context initialization */
101 return;
102 }
103
104 /* Do this here, not core Mesa, since this function is called from
105 * many places within the driver.
106 */
107 if (ctx->NewState & _NEW_BUFFERS) {
108 /* this updates the DrawBuffer->_NumColorDrawBuffers fields, etc */
109 _mesa_update_framebuffer(ctx);
110 /* this updates the DrawBuffer's Width/Height if it's a FBO */
111 _mesa_update_draw_buffer_bounds(ctx);
112 }
113
114 if (fb->_Status != GL_FRAMEBUFFER_COMPLETE_EXT) {
115 /* this may occur when we're called by glBindFrameBuffer() during
116 * the process of someone setting up renderbuffers, etc.
117 */
118 /*_mesa_debug(ctx, "DrawBuffer: incomplete user FBO\n");*/
119 return;
120 }
121
122 /* Mesa's Stencil._Enabled field is updated when
123 * _NEW_BUFFERS | _NEW_STENCIL, but i965 code assumes that the value
124 * only changes with _NEW_STENCIL (which seems sensible). So flag it
125 * here since this is the _NEW_BUFFERS path.
126 */
127 intel->NewGLState |= (_NEW_DEPTH | _NEW_STENCIL);
128
129 /* The driver uses this in places that need to look up
130 * renderbuffers' buffer objects.
131 */
132 intel->NewGLState |= _NEW_BUFFERS;
133
134 /* update viewport/scissor since it depends on window size */
135 intel->NewGLState |= _NEW_VIEWPORT | _NEW_SCISSOR;
136
137 /* Update culling direction which changes depending on the
138 * orientation of the buffer:
139 */
140 intel->NewGLState |= _NEW_POLYGON;
141 }
142
143 /**
144 * called from intel_batchbuffer_flush and children before sending a
145 * batchbuffer off.
146 */
147 static void brw_finish_batch(struct intel_context *intel)
148 {
149 struct brw_context *brw = brw_context(&intel->ctx);
150 brw_emit_query_end(brw);
151
152 if (brw->curbe.curbe_bo) {
153 drm_intel_gem_bo_unmap_gtt(brw->curbe.curbe_bo);
154 drm_intel_bo_unreference(brw->curbe.curbe_bo);
155 brw->curbe.curbe_bo = NULL;
156 }
157 }
158
159
160 /**
161 * called from intelFlushBatchLocked
162 */
163 static void brw_new_batch( struct intel_context *intel )
164 {
165 struct brw_context *brw = brw_context(&intel->ctx);
166
167 /* Mark all context state as needing to be re-emitted.
168 * This is probably not as severe as on 915, since almost all of our state
169 * is just in referenced buffers.
170 */
171 brw->state.dirty.brw |= BRW_NEW_CONTEXT | BRW_NEW_BATCH;
172
173 /* Assume that the last command before the start of our batch was a
174 * primitive, for safety.
175 */
176 intel->batch.need_workaround_flush = true;
177
178 brw->state_batch_count = 0;
179
180 brw->vb.nr_current_buffers = 0;
181 brw->ib.type = -1;
182
183 /* Mark that the current program cache BO has been used by the GPU.
184 * It will be reallocated if we need to put new programs in for the
185 * next batch.
186 */
187 brw->cache.bo_used_by_gpu = true;
188 }
189
190 static void brw_invalidate_state( struct intel_context *intel, GLuint new_state )
191 {
192 /* nothing */
193 }
194
195 /**
196 * \see intel_context.vtbl.is_hiz_depth_format
197 */
198 static bool brw_is_hiz_depth_format(struct intel_context *intel,
199 gl_format format)
200 {
201 if (!intel->has_hiz)
202 return false;
203
204 switch (format) {
205 case MESA_FORMAT_Z32_FLOAT:
206 case MESA_FORMAT_Z32_FLOAT_X24S8:
207 case MESA_FORMAT_X8_Z24:
208 case MESA_FORMAT_S8_Z24:
209 return true;
210 default:
211 return false;
212 }
213 }
214
215 void brwInitVtbl( struct brw_context *brw )
216 {
217 brw->intel.vtbl.check_vertex_size = 0;
218 brw->intel.vtbl.emit_state = 0;
219 brw->intel.vtbl.reduced_primitive_state = 0;
220 brw->intel.vtbl.render_start = 0;
221 brw->intel.vtbl.update_texture_state = 0;
222
223 brw->intel.vtbl.invalidate_state = brw_invalidate_state;
224 brw->intel.vtbl.new_batch = brw_new_batch;
225 brw->intel.vtbl.finish_batch = brw_finish_batch;
226 brw->intel.vtbl.destroy = brw_destroy_context;
227 brw->intel.vtbl.update_draw_buffer = brw_update_draw_buffer;
228 brw->intel.vtbl.debug_batch = brw_debug_batch;
229 brw->intel.vtbl.render_target_supported = brw_render_target_supported;
230 brw->intel.vtbl.is_hiz_depth_format = brw_is_hiz_depth_format;
231
232 if (brw->intel.has_hiz) {
233 brw->intel.vtbl.resolve_depth_slice = gen6_resolve_depth_slice;
234 brw->intel.vtbl.resolve_hiz_slice = gen6_resolve_hiz_slice;
235 }
236
237 if (brw->intel.gen >= 7) {
238 gen7_init_vtable_surface_functions(brw);
239 } else if (brw->intel.gen >= 4) {
240 gen4_init_vtable_surface_functions(brw);
241 }
242 }