i965: quieten compiler warning about out-of-bounds access
[mesa.git] / src / mesa / drivers / dri / i965 / brw_vue_map.c
1 /*
2 * Copyright © 2011 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 /**
25 * @file brw_vue_map.c
26 *
27 * This file computes the "VUE map" for a (non-fragment) shader stage, which
28 * describes the layout of its output varyings. The VUE map is used to match
29 * outputs from one stage with the inputs of the next.
30 *
31 * Largely, varyings can be placed however we like - producers/consumers simply
32 * have to agree on the layout. However, there is also a "VUE Header" that
33 * prescribes a fixed-layout for items that interact with fixed function
34 * hardware, such as the clipper and rasterizer.
35 *
36 * Authors:
37 * Paul Berry <stereotype441@gmail.com>
38 * Chris Forbes <chrisf@ijw.co.nz>
39 * Eric Anholt <eric@anholt.net>
40 */
41
42
43 #include "brw_context.h"
44
45 static inline void
46 assign_vue_slot(struct brw_vue_map *vue_map, int varying, int slot)
47 {
48 /* Make sure this varying hasn't been assigned a slot already */
49 assert (vue_map->varying_to_slot[varying] == -1);
50
51 vue_map->varying_to_slot[varying] = slot;
52 vue_map->slot_to_varying[slot] = varying;
53 }
54
55 /**
56 * Compute the VUE map for a shader stage.
57 */
58 void
59 brw_compute_vue_map(const struct brw_device_info *devinfo,
60 struct brw_vue_map *vue_map,
61 GLbitfield64 slots_valid,
62 bool separate)
63 {
64 /* Keep using the packed/contiguous layout on old hardware - we only need
65 * the SSO layout when using geometry/tessellation shaders or 32 FS input
66 * varyings, which only exist on Gen >= 6. It's also a bit more efficient.
67 */
68 if (devinfo->gen < 6)
69 separate = false;
70
71 vue_map->slots_valid = slots_valid;
72 vue_map->separate = separate;
73
74 /* gl_Layer and gl_ViewportIndex don't get their own varying slots -- they
75 * are stored in the first VUE slot (VARYING_SLOT_PSIZ).
76 */
77 slots_valid &= ~(VARYING_BIT_LAYER | VARYING_BIT_VIEWPORT);
78
79 /* Make sure that the values we store in vue_map->varying_to_slot and
80 * vue_map->slot_to_varying won't overflow the signed chars that are used
81 * to store them. Note that since vue_map->slot_to_varying sometimes holds
82 * values equal to BRW_VARYING_SLOT_COUNT, we need to ensure that
83 * BRW_VARYING_SLOT_COUNT is <= 127, not 128.
84 */
85 STATIC_ASSERT(BRW_VARYING_SLOT_COUNT <= 127);
86
87 for (int i = 0; i < BRW_VARYING_SLOT_COUNT; ++i) {
88 vue_map->varying_to_slot[i] = -1;
89 vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_PAD;
90 }
91
92 int slot = 0;
93
94 /* VUE header: format depends on chip generation and whether clipping is
95 * enabled.
96 *
97 * See the Sandybridge PRM, Volume 2 Part 1, section 1.5.1 (page 30),
98 * "Vertex URB Entry (VUE) Formats" which describes the VUE header layout.
99 */
100 if (devinfo->gen < 6) {
101 /* There are 8 dwords in VUE header pre-Ironlake:
102 * dword 0-3 is indices, point width, clip flags.
103 * dword 4-7 is ndc position
104 * dword 8-11 is the first vertex data.
105 *
106 * On Ironlake the VUE header is nominally 20 dwords, but the hardware
107 * will accept the same header layout as Gen4 [and should be a bit faster]
108 */
109 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++);
110 assign_vue_slot(vue_map, BRW_VARYING_SLOT_NDC, slot++);
111 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++);
112 } else {
113 /* There are 8 or 16 DWs (D0-D15) in VUE header on Sandybridge:
114 * dword 0-3 of the header is indices, point width, clip flags.
115 * dword 4-7 is the 4D space position
116 * dword 8-15 of the vertex header is the user clip distance if
117 * enabled.
118 * dword 8-11 or 16-19 is the first vertex element data we fill.
119 */
120 assign_vue_slot(vue_map, VARYING_SLOT_PSIZ, slot++);
121 assign_vue_slot(vue_map, VARYING_SLOT_POS, slot++);
122 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST0))
123 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST0, slot++);
124 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_CLIP_DIST1))
125 assign_vue_slot(vue_map, VARYING_SLOT_CLIP_DIST1, slot++);
126
127 /* front and back colors need to be consecutive so that we can use
128 * ATTRIBUTE_SWIZZLE_INPUTATTR_FACING to swizzle them when doing
129 * two-sided color.
130 */
131 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL0))
132 assign_vue_slot(vue_map, VARYING_SLOT_COL0, slot++);
133 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC0))
134 assign_vue_slot(vue_map, VARYING_SLOT_BFC0, slot++);
135 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_COL1))
136 assign_vue_slot(vue_map, VARYING_SLOT_COL1, slot++);
137 if (slots_valid & BITFIELD64_BIT(VARYING_SLOT_BFC1))
138 assign_vue_slot(vue_map, VARYING_SLOT_BFC1, slot++);
139 }
140
141 /* The hardware doesn't care about the rest of the vertex outputs, so we
142 * can assign them however we like. For normal programs, we simply assign
143 * them contiguously.
144 *
145 * For separate shader pipelines, we first assign built-in varyings
146 * contiguous slots. This works because ARB_separate_shader_objects
147 * requires that all shaders have matching built-in varying interface
148 * blocks. Next, we assign generic varyings based on their location
149 * (either explicit or linker assigned). This guarantees a fixed layout.
150 *
151 * We generally don't need to assign a slot for VARYING_SLOT_CLIP_VERTEX,
152 * since it's encoded as the clip distances by emit_clip_distances().
153 * However, it may be output by transform feedback, and we'd rather not
154 * recompute state when TF changes, so we just always include it.
155 */
156 GLbitfield64 builtins = slots_valid & BITFIELD64_MASK(VARYING_SLOT_VAR0);
157 while (builtins != 0) {
158 const int varying = ffsll(builtins) - 1;
159 if (vue_map->varying_to_slot[varying] == -1) {
160 assign_vue_slot(vue_map, varying, slot++);
161 }
162 builtins &= ~BITFIELD64_BIT(varying);
163 }
164
165 const int first_generic_slot = slot;
166 GLbitfield64 generics = slots_valid & ~BITFIELD64_MASK(VARYING_SLOT_VAR0);
167 while (generics != 0) {
168 const int varying = ffsll(generics) - 1;
169 if (separate) {
170 slot = first_generic_slot + varying - VARYING_SLOT_VAR0;
171 assign_vue_slot(vue_map, varying, slot);
172 } else {
173 assign_vue_slot(vue_map, varying, slot++);
174 }
175 generics &= ~BITFIELD64_BIT(varying);
176 }
177
178 vue_map->num_slots = separate ? slot + 1 : slot;
179 vue_map->num_per_vertex_slots = 0;
180 vue_map->num_per_patch_slots = 0;
181 }
182
183 /**
184 * Compute the VUE map for tessellation control shader outputs and
185 * tessellation evaluation shader inputs.
186 */
187 void
188 brw_compute_tess_vue_map(struct brw_vue_map *vue_map,
189 GLbitfield64 vertex_slots,
190 GLbitfield patch_slots)
191 {
192 /* I don't think anything actually uses this... */
193 vue_map->slots_valid = vertex_slots;
194
195 vertex_slots &= ~(VARYING_BIT_TESS_LEVEL_OUTER |
196 VARYING_BIT_TESS_LEVEL_INNER);
197
198 /* Make sure that the values we store in vue_map->varying_to_slot and
199 * vue_map->slot_to_varying won't overflow the signed chars that are used
200 * to store them. Note that since vue_map->slot_to_varying sometimes holds
201 * values equal to VARYING_SLOT_TESS_MAX , we need to ensure that
202 * VARYING_SLOT_TESS_MAX is <= 127, not 128.
203 */
204 STATIC_ASSERT(VARYING_SLOT_TESS_MAX <= 127);
205
206 for (int i = 0; i < VARYING_SLOT_TESS_MAX ; ++i) {
207 vue_map->varying_to_slot[i] = -1;
208 vue_map->slot_to_varying[i] = BRW_VARYING_SLOT_PAD;
209 }
210
211 int slot = 0;
212
213 /* The first 8 DWords are reserved for the "Patch Header".
214 *
215 * VARYING_SLOT_TESS_LEVEL_OUTER / INNER live here, but the exact layout
216 * depends on the domain type. They might not be in slots 0 and 1 as
217 * described here, but pretending they're separate allows us to uniquely
218 * identify them by distinct slot locations.
219 */
220 assign_vue_slot(vue_map, VARYING_SLOT_TESS_LEVEL_INNER, slot++);
221 assign_vue_slot(vue_map, VARYING_SLOT_TESS_LEVEL_OUTER, slot++);
222
223 /* first assign per-patch varyings */
224 while (patch_slots != 0) {
225 const int varying = ffsll(patch_slots) - 1;
226 if (vue_map->varying_to_slot[varying + VARYING_SLOT_PATCH0] == -1) {
227 assign_vue_slot(vue_map, varying + VARYING_SLOT_PATCH0, slot++);
228 }
229 patch_slots &= ~BITFIELD64_BIT(varying);
230 }
231
232 /* apparently, including the patch header... */
233 vue_map->num_per_patch_slots = slot;
234
235 /* then assign per-vertex varyings for each vertex in our patch */
236 while (vertex_slots != 0) {
237 const int varying = ffsll(vertex_slots) - 1;
238 if (vue_map->varying_to_slot[varying] == -1) {
239 assign_vue_slot(vue_map, varying, slot++);
240 }
241 vertex_slots &= ~BITFIELD64_BIT(varying);
242 }
243
244 vue_map->num_per_vertex_slots = slot - vue_map->num_per_patch_slots;
245 vue_map->num_slots = slot;
246 }
247
248 static const char *
249 varying_name(brw_varying_slot slot)
250 {
251 if (slot < VARYING_SLOT_MAX)
252 return gl_varying_slot_name(slot);
253
254 static const char *brw_names[] = {
255 [BRW_VARYING_SLOT_NDC - VARYING_SLOT_MAX] = "BRW_VARYING_SLOT_NDC",
256 [BRW_VARYING_SLOT_PAD - VARYING_SLOT_MAX] = "BRW_VARYING_SLOT_PAD",
257 [BRW_VARYING_SLOT_PNTC - VARYING_SLOT_MAX] = "BRW_VARYING_SLOT_PNTC",
258 };
259
260 assert(slot < BRW_VARYING_SLOT_COUNT);
261 return brw_names[slot - VARYING_SLOT_MAX];
262 }
263
264 void
265 brw_print_vue_map(FILE *fp, const struct brw_vue_map *vue_map)
266 {
267 if (vue_map->num_per_vertex_slots > 0 || vue_map->num_per_patch_slots > 0) {
268 fprintf(fp, "PUE map (%d slots, %d/patch, %d/vertex, %s)\n",
269 vue_map->num_slots,
270 vue_map->num_per_patch_slots,
271 vue_map->num_per_vertex_slots,
272 vue_map->separate ? "SSO" : "non-SSO");
273 for (int i = 0; i < vue_map->num_slots; i++) {
274 if (vue_map->slot_to_varying[i] >= VARYING_SLOT_PATCH0) {
275 fprintf(fp, " [%d] VARYING_SLOT_PATCH%d\n", i,
276 vue_map->slot_to_varying[i] - VARYING_SLOT_PATCH0);
277 } else {
278 fprintf(fp, " [%d] %s\n", i,
279 varying_name(vue_map->slot_to_varying[i]));
280 }
281 }
282 } else {
283 fprintf(fp, "VUE map (%d slots, %s)\n",
284 vue_map->num_slots, vue_map->separate ? "SSO" : "non-SSO");
285 for (int i = 0; i < vue_map->num_slots; i++) {
286 fprintf(fp, " [%d] %s\n", i,
287 varying_name(vue_map->slot_to_varying[i]));
288 }
289 }
290 fprintf(fp, "\n");
291 }