Merge branch 'origin'
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "brw_context.h"
34 #include "brw_util.h"
35 #include "brw_wm.h"
36 #include "brw_state.h"
37 #include "brw_hal.h"
38
39 #include "program.h"
40 #include "program_instruction.h"
41 #include "arbprogparse.h"
42
43
44 GLuint brw_wm_nr_args( GLuint opcode )
45 {
46 switch (opcode) {
47
48 case WM_PIXELXY:
49 case OPCODE_ABS:
50 case OPCODE_FLR:
51 case OPCODE_FRC:
52 case OPCODE_SWZ:
53 case OPCODE_MOV:
54 case OPCODE_COS:
55 case OPCODE_EX2:
56 case OPCODE_LG2:
57 case OPCODE_RCP:
58 case OPCODE_RSQ:
59 case OPCODE_SIN:
60 case OPCODE_SCS:
61 case OPCODE_TEX:
62 case OPCODE_TXB:
63 case OPCODE_TXP:
64 case OPCODE_KIL:
65 case OPCODE_LIT:
66 case WM_CINTERP:
67 case WM_WPOSXY:
68 return 1;
69
70 case OPCODE_POW:
71 case OPCODE_SUB:
72 case OPCODE_SGE:
73 case OPCODE_SLT:
74 case OPCODE_ADD:
75 case OPCODE_MAX:
76 case OPCODE_MIN:
77 case OPCODE_MUL:
78 case OPCODE_XPD:
79 case OPCODE_DP3:
80 case OPCODE_DP4:
81 case OPCODE_DPH:
82 case OPCODE_DST:
83 case WM_LINTERP:
84 case WM_DELTAXY:
85 case WM_PIXELW:
86 return 2;
87
88 case WM_FB_WRITE:
89 case WM_PINTERP:
90 case OPCODE_MAD:
91 case OPCODE_CMP:
92 case OPCODE_LRP:
93 return 3;
94
95 default:
96 return 0;
97 }
98 }
99
100
101 GLuint brw_wm_is_scalar_result( GLuint opcode )
102 {
103 switch (opcode) {
104 case OPCODE_COS:
105 case OPCODE_EX2:
106 case OPCODE_LG2:
107 case OPCODE_POW:
108 case OPCODE_RCP:
109 case OPCODE_RSQ:
110 case OPCODE_SIN:
111 case OPCODE_DP3:
112 case OPCODE_DP4:
113 case OPCODE_DPH:
114 case OPCODE_DST:
115 return 1;
116
117 default:
118 return 0;
119 }
120 }
121
122
123 static void brw_wm_pass_hal (struct brw_wm_compile *c)
124 {
125 static void (*hal_wm_pass) (struct brw_wm_compile *c);
126 static GLboolean hal_tried;
127
128 if (!hal_tried)
129 {
130 hal_wm_pass = brw_hal_find_symbol ("intel_hal_wm_pass");
131 hal_tried = 1;
132 }
133 if (hal_wm_pass)
134 (*hal_wm_pass) (c);
135 }
136
137 static void do_wm_prog( struct brw_context *brw,
138 struct brw_fragment_program *fp,
139 struct brw_wm_prog_key *key)
140 {
141 struct brw_wm_compile *c;
142 const GLuint *program;
143 GLuint program_size;
144
145 c = brw->wm.compile_data;
146 if (c == NULL) {
147 brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data));
148 c = brw->wm.compile_data;
149 } else {
150 memset(c, 0, sizeof(*brw->wm.compile_data));
151 }
152 memcpy(&c->key, key, sizeof(*key));
153
154 c->fp = fp;
155 c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
156
157
158 /* Augment fragment program. Add instructions for pre- and
159 * post-fragment-program tasks such as interpolation and fogging.
160 */
161 brw_wm_pass_fp(c);
162
163 /* Translate to intermediate representation. Build register usage
164 * chains.
165 */
166 brw_wm_pass0(c);
167
168 /* Dead code removal.
169 */
170 brw_wm_pass1(c);
171
172 /* Hal optimization
173 */
174 brw_wm_pass_hal (c);
175
176 /* Register allocation.
177 */
178 c->grf_limit = BRW_WM_MAX_GRF/2;
179
180 /* This is where we start emitting gen4 code:
181 */
182 brw_init_compile(&c->func);
183
184 brw_wm_pass2(c);
185
186 c->prog_data.total_grf = c->max_wm_grf;
187 if (c->last_scratch) {
188 c->prog_data.total_scratch =
189 c->last_scratch + 0x40;
190 } else {
191 c->prog_data.total_scratch = 0;
192 }
193
194 /* Emit GEN4 code.
195 */
196 brw_wm_emit(c);
197
198 /* get the program
199 */
200 program = brw_get_program(&c->func, &program_size);
201
202 /*
203 */
204 brw->wm.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_WM_PROG],
205 &c->key,
206 sizeof(c->key),
207 program,
208 program_size,
209 &c->prog_data,
210 &brw->wm.prog_data );
211 }
212
213
214
215 static void brw_wm_populate_key( struct brw_context *brw,
216 struct brw_wm_prog_key *key )
217 {
218 /* BRW_NEW_FRAGMENT_PROGRAM */
219 struct brw_fragment_program *fp =
220 (struct brw_fragment_program *)brw->fragment_program;
221 GLuint lookup = 0;
222 GLuint line_aa;
223 GLuint i;
224
225 memset(key, 0, sizeof(*key));
226
227 /* Build the index for table lookup
228 */
229 /* _NEW_COLOR */
230 if (fp->program.UsesKill ||
231 brw->attribs.Color->AlphaEnabled)
232 lookup |= IZ_PS_KILL_ALPHATEST_BIT;
233
234 if (fp->program.Base.OutputsWritten & (1<<FRAG_RESULT_DEPR))
235 lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
236
237 /* _NEW_DEPTH */
238 if (brw->attribs.Depth->Test)
239 lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
240
241 if (brw->attribs.Depth->Test &&
242 brw->attribs.Depth->Mask) /* ?? */
243 lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
244
245 /* _NEW_STENCIL */
246 if (brw->attribs.Stencil->Enabled) {
247 lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
248
249 if (brw->attribs.Stencil->WriteMask[0] ||
250 (brw->attribs.Stencil->TestTwoSide && brw->attribs.Stencil->WriteMask[1]))
251 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
252 }
253
254 /* XXX: when should this be disabled?
255 */
256 if (1)
257 lookup |= IZ_EARLY_DEPTH_TEST_BIT;
258
259
260 line_aa = AA_NEVER;
261
262 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
263 if (brw->attribs.Line->SmoothFlag) {
264 if (brw->intel.reduced_primitive == GL_LINES) {
265 line_aa = AA_ALWAYS;
266 }
267 else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
268 if (brw->attribs.Polygon->FrontMode == GL_LINE) {
269 line_aa = AA_SOMETIMES;
270
271 if (brw->attribs.Polygon->BackMode == GL_LINE ||
272 (brw->attribs.Polygon->CullFlag &&
273 brw->attribs.Polygon->CullFaceMode == GL_BACK))
274 line_aa = AA_ALWAYS;
275 }
276 else if (brw->attribs.Polygon->BackMode == GL_LINE) {
277 line_aa = AA_SOMETIMES;
278
279 if ((brw->attribs.Polygon->CullFlag &&
280 brw->attribs.Polygon->CullFaceMode == GL_FRONT))
281 line_aa = AA_ALWAYS;
282 }
283 }
284 }
285
286 brw_wm_lookup_iz(line_aa,
287 lookup,
288 key);
289
290
291 /* BRW_NEW_WM_INPUT_DIMENSIONS */
292 key->projtex_mask = brw->wm.input_size_masks[4-1];
293
294 /* _NEW_LIGHT */
295 key->flat_shade = (brw->attribs.Light->ShadeModel == GL_FLAT);
296
297 /* _NEW_TEXTURE */
298 for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
299 const struct gl_texture_unit *unit = &brw->attribs.Texture->Unit[i];
300 const struct gl_texture_object *t = unit->_Current;
301
302 if (unit->_ReallyEnabled) {
303
304 if (t->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB &&
305 t->Image[0][t->BaseLevel]->_BaseFormat == GL_DEPTH_COMPONENT) {
306 key->shadowtex_mask |= 1<<i;
307 }
308
309 if (t->Image[0][t->BaseLevel]->InternalFormat == GL_YCBCR_MESA)
310 key->yuvtex_mask |= 1<<i;
311 }
312 }
313
314
315 /* Extra info:
316 */
317 key->program_string_id = fp->id;
318
319 }
320
321
322 static void brw_upload_wm_prog( struct brw_context *brw )
323 {
324 struct brw_wm_prog_key key;
325 struct brw_fragment_program *fp = (struct brw_fragment_program *)
326 brw->fragment_program;
327
328 brw_wm_populate_key(brw, &key);
329
330 /* Make an early check for the key.
331 */
332 if (brw_search_cache(&brw->cache[BRW_WM_PROG],
333 &key, sizeof(key),
334 &brw->wm.prog_data,
335 &brw->wm.prog_gs_offset))
336 return;
337
338 do_wm_prog(brw, fp, &key);
339 }
340
341
342 /* See brw_wm.c:
343 */
344 const struct brw_tracked_state brw_wm_prog = {
345 .dirty = {
346 .mesa = (_NEW_COLOR |
347 _NEW_DEPTH |
348 _NEW_STENCIL |
349 _NEW_POLYGON |
350 _NEW_LINE |
351 _NEW_LIGHT |
352 _NEW_TEXTURE),
353 .brw = (BRW_NEW_FRAGMENT_PROGRAM |
354 BRW_NEW_WM_INPUT_DIMENSIONS |
355 BRW_NEW_REDUCED_PRIMITIVE),
356 .cache = 0
357 },
358 .update = brw_upload_wm_prog
359 };
360