2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
32 #include "brw_context.h"
34 #include "brw_state.h"
35 #include "main/formats.h"
36 #include "main/samplerobj.h"
37 #include "program/prog_parameter.h"
39 #include "glsl/ralloc.h"
41 /** Return number of src args for given instruction */
42 GLuint
brw_wm_nr_args( GLuint opcode
)
59 assert(opcode
< MAX_OPCODE
);
60 return _mesa_num_inst_src_regs(opcode
);
65 GLuint
brw_wm_is_scalar_result( GLuint opcode
)
89 * Do GPU code generation for non-GLSL shader. non-GLSL shaders have
90 * no flow control instructions so we can more readily do SSA-style
94 brw_wm_non_glsl_emit(struct brw_context
*brw
, struct brw_wm_compile
*c
)
96 /* Augment fragment program. Add instructions for pre- and
97 * post-fragment-program tasks such as interpolation and fogging.
101 /* Translate to intermediate representation. Build register usage
106 /* Dead code removal.
110 /* Register allocation.
111 * Divide by two because we operate on 16 pixels at a time and require
112 * two GRF entries for each logical shader register.
114 c
->grf_limit
= BRW_WM_MAX_GRF
/ 2;
118 /* how many general-purpose registers are used */
119 c
->prog_data
.reg_blocks
= brw_register_blocks(c
->max_wm_grf
);
128 * Return a bitfield where bit n is set if barycentric interpolation mode n
129 * (see enum brw_wm_barycentric_interp_mode) is needed by the fragment shader.
132 brw_compute_barycentric_interp_modes(bool shade_model_flat
,
133 const struct gl_fragment_program
*fprog
)
135 unsigned barycentric_interp_modes
= 0;
138 /* Loop through all fragment shader inputs to figure out what interpolation
139 * modes are in use, and set the appropriate bits in
140 * barycentric_interp_modes.
142 for (attr
= 0; attr
< FRAG_ATTRIB_MAX
; ++attr
) {
143 enum glsl_interp_qualifier interp_qualifier
=
144 fprog
->InterpQualifier
[attr
];
145 bool is_gl_Color
= attr
== FRAG_ATTRIB_COL0
|| attr
== FRAG_ATTRIB_COL1
;
147 /* Ignore unused inputs. */
148 if (!(fprog
->Base
.InputsRead
& BITFIELD64_BIT(attr
)))
151 /* Ignore WPOS and FACE, because they don't require interpolation. */
152 if (attr
== FRAG_ATTRIB_WPOS
|| attr
== FRAG_ATTRIB_FACE
)
155 if (interp_qualifier
== INTERP_QUALIFIER_NOPERSPECTIVE
) {
156 barycentric_interp_modes
|=
157 1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC
;
158 } else if (interp_qualifier
== INTERP_QUALIFIER_SMOOTH
||
159 (!(shade_model_flat
&& is_gl_Color
) &&
160 interp_qualifier
== INTERP_QUALIFIER_NONE
)) {
161 barycentric_interp_modes
|=
162 1 << BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC
;
166 return barycentric_interp_modes
;
171 brw_wm_payload_setup(struct brw_context
*brw
,
172 struct brw_wm_compile
*c
)
174 struct intel_context
*intel
= &brw
->intel
;
175 bool uses_depth
= (c
->fp
->program
.Base
.InputsRead
&
176 (1 << FRAG_ATTRIB_WPOS
)) != 0;
177 unsigned barycentric_interp_modes
=
178 brw_compute_barycentric_interp_modes(c
->key
.flat_shade
,
182 if (intel
->gen
>= 6) {
183 /* R0-1: masks, pixel X/Y coordinates. */
184 c
->nr_payload_regs
= 2;
185 /* R2: only for 32-pixel dispatch.*/
187 /* R3-26: barycentric interpolation coordinates. These appear in the
188 * same order that they appear in the brw_wm_barycentric_interp_mode
189 * enum. Each set of coordinates occupies 2 registers if dispatch width
190 * == 8 and 4 registers if dispatch width == 16. Coordinates only
191 * appear if they were enabled using the "Barycentric Interpolation
192 * Mode" bits in WM_STATE.
194 for (i
= 0; i
< BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT
; ++i
) {
195 if (barycentric_interp_modes
& (1 << i
)) {
196 c
->barycentric_coord_reg
[i
] = c
->nr_payload_regs
;
197 c
->nr_payload_regs
+= 2;
198 if (c
->dispatch_width
== 16) {
199 c
->nr_payload_regs
+= 2;
204 /* R27: interpolated depth if uses source depth */
206 c
->source_depth_reg
= c
->nr_payload_regs
;
207 c
->nr_payload_regs
++;
208 if (c
->dispatch_width
== 16) {
209 /* R28: interpolated depth if not 8-wide. */
210 c
->nr_payload_regs
++;
213 /* R29: interpolated W set if GEN6_WM_USES_SOURCE_W.
216 c
->source_w_reg
= c
->nr_payload_regs
;
217 c
->nr_payload_regs
++;
218 if (c
->dispatch_width
== 16) {
219 /* R30: interpolated W if not 8-wide. */
220 c
->nr_payload_regs
++;
223 /* R31: MSAA position offsets. */
224 /* R32-: bary for 32-pixel. */
225 /* R58-59: interp W for 32-pixel. */
227 if (c
->fp
->program
.Base
.OutputsWritten
&
228 BITFIELD64_BIT(FRAG_RESULT_DEPTH
)) {
229 c
->source_depth_to_render_target
= true;
230 c
->computes_depth
= true;
233 brw_wm_lookup_iz(intel
, c
);
238 * All Mesa program -> GPU code generation goes through this function.
239 * Depending on the instructions used (i.e. flow control instructions)
240 * we'll use one of two code generators.
242 bool do_wm_prog(struct brw_context
*brw
,
243 struct gl_shader_program
*prog
,
244 struct brw_fragment_program
*fp
,
245 struct brw_wm_prog_key
*key
)
247 struct intel_context
*intel
= &brw
->intel
;
248 struct brw_wm_compile
*c
;
249 const GLuint
*program
;
252 c
= brw
->wm
.compile_data
;
254 brw
->wm
.compile_data
= rzalloc(NULL
, struct brw_wm_compile
);
255 c
= brw
->wm
.compile_data
;
257 /* Ouch - big out of memory problem. Can't continue
258 * without triggering a segfault, no way to signal,
264 void *instruction
= c
->instruction
;
265 void *prog_instructions
= c
->prog_instructions
;
266 void *vreg
= c
->vreg
;
267 void *refs
= c
->refs
;
268 memset(c
, 0, sizeof(*brw
->wm
.compile_data
));
269 c
->instruction
= instruction
;
270 c
->prog_instructions
= prog_instructions
;
274 memcpy(&c
->key
, key
, sizeof(*key
));
277 c
->env_param
= brw
->intel
.ctx
.FragmentProgram
.Parameters
;
279 brw_init_compile(brw
, &c
->func
, c
);
281 if (prog
&& prog
->_LinkedShaders
[MESA_SHADER_FRAGMENT
]) {
282 if (!brw_wm_fs_emit(brw
, c
, prog
))
285 if (!c
->instruction
) {
286 c
->instruction
= rzalloc_array(c
, struct brw_wm_instruction
, BRW_WM_MAX_INSN
);
287 c
->prog_instructions
= rzalloc_array(c
, struct prog_instruction
, BRW_WM_MAX_INSN
);
288 c
->vreg
= rzalloc_array(c
, struct brw_wm_value
, BRW_WM_MAX_VREG
);
289 c
->refs
= rzalloc_array(c
, struct brw_wm_ref
, BRW_WM_MAX_REF
);
292 /* Fallback for fixed function and ARB_fp shaders. */
293 c
->dispatch_width
= 16;
294 brw_wm_payload_setup(brw
, c
);
295 brw_wm_non_glsl_emit(brw
, c
);
296 c
->prog_data
.dispatch_width
= 16;
299 /* Scratch space is used for register spilling */
300 if (c
->last_scratch
) {
301 c
->prog_data
.total_scratch
= brw_get_scratch_size(c
->last_scratch
);
303 brw_get_scratch_bo(intel
, &brw
->wm
.scratch_bo
,
304 c
->prog_data
.total_scratch
* brw
->max_wm_threads
);
307 if (unlikely(INTEL_DEBUG
& DEBUG_WM
))
308 fprintf(stderr
, "\n");
312 program
= brw_get_program(&c
->func
, &program_size
);
314 brw_upload_cache(&brw
->cache
, BRW_WM_PROG
,
315 &c
->key
, sizeof(c
->key
),
316 program
, program_size
,
317 &c
->prog_data
, sizeof(c
->prog_data
),
318 &brw
->wm
.prog_offset
, &brw
->wm
.prog_data
);
325 static void brw_wm_populate_key( struct brw_context
*brw
,
326 struct brw_wm_prog_key
*key
)
328 struct gl_context
*ctx
= &brw
->intel
.ctx
;
329 /* BRW_NEW_FRAGMENT_PROGRAM */
330 const struct brw_fragment_program
*fp
=
331 (struct brw_fragment_program
*)brw
->fragment_program
;
336 memset(key
, 0, sizeof(*key
));
338 /* Build the index for table lookup
341 key
->alpha_test
= ctx
->Color
.AlphaEnabled
;
342 if (fp
->program
.UsesKill
||
343 ctx
->Color
.AlphaEnabled
)
344 lookup
|= IZ_PS_KILL_ALPHATEST_BIT
;
346 if (fp
->program
.Base
.OutputsWritten
& BITFIELD64_BIT(FRAG_RESULT_DEPTH
))
347 lookup
|= IZ_PS_COMPUTES_DEPTH_BIT
;
351 lookup
|= IZ_DEPTH_TEST_ENABLE_BIT
;
353 if (ctx
->Depth
.Test
&&
354 ctx
->Depth
.Mask
) /* ?? */
355 lookup
|= IZ_DEPTH_WRITE_ENABLE_BIT
;
358 if (ctx
->Stencil
._Enabled
) {
359 lookup
|= IZ_STENCIL_TEST_ENABLE_BIT
;
361 if (ctx
->Stencil
.WriteMask
[0] ||
362 ctx
->Stencil
.WriteMask
[ctx
->Stencil
._BackFace
])
363 lookup
|= IZ_STENCIL_WRITE_ENABLE_BIT
;
368 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
369 if (ctx
->Line
.SmoothFlag
) {
370 if (brw
->intel
.reduced_primitive
== GL_LINES
) {
373 else if (brw
->intel
.reduced_primitive
== GL_TRIANGLES
) {
374 if (ctx
->Polygon
.FrontMode
== GL_LINE
) {
375 line_aa
= AA_SOMETIMES
;
377 if (ctx
->Polygon
.BackMode
== GL_LINE
||
378 (ctx
->Polygon
.CullFlag
&&
379 ctx
->Polygon
.CullFaceMode
== GL_BACK
))
382 else if (ctx
->Polygon
.BackMode
== GL_LINE
) {
383 line_aa
= AA_SOMETIMES
;
385 if ((ctx
->Polygon
.CullFlag
&&
386 ctx
->Polygon
.CullFaceMode
== GL_FRONT
))
392 key
->iz_lookup
= lookup
;
393 key
->line_aa
= line_aa
;
394 key
->stats_wm
= brw
->intel
.stats_wm
;
396 /* BRW_NEW_WM_INPUT_DIMENSIONS */
397 key
->proj_attrib_mask
= brw
->wm
.input_size_masks
[4-1];
400 key
->flat_shade
= (ctx
->Light
.ShadeModel
== GL_FLAT
);
402 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
403 key
->clamp_fragment_color
= ctx
->Color
._ClampFragmentColor
;
406 for (i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
407 const struct gl_texture_unit
*unit
= &ctx
->Texture
.Unit
[i
];
409 if (unit
->_ReallyEnabled
) {
410 const struct gl_texture_object
*t
= unit
->_Current
;
411 const struct gl_texture_image
*img
= t
->Image
[0][t
->BaseLevel
];
412 struct gl_sampler_object
*sampler
= _mesa_get_samplerobj(ctx
, i
);
413 int swizzles
[SWIZZLE_NIL
+ 1] = {
423 if (img
->_BaseFormat
== GL_DEPTH_COMPONENT
||
424 img
->_BaseFormat
== GL_DEPTH_STENCIL
) {
425 if (sampler
->CompareMode
== GL_COMPARE_R_TO_TEXTURE_ARB
)
426 key
->compare_funcs
[i
] = sampler
->CompareFunc
;
428 /* We handle GL_DEPTH_TEXTURE_MODE here instead of as surface format
429 * overrides because shadow comparison always returns the result of
430 * the comparison in all channels anyway.
432 switch (sampler
->DepthMode
) {
434 swizzles
[0] = SWIZZLE_ZERO
;
435 swizzles
[1] = SWIZZLE_ZERO
;
436 swizzles
[2] = SWIZZLE_ZERO
;
437 swizzles
[3] = SWIZZLE_X
;
440 swizzles
[0] = SWIZZLE_X
;
441 swizzles
[1] = SWIZZLE_X
;
442 swizzles
[2] = SWIZZLE_X
;
443 swizzles
[3] = SWIZZLE_ONE
;
446 swizzles
[0] = SWIZZLE_X
;
447 swizzles
[1] = SWIZZLE_X
;
448 swizzles
[2] = SWIZZLE_X
;
449 swizzles
[3] = SWIZZLE_X
;
452 swizzles
[0] = SWIZZLE_X
;
453 swizzles
[1] = SWIZZLE_ZERO
;
454 swizzles
[2] = SWIZZLE_ZERO
;
455 swizzles
[3] = SWIZZLE_ONE
;
460 if (img
->InternalFormat
== GL_YCBCR_MESA
) {
461 key
->yuvtex_mask
|= 1 << i
;
462 if (img
->TexFormat
== MESA_FORMAT_YCBCR
)
463 key
->yuvtex_swap_mask
|= 1 << i
;
466 key
->tex_swizzles
[i
] =
467 MAKE_SWIZZLE4(swizzles
[GET_SWZ(t
->_Swizzle
, 0)],
468 swizzles
[GET_SWZ(t
->_Swizzle
, 1)],
469 swizzles
[GET_SWZ(t
->_Swizzle
, 2)],
470 swizzles
[GET_SWZ(t
->_Swizzle
, 3)]);
472 if (sampler
->MinFilter
!= GL_NEAREST
&&
473 sampler
->MagFilter
!= GL_NEAREST
) {
474 if (sampler
->WrapS
== GL_CLAMP
)
475 key
->gl_clamp_mask
[0] |= 1 << i
;
476 if (sampler
->WrapT
== GL_CLAMP
)
477 key
->gl_clamp_mask
[1] |= 1 << i
;
478 if (sampler
->WrapR
== GL_CLAMP
)
479 key
->gl_clamp_mask
[2] |= 1 << i
;
483 key
->tex_swizzles
[i
] = SWIZZLE_NOOP
;
489 * Include the draw buffer origin and height so that we can calculate
490 * fragment position values relative to the bottom left of the drawable,
491 * from the incoming screen origin relative position we get as part of our
494 * This is only needed for the WM_WPOSXY opcode when the fragment program
495 * uses the gl_FragCoord input.
497 * We could avoid recompiling by including this as a constant referenced by
498 * our program, but if we were to do that it would also be nice to handle
499 * getting that constant updated at batchbuffer submit time (when we
500 * hold the lock and know where the buffer really is) rather than at emit
501 * time when we don't hold the lock and are just guessing. We could also
502 * just avoid using this as key data if the program doesn't use
505 * For DRI2 the origin_x/y will always be (0,0) but we still need the
506 * drawable height in order to invert the Y axis.
508 if (fp
->program
.Base
.InputsRead
& FRAG_BIT_WPOS
) {
509 key
->drawable_height
= ctx
->DrawBuffer
->Height
;
510 key
->render_to_fbo
= ctx
->DrawBuffer
->Name
!= 0;
514 key
->nr_color_regions
= ctx
->DrawBuffer
->_NumColorDrawBuffers
;
516 /* CACHE_NEW_VS_PROG */
517 key
->vp_outputs_written
= brw
->vs
.prog_data
->outputs_written
;
519 /* The unique fragment program ID */
520 key
->program_string_id
= fp
->id
;
525 brw_upload_wm_prog(struct brw_context
*brw
)
527 struct intel_context
*intel
= &brw
->intel
;
528 struct gl_context
*ctx
= &intel
->ctx
;
529 struct brw_wm_prog_key key
;
530 struct brw_fragment_program
*fp
= (struct brw_fragment_program
*)
531 brw
->fragment_program
;
533 brw_wm_populate_key(brw
, &key
);
535 if (!brw_search_cache(&brw
->cache
, BRW_WM_PROG
,
537 &brw
->wm
.prog_offset
, &brw
->wm
.prog_data
)) {
538 bool success
= do_wm_prog(brw
, ctx
->Shader
.CurrentFragmentProgram
, fp
,
546 const struct brw_tracked_state brw_wm_prog
= {
548 .mesa
= (_NEW_COLOR
|
557 .brw
= (BRW_NEW_FRAGMENT_PROGRAM
|
558 BRW_NEW_WM_INPUT_DIMENSIONS
|
559 BRW_NEW_REDUCED_PRIMITIVE
),
560 .cache
= CACHE_NEW_VS_PROG
,
562 .emit
= brw_upload_wm_prog