Merge branch 'mesa_7_5_branch'
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "main/texformat.h"
33 #include "brw_context.h"
34 #include "brw_util.h"
35 #include "brw_wm.h"
36 #include "brw_state.h"
37
38
39 /** Return number of src args for given instruction */
40 GLuint brw_wm_nr_args( GLuint opcode )
41 {
42 switch (opcode) {
43 case WM_FRONTFACING:
44 return 0;
45 case WM_PIXELXY:
46 case WM_CINTERP:
47 case WM_WPOSXY:
48 return 1;
49 case WM_LINTERP:
50 case WM_DELTAXY:
51 case WM_PIXELW:
52 return 2;
53 case WM_FB_WRITE:
54 case WM_PINTERP:
55 return 3;
56 default:
57 assert(opcode < MAX_OPCODE);
58 return _mesa_num_inst_src_regs(opcode);
59 }
60 }
61
62
63 GLuint brw_wm_is_scalar_result( GLuint opcode )
64 {
65 switch (opcode) {
66 case OPCODE_COS:
67 case OPCODE_EX2:
68 case OPCODE_LG2:
69 case OPCODE_POW:
70 case OPCODE_RCP:
71 case OPCODE_RSQ:
72 case OPCODE_SIN:
73 case OPCODE_DP3:
74 case OPCODE_DP4:
75 case OPCODE_DPH:
76 case OPCODE_DST:
77 return 1;
78
79 default:
80 return 0;
81 }
82 }
83
84
85 /**
86 * Do GPU code generation for non-GLSL shader. non-GLSL shaders have
87 * no flow control instructions so we can more readily do SSA-style
88 * optimizations.
89 */
90 static void
91 brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
92 {
93 /* Augment fragment program. Add instructions for pre- and
94 * post-fragment-program tasks such as interpolation and fogging.
95 */
96 brw_wm_pass_fp(c);
97
98 /* Translate to intermediate representation. Build register usage
99 * chains.
100 */
101 brw_wm_pass0(c);
102
103 /* Dead code removal.
104 */
105 brw_wm_pass1(c);
106
107 /* Register allocation.
108 * Divide by two because we operate on 16 pixels at a time and require
109 * two GRF entries for each logical shader register.
110 */
111 c->grf_limit = BRW_WM_MAX_GRF / 2;
112
113 brw_wm_pass2(c);
114
115 /* how many general-purpose registers are used */
116 c->prog_data.total_grf = c->max_wm_grf;
117
118 /* Scratch space is used for register spilling */
119 if (c->last_scratch) {
120 c->prog_data.total_scratch = c->last_scratch + 0x40;
121 }
122 else {
123 c->prog_data.total_scratch = 0;
124 }
125
126 /* Emit GEN4 code.
127 */
128 brw_wm_emit(c);
129 }
130
131
132 /**
133 * All Mesa program -> GPU code generation goes through this function.
134 * Depending on the instructions used (i.e. flow control instructions)
135 * we'll use one of two code generators.
136 */
137 static void do_wm_prog( struct brw_context *brw,
138 struct brw_fragment_program *fp,
139 struct brw_wm_prog_key *key)
140 {
141 struct brw_wm_compile *c;
142 const GLuint *program;
143 GLuint program_size;
144
145 c = brw->wm.compile_data;
146 if (c == NULL) {
147 brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data));
148 c = brw->wm.compile_data;
149 if (c == NULL) {
150 /* Ouch - big out of memory problem. Can't continue
151 * without triggering a segfault, no way to signal,
152 * so just return.
153 */
154 return;
155 }
156 } else {
157 memset(c, 0, sizeof(*brw->wm.compile_data));
158 }
159 memcpy(&c->key, key, sizeof(*key));
160
161 c->fp = fp;
162 c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
163
164 brw_init_compile(brw, &c->func);
165
166 /* temporary sanity check assertion */
167 ASSERT(fp->isGLSL == brw_wm_is_glsl(&c->fp->program));
168
169 /*
170 * Shader which use GLSL features such as flow control are handled
171 * differently from "simple" shaders.
172 */
173 if (fp->isGLSL) {
174 brw_wm_glsl_emit(brw, c);
175 }
176 else {
177 brw_wm_non_glsl_emit(brw, c);
178 }
179
180 if (INTEL_DEBUG & DEBUG_WM)
181 fprintf(stderr, "\n");
182
183 /* get the program
184 */
185 program = brw_get_program(&c->func, &program_size);
186
187 dri_bo_unreference(brw->wm.prog_bo);
188 brw->wm.prog_bo = brw_upload_cache( &brw->cache, BRW_WM_PROG,
189 &c->key, sizeof(c->key),
190 NULL, 0,
191 program, program_size,
192 &c->prog_data,
193 &brw->wm.prog_data );
194 }
195
196
197
198 static void brw_wm_populate_key( struct brw_context *brw,
199 struct brw_wm_prog_key *key )
200 {
201 GLcontext *ctx = &brw->intel.ctx;
202 /* BRW_NEW_FRAGMENT_PROGRAM */
203 const struct brw_fragment_program *fp =
204 (struct brw_fragment_program *)brw->fragment_program;
205 GLuint lookup = 0;
206 GLuint line_aa;
207 GLuint i;
208
209 memset(key, 0, sizeof(*key));
210
211 /* Build the index for table lookup
212 */
213 /* _NEW_COLOR */
214 if (fp->program.UsesKill ||
215 ctx->Color.AlphaEnabled)
216 lookup |= IZ_PS_KILL_ALPHATEST_BIT;
217
218 if (fp->program.Base.OutputsWritten & (1<<FRAG_RESULT_DEPTH))
219 lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
220
221 /* _NEW_DEPTH */
222 if (ctx->Depth.Test)
223 lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
224
225 if (ctx->Depth.Test &&
226 ctx->Depth.Mask) /* ?? */
227 lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
228
229 /* _NEW_STENCIL */
230 if (ctx->Stencil._Enabled) {
231 lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
232
233 if (ctx->Stencil.WriteMask[0] ||
234 ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
235 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
236 }
237
238 line_aa = AA_NEVER;
239
240 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
241 if (ctx->Line.SmoothFlag) {
242 if (brw->intel.reduced_primitive == GL_LINES) {
243 line_aa = AA_ALWAYS;
244 }
245 else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
246 if (ctx->Polygon.FrontMode == GL_LINE) {
247 line_aa = AA_SOMETIMES;
248
249 if (ctx->Polygon.BackMode == GL_LINE ||
250 (ctx->Polygon.CullFlag &&
251 ctx->Polygon.CullFaceMode == GL_BACK))
252 line_aa = AA_ALWAYS;
253 }
254 else if (ctx->Polygon.BackMode == GL_LINE) {
255 line_aa = AA_SOMETIMES;
256
257 if ((ctx->Polygon.CullFlag &&
258 ctx->Polygon.CullFaceMode == GL_FRONT))
259 line_aa = AA_ALWAYS;
260 }
261 }
262 }
263
264 brw_wm_lookup_iz(line_aa,
265 lookup,
266 key);
267
268
269 /* BRW_NEW_WM_INPUT_DIMENSIONS */
270 key->projtex_mask = brw->wm.input_size_masks[4-1] >> (FRAG_ATTRIB_TEX0 - FRAG_ATTRIB_WPOS);
271
272 /* _NEW_LIGHT */
273 key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
274
275 /* _NEW_HINT */
276 key->linear_color = (ctx->Hint.PerspectiveCorrection == GL_FASTEST);
277
278 /* _NEW_TEXTURE */
279 for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
280 const struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
281
282 if (unit->_ReallyEnabled) {
283 const struct gl_texture_object *t = unit->_Current;
284 const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
285 if (img->InternalFormat == GL_YCBCR_MESA) {
286 key->yuvtex_mask |= 1 << i;
287 if (img->TexFormat->MesaFormat == MESA_FORMAT_YCBCR)
288 key->yuvtex_swap_mask |= 1 << i;
289 }
290
291 key->tex_swizzles[i] = t->_Swizzle;
292 }
293 else {
294 key->tex_swizzles[i] = SWIZZLE_NOOP;
295 }
296 }
297
298 /* Shadow */
299 key->shadowtex_mask = fp->program.Base.ShadowSamplers;
300
301 /* _NEW_BUFFERS */
302 /*
303 * Include the draw buffer origin and height so that we can calculate
304 * fragment position values relative to the bottom left of the drawable,
305 * from the incoming screen origin relative position we get as part of our
306 * payload.
307 *
308 * We could avoid recompiling by including this as a constant referenced by
309 * our program, but if we were to do that it would also be nice to handle
310 * getting that constant updated at batchbuffer submit time (when we
311 * hold the lock and know where the buffer really is) rather than at emit
312 * time when we don't hold the lock and are just guessing. We could also
313 * just avoid using this as key data if the program doesn't use
314 * fragment.position.
315 *
316 * This pretty much becomes moot with DRI2 and redirected buffers anyway,
317 * as our origins will always be zero then.
318 */
319 if (brw->intel.driDrawable != NULL) {
320 key->origin_x = brw->intel.driDrawable->x;
321 key->origin_y = brw->intel.driDrawable->y;
322 key->drawable_height = brw->intel.driDrawable->h;
323 }
324
325 /* CACHE_NEW_VS_PROG */
326 key->vp_outputs_written = brw->vs.prog_data->outputs_written & DO_SETUP_BITS;
327
328 /* The unique fragment program ID */
329 key->program_string_id = fp->id;
330 }
331
332
333 static void brw_prepare_wm_prog(struct brw_context *brw)
334 {
335 struct brw_wm_prog_key key;
336 struct brw_fragment_program *fp = (struct brw_fragment_program *)
337 brw->fragment_program;
338
339 brw_wm_populate_key(brw, &key);
340
341 /* Make an early check for the key.
342 */
343 dri_bo_unreference(brw->wm.prog_bo);
344 brw->wm.prog_bo = brw_search_cache(&brw->cache, BRW_WM_PROG,
345 &key, sizeof(key),
346 NULL, 0,
347 &brw->wm.prog_data);
348 if (brw->wm.prog_bo == NULL)
349 do_wm_prog(brw, fp, &key);
350 }
351
352
353 const struct brw_tracked_state brw_wm_prog = {
354 .dirty = {
355 .mesa = (_NEW_COLOR |
356 _NEW_DEPTH |
357 _NEW_HINT |
358 _NEW_STENCIL |
359 _NEW_POLYGON |
360 _NEW_LINE |
361 _NEW_LIGHT |
362 _NEW_BUFFERS |
363 _NEW_TEXTURE),
364 .brw = (BRW_NEW_FRAGMENT_PROGRAM |
365 BRW_NEW_WM_INPUT_DIMENSIONS |
366 BRW_NEW_REDUCED_PRIMITIVE),
367 .cache = CACHE_NEW_VS_PROG,
368 },
369 .prepare = brw_prepare_wm_prog
370 };
371