Minor r200 vertex program cleanups. Remove disabled leftovers from r300 vertex progra...
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "brw_context.h"
34 #include "brw_util.h"
35 #include "brw_wm.h"
36 #include "brw_state.h"
37 #include "brw_hal.h"
38
39 #include "program.h"
40 #include "program_instruction.h"
41 #include "arbprogparse.h"
42
43
44 GLuint brw_wm_nr_args( GLuint opcode )
45 {
46 switch (opcode) {
47
48 case WM_PIXELXY:
49 case OPCODE_ABS:
50 case OPCODE_FLR:
51 case OPCODE_FRC:
52 case OPCODE_SWZ:
53 case OPCODE_MOV:
54 case OPCODE_COS:
55 case OPCODE_EX2:
56 case OPCODE_LG2:
57 case OPCODE_RCP:
58 case OPCODE_RSQ:
59 case OPCODE_SIN:
60 case OPCODE_SCS:
61 case OPCODE_TEX:
62 case OPCODE_TXB:
63 case OPCODE_TXP:
64 case OPCODE_KIL:
65 case OPCODE_LIT:
66 case WM_CINTERP:
67 case WM_WPOSXY:
68 return 1;
69
70 case OPCODE_POW:
71 case OPCODE_SUB:
72 case OPCODE_SGE:
73 case OPCODE_SLT:
74 case OPCODE_ADD:
75 case OPCODE_MAX:
76 case OPCODE_MIN:
77 case OPCODE_MUL:
78 case OPCODE_XPD:
79 case OPCODE_DP3:
80 case OPCODE_DP4:
81 case OPCODE_DPH:
82 case OPCODE_DST:
83 case WM_LINTERP:
84 case WM_DELTAXY:
85 case WM_PIXELW:
86 return 2;
87
88 case WM_FB_WRITE:
89 case WM_PINTERP:
90 case OPCODE_MAD:
91 case OPCODE_CMP:
92 case OPCODE_LRP:
93 return 3;
94
95 default:
96 return 0;
97 }
98 }
99
100
101 GLuint brw_wm_is_scalar_result( GLuint opcode )
102 {
103 switch (opcode) {
104 case OPCODE_COS:
105 case OPCODE_EX2:
106 case OPCODE_LG2:
107 case OPCODE_POW:
108 case OPCODE_RCP:
109 case OPCODE_RSQ:
110 case OPCODE_SIN:
111 case OPCODE_DP3:
112 case OPCODE_DP4:
113 case OPCODE_DPH:
114 case OPCODE_DST:
115 return 1;
116
117 default:
118 return 0;
119 }
120 }
121
122
123 static void brw_wm_pass_hal (struct brw_wm_compile *c)
124 {
125 static void (*hal_wm_pass) (struct brw_wm_compile *c);
126 static GLboolean hal_tried;
127
128 if (!hal_tried)
129 {
130 hal_wm_pass = brw_hal_find_symbol ("intel_hal_wm_pass");
131 hal_tried = 1;
132 }
133 if (hal_wm_pass)
134 (*hal_wm_pass) (c);
135 }
136
137 static void do_wm_prog( struct brw_context *brw,
138 struct brw_fragment_program *fp,
139 struct brw_wm_prog_key *key)
140 {
141 struct brw_wm_compile c;
142 const GLuint *program;
143 GLuint program_size;
144
145 memset(&c, 0, sizeof(c));
146 memcpy(&c.key, key, sizeof(*key));
147
148 c.fp = fp;
149 c.env_param = brw->intel.ctx.FragmentProgram.Parameters;
150
151
152 /* Augment fragment program. Add instructions for pre- and
153 * post-fragment-program tasks such as interpolation and fogging.
154 */
155 brw_wm_pass_fp(&c);
156
157 /* Translate to intermediate representation. Build register usage
158 * chains.
159 */
160 brw_wm_pass0(&c);
161
162 /* Dead code removal.
163 */
164 brw_wm_pass1(&c);
165
166 /* Hal optimization
167 */
168 brw_wm_pass_hal (&c);
169
170 /* Register allocation.
171 */
172 c.grf_limit = BRW_WM_MAX_GRF/2;
173
174 /* This is where we start emitting gen4 code:
175 */
176 brw_init_compile(&c.func);
177
178 brw_wm_pass2(&c);
179
180 c.prog_data.total_grf = c.max_wm_grf;
181 c.prog_data.total_scratch = c.last_scratch ? c.last_scratch + 0x40 : 0;
182
183 /* Emit GEN4 code.
184 */
185 brw_wm_emit(&c);
186
187 /* get the program
188 */
189 program = brw_get_program(&c.func, &program_size);
190
191 /*
192 */
193 brw->wm.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_WM_PROG],
194 &c.key,
195 sizeof(c.key),
196 program,
197 program_size,
198 &c.prog_data,
199 &brw->wm.prog_data );
200 }
201
202
203
204 static void brw_wm_populate_key( struct brw_context *brw,
205 struct brw_wm_prog_key *key )
206 {
207 /* BRW_NEW_FRAGMENT_PROGRAM */
208 struct brw_fragment_program *fp =
209 (struct brw_fragment_program *)brw->fragment_program;
210 GLuint lookup = 0;
211 GLuint line_aa;
212 GLuint i;
213
214 memset(key, 0, sizeof(*key));
215
216 /* Build the index for table lookup
217 */
218 /* _NEW_COLOR */
219 if (fp->program.UsesKill ||
220 brw->attribs.Color->AlphaEnabled)
221 lookup |= IZ_PS_KILL_ALPHATEST_BIT;
222
223 if (fp->program.Base.OutputsWritten & (1<<FRAG_RESULT_DEPR))
224 lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
225
226 /* _NEW_DEPTH */
227 if (brw->attribs.Depth->Test)
228 lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
229
230 if (brw->attribs.Depth->Test &&
231 brw->attribs.Depth->Mask) /* ?? */
232 lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
233
234 /* _NEW_STENCIL */
235 if (brw->attribs.Stencil->Enabled) {
236 lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
237
238 if (brw->attribs.Stencil->WriteMask[0] ||
239 (brw->attribs.Stencil->TestTwoSide && brw->attribs.Stencil->WriteMask[1]))
240 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
241 }
242
243 /* XXX: when should this be disabled?
244 */
245 if (1)
246 lookup |= IZ_EARLY_DEPTH_TEST_BIT;
247
248
249 line_aa = AA_NEVER;
250
251 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
252 if (brw->attribs.Line->SmoothFlag) {
253 if (brw->intel.reduced_primitive == GL_LINES) {
254 line_aa = AA_ALWAYS;
255 }
256 else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
257 if (brw->attribs.Polygon->FrontMode == GL_LINE) {
258 line_aa = AA_SOMETIMES;
259
260 if (brw->attribs.Polygon->BackMode == GL_LINE ||
261 (brw->attribs.Polygon->CullFlag &&
262 brw->attribs.Polygon->CullFaceMode == GL_BACK))
263 line_aa = AA_ALWAYS;
264 }
265 else if (brw->attribs.Polygon->BackMode == GL_LINE) {
266 line_aa = AA_SOMETIMES;
267
268 if ((brw->attribs.Polygon->CullFlag &&
269 brw->attribs.Polygon->CullFaceMode == GL_FRONT))
270 line_aa = AA_ALWAYS;
271 }
272 }
273 }
274
275 brw_wm_lookup_iz(line_aa,
276 lookup,
277 key);
278
279
280 /* BRW_NEW_WM_INPUT_DIMENSIONS */
281 key->projtex_mask = brw->wm.input_size_masks[4-1];
282
283 /* _NEW_LIGHT */
284 key->flat_shade = (brw->attribs.Light->ShadeModel == GL_FLAT);
285
286 /* _NEW_TEXTURE */
287 for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
288 const struct gl_texture_unit *unit = &brw->attribs.Texture->Unit[i];
289 const struct gl_texture_object *t = unit->_Current;
290
291 if (unit->_ReallyEnabled) {
292
293 if (t->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB &&
294 t->Image[0][t->BaseLevel]->_BaseFormat == GL_DEPTH_COMPONENT) {
295 key->shadowtex_mask |= 1<<i;
296 }
297
298 if (t->Image[0][t->BaseLevel]->InternalFormat == GL_YCBCR_MESA)
299 key->yuvtex_mask |= 1<<i;
300 }
301 }
302
303
304 /* Extra info:
305 */
306 key->program_string_id = fp->id;
307
308 }
309
310
311 static void brw_upload_wm_prog( struct brw_context *brw )
312 {
313 struct brw_wm_prog_key key;
314 struct brw_fragment_program *fp = (struct brw_fragment_program *)
315 brw->fragment_program;
316
317 brw_wm_populate_key(brw, &key);
318
319 /* Make an early check for the key.
320 */
321 if (brw_search_cache(&brw->cache[BRW_WM_PROG],
322 &key, sizeof(key),
323 &brw->wm.prog_data,
324 &brw->wm.prog_gs_offset))
325 return;
326
327 do_wm_prog(brw, fp, &key);
328 }
329
330
331 /* See brw_wm.c:
332 */
333 const struct brw_tracked_state brw_wm_prog = {
334 .dirty = {
335 .mesa = (_NEW_COLOR |
336 _NEW_DEPTH |
337 _NEW_STENCIL |
338 _NEW_POLYGON |
339 _NEW_LINE |
340 _NEW_LIGHT |
341 _NEW_TEXTURE),
342 .brw = (BRW_NEW_FRAGMENT_PROGRAM |
343 BRW_NEW_WM_INPUT_DIMENSIONS |
344 BRW_NEW_REDUCED_PRIMITIVE),
345 .cache = 0
346 },
347 .update = brw_upload_wm_prog
348 };
349