i965: Enable EGL_KHR_gl_texture_3D_image
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 * Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 * Intel funded Tungsten Graphics to
4 * develop this 3D driver.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26 #include "brw_context.h"
27 #include "brw_wm.h"
28 #include "brw_state.h"
29 #include "brw_shader.h"
30 #include "main/enums.h"
31 #include "main/formats.h"
32 #include "main/fbobject.h"
33 #include "main/samplerobj.h"
34 #include "main/framebuffer.h"
35 #include "program/prog_parameter.h"
36 #include "program/program.h"
37 #include "intel_mipmap_tree.h"
38 #include "intel_image.h"
39 #include "brw_nir.h"
40 #include "brw_program.h"
41
42 #include "util/ralloc.h"
43
44 static void
45 assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
46 const struct gl_shader_program *shader_prog,
47 const struct gl_program *prog,
48 const struct brw_wm_prog_key *key,
49 struct brw_wm_prog_data *prog_data)
50 {
51 uint32_t next_binding_table_offset = 0;
52
53 /* If there are no color regions, we still perform an FB write to a null
54 * renderbuffer, which we place at surface index 0.
55 */
56 prog_data->binding_table.render_target_start = next_binding_table_offset;
57 next_binding_table_offset += MAX2(key->nr_color_regions, 1);
58
59 next_binding_table_offset =
60 brw_assign_common_binding_table_offsets(MESA_SHADER_FRAGMENT, devinfo,
61 shader_prog, prog, &prog_data->base,
62 next_binding_table_offset);
63
64 if (prog->nir->info.outputs_read && !key->coherent_fb_fetch) {
65 prog_data->binding_table.render_target_read_start =
66 next_binding_table_offset;
67 next_binding_table_offset += key->nr_color_regions;
68 }
69 }
70
71 /**
72 * All Mesa program -> GPU code generation goes through this function.
73 * Depending on the instructions used (i.e. flow control instructions)
74 * we'll use one of two code generators.
75 */
76 bool
77 brw_codegen_wm_prog(struct brw_context *brw,
78 struct gl_shader_program *prog,
79 struct brw_fragment_program *fp,
80 struct brw_wm_prog_key *key)
81 {
82 const struct gen_device_info *devinfo = &brw->screen->devinfo;
83 struct gl_context *ctx = &brw->ctx;
84 void *mem_ctx = ralloc_context(NULL);
85 struct brw_wm_prog_data prog_data;
86 const GLuint *program;
87 struct brw_shader *fs = NULL;
88 GLuint program_size;
89 bool start_busy = false;
90 double start_time = 0;
91
92 if (prog)
93 fs = (struct brw_shader *)prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
94
95 memset(&prog_data, 0, sizeof(prog_data));
96
97 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
98 if (!prog)
99 prog_data.base.use_alt_mode = true;
100
101 assign_fs_binding_table_offsets(devinfo, prog,
102 &fp->program.Base, key, &prog_data);
103
104 /* Allocate the references to the uniforms that will end up in the
105 * prog_data associated with the compiled program, and which will be freed
106 * by the state cache.
107 */
108 int param_count = fp->program.Base.nir->num_uniforms / 4;
109 if (fs)
110 prog_data.base.nr_image_params = fs->base.NumImages;
111 /* The backend also sometimes adds params for texture size. */
112 param_count += 2 * ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits;
113 prog_data.base.param =
114 rzalloc_array(NULL, const gl_constant_value *, param_count);
115 prog_data.base.pull_param =
116 rzalloc_array(NULL, const gl_constant_value *, param_count);
117 prog_data.base.image_param =
118 rzalloc_array(NULL, struct brw_image_param,
119 prog_data.base.nr_image_params);
120 prog_data.base.nr_params = param_count;
121
122 if (prog) {
123 brw_nir_setup_glsl_uniforms(fp->program.Base.nir, prog, &fp->program.Base,
124 &prog_data.base, true);
125 } else {
126 brw_nir_setup_arb_uniforms(fp->program.Base.nir, &fp->program.Base,
127 &prog_data.base);
128 }
129
130 if (unlikely(brw->perf_debug)) {
131 start_busy = (brw->batch.last_bo &&
132 drm_intel_bo_busy(brw->batch.last_bo));
133 start_time = get_time();
134 }
135
136 if (unlikely(INTEL_DEBUG & DEBUG_WM))
137 brw_dump_ir("fragment", prog, fs ? &fs->base : NULL, &fp->program.Base);
138
139 int st_index8 = -1, st_index16 = -1;
140 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
141 st_index8 = brw_get_shader_time_index(brw, prog, &fp->program.Base, ST_FS8);
142 st_index16 = brw_get_shader_time_index(brw, prog, &fp->program.Base, ST_FS16);
143 }
144
145 char *error_str = NULL;
146 program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
147 key, &prog_data, fp->program.Base.nir,
148 &fp->program.Base, st_index8, st_index16,
149 true, brw->use_rep_send,
150 &program_size, &error_str);
151 if (program == NULL) {
152 if (prog) {
153 prog->LinkStatus = false;
154 ralloc_strcat(&prog->InfoLog, error_str);
155 }
156
157 _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str);
158
159 ralloc_free(mem_ctx);
160 return false;
161 }
162
163 if (unlikely(brw->perf_debug) && fs) {
164 if (fs->compiled_once)
165 brw_wm_debug_recompile(brw, prog, key);
166 fs->compiled_once = true;
167
168 if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
169 perf_debug("FS compile took %.03f ms and stalled the GPU\n",
170 (get_time() - start_time) * 1000);
171 }
172 }
173
174 brw_alloc_stage_scratch(brw, &brw->wm.base,
175 prog_data.base.total_scratch,
176 devinfo->max_wm_threads);
177
178 if (unlikely(INTEL_DEBUG & DEBUG_WM))
179 fprintf(stderr, "\n");
180
181 brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
182 key, sizeof(struct brw_wm_prog_key),
183 program, program_size,
184 &prog_data, sizeof(prog_data),
185 &brw->wm.base.prog_offset, &brw->wm.prog_data);
186
187 ralloc_free(mem_ctx);
188
189 return true;
190 }
191
192 bool
193 brw_debug_recompile_sampler_key(struct brw_context *brw,
194 const struct brw_sampler_prog_key_data *old_key,
195 const struct brw_sampler_prog_key_data *key)
196 {
197 bool found = false;
198
199 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
200 found |= key_debug(brw, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
201 old_key->swizzles[i], key->swizzles[i]);
202 }
203 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 1st coordinate",
204 old_key->gl_clamp_mask[0], key->gl_clamp_mask[0]);
205 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
206 old_key->gl_clamp_mask[1], key->gl_clamp_mask[1]);
207 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
208 old_key->gl_clamp_mask[2], key->gl_clamp_mask[2]);
209 found |= key_debug(brw, "gather channel quirk on any texture unit",
210 old_key->gather_channel_quirk_mask, key->gather_channel_quirk_mask);
211 found |= key_debug(brw, "compressed multisample layout",
212 old_key->compressed_multisample_layout_mask,
213 key->compressed_multisample_layout_mask);
214 found |= key_debug(brw, "16x msaa",
215 old_key->msaa_16,
216 key->msaa_16);
217
218 found |= key_debug(brw, "y_uv image bound",
219 old_key->y_uv_image_mask,
220 key->y_uv_image_mask);
221 found |= key_debug(brw, "y_u_v image bound",
222 old_key->y_u_v_image_mask,
223 key->y_u_v_image_mask);
224 found |= key_debug(brw, "yx_xuxv image bound",
225 old_key->yx_xuxv_image_mask,
226 key->yx_xuxv_image_mask);
227
228 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
229 found |= key_debug(brw, "textureGather workarounds",
230 old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]);
231 }
232
233 return found;
234 }
235
236 void
237 brw_wm_debug_recompile(struct brw_context *brw,
238 struct gl_shader_program *prog,
239 const struct brw_wm_prog_key *key)
240 {
241 struct brw_cache_item *c = NULL;
242 const struct brw_wm_prog_key *old_key = NULL;
243 bool found = false;
244
245 perf_debug("Recompiling fragment shader for program %d\n", prog->Name);
246
247 for (unsigned int i = 0; i < brw->cache.size; i++) {
248 for (c = brw->cache.items[i]; c; c = c->next) {
249 if (c->cache_id == BRW_CACHE_FS_PROG) {
250 old_key = c->key;
251
252 if (old_key->program_string_id == key->program_string_id)
253 break;
254 }
255 }
256 if (c)
257 break;
258 }
259
260 if (!c) {
261 perf_debug(" Didn't find previous compile in the shader cache for debug\n");
262 return;
263 }
264
265 found |= key_debug(brw, "alphatest, computed depth, depth test, or "
266 "depth write",
267 old_key->iz_lookup, key->iz_lookup);
268 found |= key_debug(brw, "depth statistics",
269 old_key->stats_wm, key->stats_wm);
270 found |= key_debug(brw, "flat shading",
271 old_key->flat_shade, key->flat_shade);
272 found |= key_debug(brw, "per-sample interpolation",
273 old_key->persample_interp, key->persample_interp);
274 found |= key_debug(brw, "number of color buffers",
275 old_key->nr_color_regions, key->nr_color_regions);
276 found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
277 old_key->replicate_alpha, key->replicate_alpha);
278 found |= key_debug(brw, "fragment color clamping",
279 old_key->clamp_fragment_color, key->clamp_fragment_color);
280 found |= key_debug(brw, "multisampled FBO",
281 old_key->multisample_fbo, key->multisample_fbo);
282 found |= key_debug(brw, "line smoothing",
283 old_key->line_aa, key->line_aa);
284 found |= key_debug(brw, "input slots valid",
285 old_key->input_slots_valid, key->input_slots_valid);
286 found |= key_debug(brw, "mrt alpha test function",
287 old_key->alpha_test_func, key->alpha_test_func);
288 found |= key_debug(brw, "mrt alpha test reference value",
289 old_key->alpha_test_ref, key->alpha_test_ref);
290
291 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
292
293 if (!found) {
294 perf_debug(" Something else\n");
295 }
296 }
297
298 static uint8_t
299 gen6_gather_workaround(GLenum internalformat)
300 {
301 switch (internalformat) {
302 case GL_R8I: return WA_SIGN | WA_8BIT;
303 case GL_R8UI: return WA_8BIT;
304 case GL_R16I: return WA_SIGN | WA_16BIT;
305 case GL_R16UI: return WA_16BIT;
306 default:
307 /* Note that even though GL_R32I and GL_R32UI have format overrides in
308 * the surface state, there is no shader w/a required.
309 */
310 return 0;
311 }
312 }
313
314 void
315 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
316 const struct gl_program *prog,
317 struct brw_sampler_prog_key_data *key)
318 {
319 struct brw_context *brw = brw_context(ctx);
320 GLbitfield mask = prog->SamplersUsed;
321
322 while (mask) {
323 const int s = u_bit_scan(&mask);
324
325 key->swizzles[s] = SWIZZLE_NOOP;
326
327 int unit_id = prog->SamplerUnits[s];
328 const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id];
329
330 if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) {
331 const struct gl_texture_object *t = unit->_Current;
332 const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
333 struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id);
334
335 const bool alpha_depth = t->DepthMode == GL_ALPHA &&
336 (img->_BaseFormat == GL_DEPTH_COMPONENT ||
337 img->_BaseFormat == GL_DEPTH_STENCIL);
338
339 /* Haswell handles texture swizzling as surface format overrides
340 * (except for GL_ALPHA); all other platforms need MOVs in the shader.
341 */
342 if (alpha_depth || (brw->gen < 8 && !brw->is_haswell))
343 key->swizzles[s] = brw_get_texture_swizzle(ctx, t);
344
345 if (brw->gen < 8 &&
346 sampler->MinFilter != GL_NEAREST &&
347 sampler->MagFilter != GL_NEAREST) {
348 if (sampler->WrapS == GL_CLAMP)
349 key->gl_clamp_mask[0] |= 1 << s;
350 if (sampler->WrapT == GL_CLAMP)
351 key->gl_clamp_mask[1] |= 1 << s;
352 if (sampler->WrapR == GL_CLAMP)
353 key->gl_clamp_mask[2] |= 1 << s;
354 }
355
356 /* gather4's channel select for green from RG32F is broken; requires
357 * a shader w/a on IVB; fixable with just SCS on HSW.
358 */
359 if (brw->gen == 7 && !brw->is_haswell && prog->UsesGather) {
360 if (img->InternalFormat == GL_RG32F)
361 key->gather_channel_quirk_mask |= 1 << s;
362 }
363
364 /* Gen6's gather4 is broken for UINT/SINT; we treat them as
365 * UNORM/FLOAT instead and fix it in the shader.
366 */
367 if (brw->gen == 6 && prog->UsesGather) {
368 key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
369 }
370
371 /* If this is a multisample sampler, and uses the CMS MSAA layout,
372 * then we need to emit slightly different code to first sample the
373 * MCS surface.
374 */
375 struct intel_texture_object *intel_tex =
376 intel_texture_object((struct gl_texture_object *)t);
377
378 /* From gen9 onwards some single sampled buffers can also be
379 * compressed. These don't need ld2dms sampling along with mcs fetch.
380 */
381 if (brw->gen >= 7 &&
382 intel_tex->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS &&
383 intel_tex->mt->num_samples > 1) {
384 key->compressed_multisample_layout_mask |= 1 << s;
385
386 if (intel_tex->mt->num_samples >= 16) {
387 assert(brw->gen >= 9);
388 key->msaa_16 |= 1 << s;
389 }
390 }
391
392 if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) {
393 switch (intel_tex->planar_format->components) {
394 case __DRI_IMAGE_COMPONENTS_Y_UV:
395 key->y_uv_image_mask |= 1 << s;
396 break;
397 case __DRI_IMAGE_COMPONENTS_Y_U_V:
398 key->y_u_v_image_mask |= 1 << s;
399 break;
400 case __DRI_IMAGE_COMPONENTS_Y_XUXV:
401 key->yx_xuxv_image_mask |= 1 << s;
402 break;
403 default:
404 break;
405 }
406 }
407
408 }
409 }
410 }
411
412 static bool
413 brw_wm_state_dirty(const struct brw_context *brw)
414 {
415 return brw_state_dirty(brw,
416 _NEW_BUFFERS |
417 _NEW_COLOR |
418 _NEW_DEPTH |
419 _NEW_FRAG_CLAMP |
420 _NEW_HINT |
421 _NEW_LIGHT |
422 _NEW_LINE |
423 _NEW_MULTISAMPLE |
424 _NEW_POLYGON |
425 _NEW_STENCIL |
426 _NEW_TEXTURE,
427 BRW_NEW_FRAGMENT_PROGRAM |
428 BRW_NEW_REDUCED_PRIMITIVE |
429 BRW_NEW_STATS_WM |
430 BRW_NEW_VUE_MAP_GEOM_OUT);
431 }
432
433 static void
434 brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
435 {
436 struct gl_context *ctx = &brw->ctx;
437 /* BRW_NEW_FRAGMENT_PROGRAM */
438 const struct brw_fragment_program *fp =
439 (struct brw_fragment_program *) brw->fragment_program;
440 const struct gl_program *prog = (struct gl_program *) brw->fragment_program;
441 GLuint lookup = 0;
442 GLuint line_aa;
443
444 memset(key, 0, sizeof(*key));
445
446 /* Build the index for table lookup
447 */
448 if (brw->gen < 6) {
449 /* _NEW_COLOR */
450 if (fp->program.UsesKill || ctx->Color.AlphaEnabled)
451 lookup |= IZ_PS_KILL_ALPHATEST_BIT;
452
453 if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
454 lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
455
456 /* _NEW_DEPTH */
457 if (ctx->Depth.Test)
458 lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
459
460 if (ctx->Depth.Test && ctx->Depth.Mask) /* ?? */
461 lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
462
463 /* _NEW_STENCIL | _NEW_BUFFERS */
464 if (ctx->Stencil._Enabled) {
465 lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
466
467 if (ctx->Stencil.WriteMask[0] ||
468 ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
469 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
470 }
471 key->iz_lookup = lookup;
472 }
473
474 line_aa = AA_NEVER;
475
476 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
477 if (ctx->Line.SmoothFlag) {
478 if (brw->reduced_primitive == GL_LINES) {
479 line_aa = AA_ALWAYS;
480 }
481 else if (brw->reduced_primitive == GL_TRIANGLES) {
482 if (ctx->Polygon.FrontMode == GL_LINE) {
483 line_aa = AA_SOMETIMES;
484
485 if (ctx->Polygon.BackMode == GL_LINE ||
486 (ctx->Polygon.CullFlag &&
487 ctx->Polygon.CullFaceMode == GL_BACK))
488 line_aa = AA_ALWAYS;
489 }
490 else if (ctx->Polygon.BackMode == GL_LINE) {
491 line_aa = AA_SOMETIMES;
492
493 if ((ctx->Polygon.CullFlag &&
494 ctx->Polygon.CullFaceMode == GL_FRONT))
495 line_aa = AA_ALWAYS;
496 }
497 }
498 }
499
500 key->line_aa = line_aa;
501
502 /* _NEW_HINT */
503 key->high_quality_derivatives =
504 ctx->Hint.FragmentShaderDerivative == GL_NICEST;
505
506 if (brw->gen < 6)
507 key->stats_wm = brw->stats_wm;
508
509 /* _NEW_LIGHT */
510 key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
511
512 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
513 key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
514
515 /* _NEW_TEXTURE */
516 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
517
518 /* _NEW_BUFFERS */
519 key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
520
521 /* _NEW_COLOR */
522 key->force_dual_color_blend = brw->dual_color_blend_by_location &&
523 (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
524
525 /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
526 key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
527 (ctx->Multisample.SampleAlphaToCoverage || ctx->Color.AlphaEnabled);
528
529 /* _NEW_BUFFERS _NEW_MULTISAMPLE */
530 /* Ignore sample qualifier while computing this flag. */
531 if (ctx->Multisample.Enabled) {
532 key->persample_interp =
533 ctx->Multisample.SampleShading &&
534 (ctx->Multisample.MinSampleShadingValue *
535 _mesa_geometric_samples(ctx->DrawBuffer) > 1);
536
537 key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
538 }
539
540 /* BRW_NEW_VUE_MAP_GEOM_OUT */
541 if (brw->gen < 6 || _mesa_bitcount_64(fp->program.Base.InputsRead &
542 BRW_FS_VARYING_INPUT_MASK) > 16)
543 key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
544
545
546 /* _NEW_COLOR | _NEW_BUFFERS */
547 /* Pre-gen6, the hardware alpha test always used each render
548 * target's alpha to do alpha test, as opposed to render target 0's alpha
549 * like GL requires. Fix that by building the alpha test into the
550 * shader, and we'll skip enabling the fixed function alpha test.
551 */
552 if (brw->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
553 ctx->Color.AlphaEnabled) {
554 key->alpha_test_func = ctx->Color.AlphaFunc;
555 key->alpha_test_ref = ctx->Color.AlphaRef;
556 }
557
558 /* The unique fragment program ID */
559 key->program_string_id = fp->id;
560
561 /* Whether reads from the framebuffer should behave coherently. */
562 key->coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
563 }
564
565 void
566 brw_upload_wm_prog(struct brw_context *brw)
567 {
568 struct gl_context *ctx = &brw->ctx;
569 struct gl_shader_program *current = ctx->_Shader->_CurrentFragmentProgram;
570 struct brw_wm_prog_key key;
571 struct brw_fragment_program *fp = (struct brw_fragment_program *)
572 brw->fragment_program;
573
574 if (!brw_wm_state_dirty(brw))
575 return;
576
577 brw_wm_populate_key(brw, &key);
578
579 if (!brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
580 &key, sizeof(key),
581 &brw->wm.base.prog_offset, &brw->wm.prog_data)) {
582 bool success = brw_codegen_wm_prog(brw, current, fp, &key);
583 (void) success;
584 assert(success);
585 }
586 brw->wm.base.prog_data = &brw->wm.prog_data->base;
587 }
588
589 bool
590 brw_fs_precompile(struct gl_context *ctx,
591 struct gl_shader_program *shader_prog,
592 struct gl_program *prog)
593 {
594 struct brw_context *brw = brw_context(ctx);
595 struct brw_wm_prog_key key;
596
597 struct gl_fragment_program *fp = (struct gl_fragment_program *) prog;
598 struct brw_fragment_program *bfp = brw_fragment_program(fp);
599
600 memset(&key, 0, sizeof(key));
601
602 if (brw->gen < 6) {
603 if (fp->UsesKill)
604 key.iz_lookup |= IZ_PS_KILL_ALPHATEST_BIT;
605
606 if (fp->Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
607 key.iz_lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
608
609 /* Just assume depth testing. */
610 key.iz_lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
611 key.iz_lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
612 }
613
614 if (brw->gen < 6 || _mesa_bitcount_64(fp->Base.InputsRead &
615 BRW_FS_VARYING_INPUT_MASK) > 16)
616 key.input_slots_valid = fp->Base.InputsRead | VARYING_BIT_POS;
617
618 brw_setup_tex_for_precompile(brw, &key.tex, &fp->Base);
619
620 key.nr_color_regions = _mesa_bitcount_64(fp->Base.OutputsWritten &
621 ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
622 BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
623 BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
624
625 key.program_string_id = bfp->id;
626
627 /* Whether reads from the framebuffer should behave coherently. */
628 key.coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
629
630 uint32_t old_prog_offset = brw->wm.base.prog_offset;
631 struct brw_wm_prog_data *old_prog_data = brw->wm.prog_data;
632
633 bool success = brw_codegen_wm_prog(brw, shader_prog, bfp, &key);
634
635 brw->wm.base.prog_offset = old_prog_offset;
636 brw->wm.prog_data = old_prog_data;
637
638 return success;
639 }