i965: Fix glFrontFacing in twoside GLSL demo.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "main/texformat.h"
33 #include "brw_context.h"
34 #include "brw_util.h"
35 #include "brw_wm.h"
36 #include "brw_state.h"
37
38
39 /** Return number of src args for given instruction */
40 GLuint brw_wm_nr_args( GLuint opcode )
41 {
42 switch (opcode) {
43 case WM_FRONTFACING:
44 return 0;
45 case WM_PIXELXY:
46 case WM_CINTERP:
47 case WM_WPOSXY:
48 return 1;
49 case WM_LINTERP:
50 case WM_DELTAXY:
51 case WM_PIXELW:
52 return 2;
53 case WM_FB_WRITE:
54 case WM_PINTERP:
55 return 3;
56 default:
57 assert(opcode < MAX_OPCODE);
58 return _mesa_num_inst_src_regs(opcode);
59 }
60 }
61
62
63 GLuint brw_wm_is_scalar_result( GLuint opcode )
64 {
65 switch (opcode) {
66 case OPCODE_COS:
67 case OPCODE_EX2:
68 case OPCODE_LG2:
69 case OPCODE_POW:
70 case OPCODE_RCP:
71 case OPCODE_RSQ:
72 case OPCODE_SIN:
73 case OPCODE_DP3:
74 case OPCODE_DP4:
75 case OPCODE_DPH:
76 case OPCODE_DST:
77 return 1;
78
79 default:
80 return 0;
81 }
82 }
83
84
85 /**
86 * Do GPU code generation for non-GLSL shader. non-GLSL shaders have
87 * no flow control instructions so we can more readily do SSA-style
88 * optimizations.
89 */
90 static void
91 brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
92 {
93 /* Augment fragment program. Add instructions for pre- and
94 * post-fragment-program tasks such as interpolation and fogging.
95 */
96 brw_wm_pass_fp(c);
97
98 /* Translate to intermediate representation. Build register usage
99 * chains.
100 */
101 brw_wm_pass0(c);
102
103 /* Dead code removal.
104 */
105 brw_wm_pass1(c);
106
107 /* Register allocation.
108 */
109 c->grf_limit = BRW_WM_MAX_GRF / 2;
110
111 brw_wm_pass2(c);
112
113 c->prog_data.total_grf = c->max_wm_grf;
114 if (c->last_scratch) {
115 c->prog_data.total_scratch = c->last_scratch + 0x40;
116 }
117 else {
118 c->prog_data.total_scratch = 0;
119 }
120
121 /* Emit GEN4 code.
122 */
123 brw_wm_emit(c);
124 }
125
126
127 /**
128 * All Mesa program -> GPU code generation goes through this function.
129 * Depending on the instructions used (i.e. flow control instructions)
130 * we'll use one of two code generators.
131 */
132 static void do_wm_prog( struct brw_context *brw,
133 struct brw_fragment_program *fp,
134 struct brw_wm_prog_key *key)
135 {
136 struct brw_wm_compile *c;
137 const GLuint *program;
138 GLuint program_size;
139
140 c = brw->wm.compile_data;
141 if (c == NULL) {
142 brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data));
143 c = brw->wm.compile_data;
144 } else {
145 memset(c, 0, sizeof(*brw->wm.compile_data));
146 }
147 memcpy(&c->key, key, sizeof(*key));
148
149 c->fp = fp;
150 c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
151
152 brw_init_compile(brw, &c->func);
153
154 /* temporary sanity check assertion */
155 ASSERT(fp->isGLSL == brw_wm_is_glsl(&c->fp->program));
156
157 /*
158 * Shader which use GLSL features such as flow control are handled
159 * differently from "simple" shaders.
160 */
161 if (fp->isGLSL) {
162 brw_wm_glsl_emit(brw, c);
163 }
164 else {
165 brw_wm_non_glsl_emit(brw, c);
166 }
167
168 if (INTEL_DEBUG & DEBUG_WM)
169 fprintf(stderr, "\n");
170
171 /* get the program
172 */
173 program = brw_get_program(&c->func, &program_size);
174
175 dri_bo_unreference(brw->wm.prog_bo);
176 brw->wm.prog_bo = brw_upload_cache( &brw->cache, BRW_WM_PROG,
177 &c->key, sizeof(c->key),
178 NULL, 0,
179 program, program_size,
180 &c->prog_data,
181 &brw->wm.prog_data );
182 }
183
184
185
186 static void brw_wm_populate_key( struct brw_context *brw,
187 struct brw_wm_prog_key *key )
188 {
189 GLcontext *ctx = &brw->intel.ctx;
190 /* BRW_NEW_FRAGMENT_PROGRAM */
191 const struct brw_fragment_program *fp =
192 (struct brw_fragment_program *)brw->fragment_program;
193 GLuint lookup = 0;
194 GLuint line_aa;
195 GLuint i;
196
197 memset(key, 0, sizeof(*key));
198
199 /* Build the index for table lookup
200 */
201 /* _NEW_COLOR */
202 if (fp->program.UsesKill ||
203 ctx->Color.AlphaEnabled)
204 lookup |= IZ_PS_KILL_ALPHATEST_BIT;
205
206 if (fp->program.Base.OutputsWritten & (1<<FRAG_RESULT_DEPTH))
207 lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
208
209 /* _NEW_DEPTH */
210 if (ctx->Depth.Test)
211 lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
212
213 if (ctx->Depth.Test &&
214 ctx->Depth.Mask) /* ?? */
215 lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
216
217 /* _NEW_STENCIL */
218 if (ctx->Stencil._Enabled) {
219 lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
220
221 if (ctx->Stencil.WriteMask[0] ||
222 ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
223 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
224 }
225
226 line_aa = AA_NEVER;
227
228 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
229 if (ctx->Line.SmoothFlag) {
230 if (brw->intel.reduced_primitive == GL_LINES) {
231 line_aa = AA_ALWAYS;
232 }
233 else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
234 if (ctx->Polygon.FrontMode == GL_LINE) {
235 line_aa = AA_SOMETIMES;
236
237 if (ctx->Polygon.BackMode == GL_LINE ||
238 (ctx->Polygon.CullFlag &&
239 ctx->Polygon.CullFaceMode == GL_BACK))
240 line_aa = AA_ALWAYS;
241 }
242 else if (ctx->Polygon.BackMode == GL_LINE) {
243 line_aa = AA_SOMETIMES;
244
245 if ((ctx->Polygon.CullFlag &&
246 ctx->Polygon.CullFaceMode == GL_FRONT))
247 line_aa = AA_ALWAYS;
248 }
249 }
250 }
251
252 brw_wm_lookup_iz(line_aa,
253 lookup,
254 key);
255
256
257 /* BRW_NEW_WM_INPUT_DIMENSIONS */
258 key->projtex_mask = brw->wm.input_size_masks[4-1] >> (FRAG_ATTRIB_TEX0 - FRAG_ATTRIB_WPOS);
259
260 /* _NEW_LIGHT */
261 key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
262
263 /* _NEW_TEXTURE */
264 for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
265 const struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
266
267 if (unit->_ReallyEnabled) {
268 const struct gl_texture_object *t = unit->_Current;
269 const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
270 if (img->InternalFormat == GL_YCBCR_MESA) {
271 key->yuvtex_mask |= 1 << i;
272 if (img->TexFormat->MesaFormat == MESA_FORMAT_YCBCR)
273 key->yuvtex_swap_mask |= 1 << i;
274 }
275
276 key->tex_swizzles[i] = t->_Swizzle;
277 }
278 else {
279 key->tex_swizzles[i] = SWIZZLE_NOOP;
280 }
281 }
282
283 /* Shadow */
284 key->shadowtex_mask = fp->program.Base.ShadowSamplers;
285
286 /* _NEW_BUFFERS */
287 /*
288 * Include the draw buffer origin and height so that we can calculate
289 * fragment position values relative to the bottom left of the drawable,
290 * from the incoming screen origin relative position we get as part of our
291 * payload.
292 *
293 * We could avoid recompiling by including this as a constant referenced by
294 * our program, but if we were to do that it would also be nice to handle
295 * getting that constant updated at batchbuffer submit time (when we
296 * hold the lock and know where the buffer really is) rather than at emit
297 * time when we don't hold the lock and are just guessing. We could also
298 * just avoid using this as key data if the program doesn't use
299 * fragment.position.
300 *
301 * This pretty much becomes moot with DRI2 and redirected buffers anyway,
302 * as our origins will always be zero then.
303 */
304 if (brw->intel.driDrawable != NULL) {
305 key->origin_x = brw->intel.driDrawable->x;
306 key->origin_y = brw->intel.driDrawable->y;
307 key->drawable_height = brw->intel.driDrawable->h;
308 }
309
310 /* The unique fragment program ID */
311 key->program_string_id = fp->id;
312 }
313
314
315 static void brw_prepare_wm_prog(struct brw_context *brw)
316 {
317 struct brw_wm_prog_key key;
318 struct brw_fragment_program *fp = (struct brw_fragment_program *)
319 brw->fragment_program;
320
321 brw_wm_populate_key(brw, &key);
322
323 /* Make an early check for the key.
324 */
325 dri_bo_unreference(brw->wm.prog_bo);
326 brw->wm.prog_bo = brw_search_cache(&brw->cache, BRW_WM_PROG,
327 &key, sizeof(key),
328 NULL, 0,
329 &brw->wm.prog_data);
330 if (brw->wm.prog_bo == NULL)
331 do_wm_prog(brw, fp, &key);
332 }
333
334
335 const struct brw_tracked_state brw_wm_prog = {
336 .dirty = {
337 .mesa = (_NEW_COLOR |
338 _NEW_DEPTH |
339 _NEW_STENCIL |
340 _NEW_POLYGON |
341 _NEW_LINE |
342 _NEW_LIGHT |
343 _NEW_BUFFERS |
344 _NEW_TEXTURE),
345 .brw = (BRW_NEW_FRAGMENT_PROGRAM |
346 BRW_NEW_WM_INPUT_DIMENSIONS |
347 BRW_NEW_REDUCED_PRIMITIVE),
348 .cache = 0
349 },
350 .prepare = brw_prepare_wm_prog
351 };
352