2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
32 #include "main/texformat.h"
33 #include "brw_context.h"
36 #include "brw_state.h"
39 /** Return number of src args for given instruction */
40 GLuint
brw_wm_nr_args( GLuint opcode
)
57 assert(opcode
< MAX_OPCODE
);
58 return _mesa_num_inst_src_regs(opcode
);
63 GLuint
brw_wm_is_scalar_result( GLuint opcode
)
86 * Do GPU code generation for non-GLSL shader. non-GLSL shaders have
87 * no flow control instructions so we can more readily do SSA-style
91 brw_wm_non_glsl_emit(struct brw_context
*brw
, struct brw_wm_compile
*c
)
93 /* Augment fragment program. Add instructions for pre- and
94 * post-fragment-program tasks such as interpolation and fogging.
98 /* Translate to intermediate representation. Build register usage
103 /* Dead code removal.
107 /* Register allocation.
109 c
->grf_limit
= BRW_WM_MAX_GRF
/ 2;
113 c
->prog_data
.total_grf
= c
->max_wm_grf
;
114 if (c
->last_scratch
) {
115 c
->prog_data
.total_scratch
= c
->last_scratch
+ 0x40;
118 c
->prog_data
.total_scratch
= 0;
128 * All Mesa program -> GPU code generation goes through this function.
129 * Depending on the instructions used (i.e. flow control instructions)
130 * we'll use one of two code generators.
132 static void do_wm_prog( struct brw_context
*brw
,
133 struct brw_fragment_program
*fp
,
134 struct brw_wm_prog_key
*key
)
136 struct brw_wm_compile
*c
;
137 const GLuint
*program
;
140 c
= brw
->wm
.compile_data
;
142 brw
->wm
.compile_data
= calloc(1, sizeof(*brw
->wm
.compile_data
));
143 c
= brw
->wm
.compile_data
;
145 memset(c
, 0, sizeof(*brw
->wm
.compile_data
));
147 memcpy(&c
->key
, key
, sizeof(*key
));
150 c
->env_param
= brw
->intel
.ctx
.FragmentProgram
.Parameters
;
152 brw_init_compile(brw
, &c
->func
);
154 /* temporary sanity check assertion */
155 ASSERT(fp
->isGLSL
== brw_wm_is_glsl(&c
->fp
->program
));
158 * Shader which use GLSL features such as flow control are handled
159 * differently from "simple" shaders.
162 brw_wm_glsl_emit(brw
, c
);
165 brw_wm_non_glsl_emit(brw
, c
);
168 if (INTEL_DEBUG
& DEBUG_WM
)
169 fprintf(stderr
, "\n");
173 program
= brw_get_program(&c
->func
, &program_size
);
175 dri_bo_unreference(brw
->wm
.prog_bo
);
176 brw
->wm
.prog_bo
= brw_upload_cache( &brw
->cache
, BRW_WM_PROG
,
177 &c
->key
, sizeof(c
->key
),
179 program
, program_size
,
181 &brw
->wm
.prog_data
);
186 static void brw_wm_populate_key( struct brw_context
*brw
,
187 struct brw_wm_prog_key
*key
)
189 GLcontext
*ctx
= &brw
->intel
.ctx
;
190 /* BRW_NEW_FRAGMENT_PROGRAM */
191 const struct brw_fragment_program
*fp
=
192 (struct brw_fragment_program
*)brw
->fragment_program
;
197 memset(key
, 0, sizeof(*key
));
199 /* Build the index for table lookup
202 if (fp
->program
.UsesKill
||
203 ctx
->Color
.AlphaEnabled
)
204 lookup
|= IZ_PS_KILL_ALPHATEST_BIT
;
206 if (fp
->program
.Base
.OutputsWritten
& (1<<FRAG_RESULT_DEPTH
))
207 lookup
|= IZ_PS_COMPUTES_DEPTH_BIT
;
211 lookup
|= IZ_DEPTH_TEST_ENABLE_BIT
;
213 if (ctx
->Depth
.Test
&&
214 ctx
->Depth
.Mask
) /* ?? */
215 lookup
|= IZ_DEPTH_WRITE_ENABLE_BIT
;
218 if (ctx
->Stencil
._Enabled
) {
219 lookup
|= IZ_STENCIL_TEST_ENABLE_BIT
;
221 if (ctx
->Stencil
.WriteMask
[0] ||
222 ctx
->Stencil
.WriteMask
[ctx
->Stencil
._BackFace
])
223 lookup
|= IZ_STENCIL_WRITE_ENABLE_BIT
;
228 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
229 if (ctx
->Line
.SmoothFlag
) {
230 if (brw
->intel
.reduced_primitive
== GL_LINES
) {
233 else if (brw
->intel
.reduced_primitive
== GL_TRIANGLES
) {
234 if (ctx
->Polygon
.FrontMode
== GL_LINE
) {
235 line_aa
= AA_SOMETIMES
;
237 if (ctx
->Polygon
.BackMode
== GL_LINE
||
238 (ctx
->Polygon
.CullFlag
&&
239 ctx
->Polygon
.CullFaceMode
== GL_BACK
))
242 else if (ctx
->Polygon
.BackMode
== GL_LINE
) {
243 line_aa
= AA_SOMETIMES
;
245 if ((ctx
->Polygon
.CullFlag
&&
246 ctx
->Polygon
.CullFaceMode
== GL_FRONT
))
252 brw_wm_lookup_iz(line_aa
,
257 /* BRW_NEW_WM_INPUT_DIMENSIONS */
258 key
->projtex_mask
= brw
->wm
.input_size_masks
[4-1] >> (FRAG_ATTRIB_TEX0
- FRAG_ATTRIB_WPOS
);
261 key
->flat_shade
= (ctx
->Light
.ShadeModel
== GL_FLAT
);
264 for (i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
265 const struct gl_texture_unit
*unit
= &ctx
->Texture
.Unit
[i
];
267 if (unit
->_ReallyEnabled
) {
268 const struct gl_texture_object
*t
= unit
->_Current
;
269 const struct gl_texture_image
*img
= t
->Image
[0][t
->BaseLevel
];
270 if (img
->InternalFormat
== GL_YCBCR_MESA
) {
271 key
->yuvtex_mask
|= 1 << i
;
272 if (img
->TexFormat
->MesaFormat
== MESA_FORMAT_YCBCR
)
273 key
->yuvtex_swap_mask
|= 1 << i
;
276 key
->tex_swizzles
[i
] = t
->_Swizzle
;
279 key
->tex_swizzles
[i
] = SWIZZLE_NOOP
;
284 key
->shadowtex_mask
= fp
->program
.Base
.ShadowSamplers
;
288 * Include the draw buffer origin and height so that we can calculate
289 * fragment position values relative to the bottom left of the drawable,
290 * from the incoming screen origin relative position we get as part of our
293 * We could avoid recompiling by including this as a constant referenced by
294 * our program, but if we were to do that it would also be nice to handle
295 * getting that constant updated at batchbuffer submit time (when we
296 * hold the lock and know where the buffer really is) rather than at emit
297 * time when we don't hold the lock and are just guessing. We could also
298 * just avoid using this as key data if the program doesn't use
301 * This pretty much becomes moot with DRI2 and redirected buffers anyway,
302 * as our origins will always be zero then.
304 if (brw
->intel
.driDrawable
!= NULL
) {
305 key
->origin_x
= brw
->intel
.driDrawable
->x
;
306 key
->origin_y
= brw
->intel
.driDrawable
->y
;
307 key
->drawable_height
= brw
->intel
.driDrawable
->h
;
310 /* The unique fragment program ID */
311 key
->program_string_id
= fp
->id
;
315 static void brw_prepare_wm_prog(struct brw_context
*brw
)
317 struct brw_wm_prog_key key
;
318 struct brw_fragment_program
*fp
= (struct brw_fragment_program
*)
319 brw
->fragment_program
;
321 brw_wm_populate_key(brw
, &key
);
323 /* Make an early check for the key.
325 dri_bo_unreference(brw
->wm
.prog_bo
);
326 brw
->wm
.prog_bo
= brw_search_cache(&brw
->cache
, BRW_WM_PROG
,
330 if (brw
->wm
.prog_bo
== NULL
)
331 do_wm_prog(brw
, fp
, &key
);
335 const struct brw_tracked_state brw_wm_prog
= {
337 .mesa
= (_NEW_COLOR
|
345 .brw
= (BRW_NEW_FRAGMENT_PROGRAM
|
346 BRW_NEW_WM_INPUT_DIMENSIONS
|
347 BRW_NEW_REDUCED_PRIMITIVE
),
350 .prepare
= brw_prepare_wm_prog