src/mesa/drivers/dri/i965/brw_wm.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "main/texformat.h"
  33 #include "brw_context.h"
  34 #include "brw_util.h"
  35 #include "brw_wm.h"
  36 #include "brw_state.h"
  37
  38
  39 /** Return number of src args for given instruction */
  40 GLuint brw_wm_nr_args( GLuint opcode )
  41 {
  42    switch (opcode) {
  43    case WM_PIXELXY:
  44    case WM_CINTERP:
  45    case WM_WPOSXY:
  46       return 1;
  47    case WM_LINTERP:
  48    case WM_DELTAXY:
  49    case WM_PIXELW:
  50       return 2;
  51    case WM_FB_WRITE:
  52    case WM_PINTERP:
  53       return 3;
  54    default:
  55       assert(opcode < MAX_OPCODE);
  56       return _mesa_num_inst_src_regs(opcode);
  57    }
  58 }
  59
  60
  61 GLuint brw_wm_is_scalar_result( GLuint opcode )
  62 {
  63    switch (opcode) {
  64    case OPCODE_COS:
  65    case OPCODE_EX2:
  66    case OPCODE_LG2:
  67    case OPCODE_POW:
  68    case OPCODE_RCP:
  69    case OPCODE_RSQ:
  70    case OPCODE_SIN:
  71    case OPCODE_DP3:
  72    case OPCODE_DP4:
  73    case OPCODE_DPH:
  74    case OPCODE_DST:
  75       return 1;
  76
  77    default:
  78       return 0;
  79    }
  80 }
  81
  82
  83 /**
  84  * Do GPU code generation for non-GLSL shader.  non-GLSL shaders have
  85  * no flow control instructions so we can more readily do SSA-style
  86  * optimizations.
  87  */
  88 static void
  89 brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
  90 {
  91    /* Augment fragment program.  Add instructions for pre- and
  92     * post-fragment-program tasks such as interpolation and fogging.
  93     */
  94    brw_wm_pass_fp(c);
  95
  96    /* Translate to intermediate representation.  Build register usage
  97     * chains.
  98     */
  99    brw_wm_pass0(c);
 100
 101    /* Dead code removal.
 102     */
 103    brw_wm_pass1(c);
 104
 105    /* Register allocation.
 106     */
 107    c->grf_limit = BRW_WM_MAX_GRF / 2;
 108
 109    brw_wm_pass2(c);
 110
 111    c->prog_data.total_grf = c->max_wm_grf;
 112    if (c->last_scratch) {
 113       c->prog_data.total_scratch = c->last_scratch + 0x40;
 114    }
 115    else {
 116       c->prog_data.total_scratch = 0;
 117    }
 118
 119    /* Emit GEN4 code.
 120     */
 121    brw_wm_emit(c);
 122 }
 123
 124
 125 /**
 126  * All Mesa program -> GPU code generation goes through this function.
 127  * Depending on the instructions used (i.e. flow control instructions)
 128  * we'll use one of two code generators.
 129  */
 130 static void do_wm_prog( struct brw_context *brw,
 131                         struct brw_fragment_program *fp,
 132                         struct brw_wm_prog_key *key)
 133 {
 134    struct brw_wm_compile *c;
 135    const GLuint *program;
 136    GLuint program_size;
 137
 138    c = brw->wm.compile_data;
 139    if (c == NULL) {
 140       brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data));
 141       c = brw->wm.compile_data;
 142    } else {
 143       memset(c, 0, sizeof(*brw->wm.compile_data));
 144    }
 145    memcpy(&c->key, key, sizeof(*key));
 146
 147    c->fp = fp;
 148    c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
 149
 150    brw_init_compile(brw, &c->func);
 151
 152    /*
 153     * Shader which use GLSL features such as flow control are handled
 154     * differently from "simple" shaders.
 155     */
 156    if (brw_wm_is_glsl(&c->fp->program)) {
 157       brw_wm_glsl_emit(brw, c);
 158    }
 159    else {
 160       brw_wm_non_glsl_emit(brw, c);
 161    }
 162
 163    if (INTEL_DEBUG & DEBUG_WM)
 164       fprintf(stderr, "\n");
 165
 166    /* get the program
 167     */
 168    program = brw_get_program(&c->func, &program_size);
 169
 170    dri_bo_unreference(brw->wm.prog_bo);
 171    brw->wm.prog_bo = brw_upload_cache( &brw->cache, BRW_WM_PROG,
 172                                        &c->key, sizeof(c->key),
 173                                        NULL, 0,
 174                                        program, program_size,
 175                                        &c->prog_data,
 176                                        &brw->wm.prog_data );
 177 }
 178
 179
 180
 181 static void brw_wm_populate_key( struct brw_context *brw,
 182                                  struct brw_wm_prog_key *key )
 183 {
 184    GLcontext *ctx = &brw->intel.ctx;
 185    /* BRW_NEW_FRAGMENT_PROGRAM */
 186    const struct brw_fragment_program *fp =
 187       (struct brw_fragment_program *)brw->fragment_program;
 188    GLuint lookup = 0;
 189    GLuint line_aa;
 190    GLuint i;
 191
 192    memset(key, 0, sizeof(*key));
 193
 194    /* Build the index for table lookup
 195     */
 196    /* _NEW_COLOR */
 197    if (fp->program.UsesKill ||
 198        ctx->Color.AlphaEnabled)
 199       lookup |= IZ_PS_KILL_ALPHATEST_BIT;
 200
 201    if (fp->program.Base.OutputsWritten & (1<<FRAG_RESULT_DEPTH))
 202       lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
 203
 204    /* _NEW_DEPTH */
 205    if (ctx->Depth.Test)
 206       lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
 207
 208    if (ctx->Depth.Test &&
 209        ctx->Depth.Mask) /* ?? */
 210       lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
 211
 212    /* _NEW_STENCIL */
 213    if (ctx->Stencil._Enabled) {
 214       lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
 215
 216       if (ctx->Stencil.WriteMask[0] ||
 217           ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
 218          lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
 219    }
 220
 221    line_aa = AA_NEVER;
 222
 223    /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
 224    if (ctx->Line.SmoothFlag) {
 225       if (brw->intel.reduced_primitive == GL_LINES) {
 226          line_aa = AA_ALWAYS;
 227       }
 228       else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
 229          if (ctx->Polygon.FrontMode == GL_LINE) {
 230             line_aa = AA_SOMETIMES;
 231
 232             if (ctx->Polygon.BackMode == GL_LINE ||
 233                 (ctx->Polygon.CullFlag &&
 234                  ctx->Polygon.CullFaceMode == GL_BACK))
 235                line_aa = AA_ALWAYS;
 236          }
 237          else if (ctx->Polygon.BackMode == GL_LINE) {
 238             line_aa = AA_SOMETIMES;
 239
 240             if ((ctx->Polygon.CullFlag &&
 241                  ctx->Polygon.CullFaceMode == GL_FRONT))
 242                line_aa = AA_ALWAYS;
 243          }
 244       }
 245    }
 246
 247    brw_wm_lookup_iz(line_aa,
 248                     lookup,
 249                     key);
 250
 251
 252    /* BRW_NEW_WM_INPUT_DIMENSIONS */
 253    key->projtex_mask = brw->wm.input_size_masks[4-1] >> (FRAG_ATTRIB_TEX0 - FRAG_ATTRIB_WPOS);
 254
 255    /* _NEW_LIGHT */
 256    key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
 257
 258    /* _NEW_TEXTURE */
 259    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 260       const struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
 261
 262       if (unit->_ReallyEnabled) {
 263          const struct gl_texture_object *t = unit->_Current;
 264          const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
 265          if (img->InternalFormat == GL_YCBCR_MESA) {
 266             key->yuvtex_mask |= 1 << i;
 267             if (img->TexFormat->MesaFormat == MESA_FORMAT_YCBCR)
 268                 key->yuvtex_swap_mask |= 1 << i;
 269          }
 270
 271          key->tex_swizzles[i] = t->_Swizzle;
 272       }
 273       else {
 274          key->tex_swizzles[i] = SWIZZLE_NOOP;
 275       }
 276    }
 277
 278    /* Shadow */
 279    key->shadowtex_mask = fp->program.Base.ShadowSamplers;
 280
 281    /* _NEW_BUFFERS */
 282    /*
 283     * Include the draw buffer origin and height so that we can calculate
 284     * fragment position values relative to the bottom left of the drawable,
 285     * from the incoming screen origin relative position we get as part of our
 286     * payload.
 287     *
 288     * We could avoid recompiling by including this as a constant referenced by
 289     * our program, but if we were to do that it would also be nice to handle
 290     * getting that constant updated at batchbuffer submit time (when we
 291     * hold the lock and know where the buffer really is) rather than at emit
 292     * time when we don't hold the lock and are just guessing.  We could also
 293     * just avoid using this as key data if the program doesn't use
 294     * fragment.position.
 295     *
 296     * This pretty much becomes moot with DRI2 and redirected buffers anyway,
 297     * as our origins will always be zero then.
 298     */
 299    if (brw->intel.driDrawable != NULL) {
 300       key->origin_x = brw->intel.driDrawable->x;
 301       key->origin_y = brw->intel.driDrawable->y;
 302       key->drawable_height = brw->intel.driDrawable->h;
 303    }
 304
 305    /* The unique fragment program ID */
 306    key->program_string_id = fp->id;
 307 }
 308
 309
 310 static void brw_prepare_wm_prog(struct brw_context *brw)
 311 {
 312    struct brw_wm_prog_key key;
 313    struct brw_fragment_program *fp = (struct brw_fragment_program *)
 314       brw->fragment_program;
 315
 316    brw_wm_populate_key(brw, &key);
 317
 318    /* Make an early check for the key.
 319     */
 320    dri_bo_unreference(brw->wm.prog_bo);
 321    brw->wm.prog_bo = brw_search_cache(&brw->cache, BRW_WM_PROG,
 322                                       &key, sizeof(key),
 323                                       NULL, 0,
 324                                       &brw->wm.prog_data);
 325    if (brw->wm.prog_bo == NULL)
 326       do_wm_prog(brw, fp, &key);
 327 }
 328
 329
 330 const struct brw_tracked_state brw_wm_prog = {
 331    .dirty = {
 332       .mesa  = (_NEW_COLOR |
 333                 _NEW_DEPTH |
 334                 _NEW_STENCIL |
 335                 _NEW_POLYGON |
 336                 _NEW_LINE |
 337                 _NEW_LIGHT |
 338                 _NEW_BUFFERS |
 339                 _NEW_TEXTURE),
 340       .brw   = (BRW_NEW_FRAGMENT_PROGRAM |
 341                 BRW_NEW_WM_INPUT_DIMENSIONS |
 342                 BRW_NEW_REDUCED_PRIMITIVE),
 343       .cache = 0
 344    },
 345    .prepare = brw_prepare_wm_prog
 346 };
 347