src/mesa/drivers/dri/i965/brw_wm.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "brw_context.h"
  33 #include "brw_util.h"
  34 #include "brw_wm.h"
  35 #include "brw_state.h"
  36
  37
  38 /** Return number of src args for given instruction */
  39 GLuint brw_wm_nr_args( GLuint opcode )
  40 {
  41    switch (opcode) {
  42    case WM_FRONTFACING:
  43    case WM_PIXELXY:
  44       return 0;
  45    case WM_CINTERP:
  46    case WM_WPOSXY:
  47    case WM_DELTAXY:
  48       return 1;
  49    case WM_LINTERP:
  50    case WM_PIXELW:
  51       return 2;
  52    case WM_FB_WRITE:
  53    case WM_PINTERP:
  54       return 3;
  55    default:
  56       assert(opcode < MAX_OPCODE);
  57       return _mesa_num_inst_src_regs(opcode);
  58    }
  59 }
  60
  61
  62 GLuint brw_wm_is_scalar_result( GLuint opcode )
  63 {
  64    switch (opcode) {
  65    case OPCODE_COS:
  66    case OPCODE_EX2:
  67    case OPCODE_LG2:
  68    case OPCODE_POW:
  69    case OPCODE_RCP:
  70    case OPCODE_RSQ:
  71    case OPCODE_SIN:
  72    case OPCODE_DP3:
  73    case OPCODE_DP4:
  74    case OPCODE_DPH:
  75    case OPCODE_DST:
  76       return 1;
  77
  78    default:
  79       return 0;
  80    }
  81 }
  82
  83
  84 /**
  85  * Do GPU code generation for non-GLSL shader.  non-GLSL shaders have
  86  * no flow control instructions so we can more readily do SSA-style
  87  * optimizations.
  88  */
  89 static void
  90 brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
  91 {
  92    /* Augment fragment program.  Add instructions for pre- and
  93     * post-fragment-program tasks such as interpolation and fogging.
  94     */
  95    brw_wm_pass_fp(c);
  96
  97    /* Translate to intermediate representation.  Build register usage
  98     * chains.
  99     */
 100    brw_wm_pass0(c);
 101
 102    /* Dead code removal.
 103     */
 104    brw_wm_pass1(c);
 105
 106    /* Register allocation.
 107     * Divide by two because we operate on 16 pixels at a time and require
 108     * two GRF entries for each logical shader register.
 109     */
 110    c->grf_limit = BRW_WM_MAX_GRF / 2;
 111
 112    brw_wm_pass2(c);
 113
 114    /* how many general-purpose registers are used */
 115    c->prog_data.total_grf = c->max_wm_grf;
 116
 117    /* Scratch space is used for register spilling */
 118    if (c->last_scratch) {
 119       c->prog_data.total_scratch = c->last_scratch + 0x40;
 120    }
 121    else {
 122       c->prog_data.total_scratch = 0;
 123    }
 124
 125    /* Emit GEN4 code.
 126     */
 127    brw_wm_emit(c);
 128 }
 129
 130
 131 /**
 132  * All Mesa program -> GPU code generation goes through this function.
 133  * Depending on the instructions used (i.e. flow control instructions)
 134  * we'll use one of two code generators.
 135  */
 136 static void do_wm_prog( struct brw_context *brw,
 137                         struct brw_fragment_program *fp,
 138                         struct brw_wm_prog_key *key)
 139 {
 140    struct brw_wm_compile *c;
 141    const GLuint *program;
 142    GLuint program_size;
 143
 144    c = brw->wm.compile_data;
 145    if (c == NULL) {
 146       brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data));
 147       c = brw->wm.compile_data;
 148       if (c == NULL) {
 149          /* Ouch - big out of memory problem.  Can't continue
 150           * without triggering a segfault, no way to signal,
 151           * so just return.
 152           */
 153          return;
 154       }
 155    } else {
 156       memset(c, 0, sizeof(*brw->wm.compile_data));
 157    }
 158    memcpy(&c->key, key, sizeof(*key));
 159
 160    c->fp = fp;
 161    c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
 162
 163    brw_init_compile(brw, &c->func);
 164
 165    /* temporary sanity check assertion */
 166    ASSERT(fp->isGLSL == brw_wm_is_glsl(&c->fp->program));
 167
 168    /*
 169     * Shader which use GLSL features such as flow control are handled
 170     * differently from "simple" shaders.
 171     */
 172    if (fp->isGLSL) {
 173       c->dispatch_width = 8;
 174       brw_wm_glsl_emit(brw, c);
 175    }
 176    else {
 177       c->dispatch_width = 16;
 178       brw_wm_non_glsl_emit(brw, c);
 179    }
 180
 181    if (INTEL_DEBUG & DEBUG_WM)
 182       fprintf(stderr, "\n");
 183
 184    /* get the program
 185     */
 186    program = brw_get_program(&c->func, &program_size);
 187
 188    dri_bo_unreference(brw->wm.prog_bo);
 189    brw->wm.prog_bo = brw_upload_cache( &brw->cache, BRW_WM_PROG,
 190                                        &c->key, sizeof(c->key),
 191                                        NULL, 0,
 192                                        program, program_size,
 193                                        &c->prog_data,
 194                                        &brw->wm.prog_data );
 195 }
 196
 197
 198
 199 static void brw_wm_populate_key( struct brw_context *brw,
 200                                  struct brw_wm_prog_key *key )
 201 {
 202    GLcontext *ctx = &brw->intel.ctx;
 203    /* BRW_NEW_FRAGMENT_PROGRAM */
 204    const struct brw_fragment_program *fp =
 205       (struct brw_fragment_program *)brw->fragment_program;
 206    GLboolean uses_depth = (fp->program.Base.InputsRead & (1 << FRAG_ATTRIB_WPOS)) != 0;
 207    GLuint lookup = 0;
 208    GLuint line_aa;
 209    GLuint i;
 210
 211    memset(key, 0, sizeof(*key));
 212
 213    /* Build the index for table lookup
 214     */
 215    /* _NEW_COLOR */
 216    if (fp->program.UsesKill ||
 217        ctx->Color.AlphaEnabled)
 218       lookup |= IZ_PS_KILL_ALPHATEST_BIT;
 219
 220    if (fp->program.Base.OutputsWritten & (1<<FRAG_RESULT_DEPTH))
 221       lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
 222
 223    /* _NEW_DEPTH */
 224    if (ctx->Depth.Test)
 225       lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
 226
 227    if (ctx->Depth.Test &&
 228        ctx->Depth.Mask) /* ?? */
 229       lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
 230
 231    /* _NEW_STENCIL */
 232    if (ctx->Stencil._Enabled) {
 233       lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
 234
 235       if (ctx->Stencil.WriteMask[0] ||
 236           ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
 237          lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
 238    }
 239
 240    line_aa = AA_NEVER;
 241
 242    /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
 243    if (ctx->Line.SmoothFlag) {
 244       if (brw->intel.reduced_primitive == GL_LINES) {
 245          line_aa = AA_ALWAYS;
 246       }
 247       else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
 248          if (ctx->Polygon.FrontMode == GL_LINE) {
 249             line_aa = AA_SOMETIMES;
 250
 251             if (ctx->Polygon.BackMode == GL_LINE ||
 252                 (ctx->Polygon.CullFlag &&
 253                  ctx->Polygon.CullFaceMode == GL_BACK))
 254                line_aa = AA_ALWAYS;
 255          }
 256          else if (ctx->Polygon.BackMode == GL_LINE) {
 257             line_aa = AA_SOMETIMES;
 258
 259             if ((ctx->Polygon.CullFlag &&
 260                  ctx->Polygon.CullFaceMode == GL_FRONT))
 261                line_aa = AA_ALWAYS;
 262          }
 263       }
 264    }
 265
 266    brw_wm_lookup_iz(line_aa,
 267                     lookup,
 268                     uses_depth,
 269                     key);
 270
 271
 272    /* BRW_NEW_WM_INPUT_DIMENSIONS */
 273    key->proj_attrib_mask = brw->wm.input_size_masks[4-1];
 274
 275    /* _NEW_LIGHT */
 276    key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
 277
 278    /* _NEW_HINT */
 279    key->linear_color = (ctx->Hint.PerspectiveCorrection == GL_FASTEST);
 280
 281    /* _NEW_TEXTURE */
 282    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 283       const struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
 284
 285       if (unit->_ReallyEnabled) {
 286          const struct gl_texture_object *t = unit->_Current;
 287          const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
 288          if (img->InternalFormat == GL_YCBCR_MESA) {
 289             key->yuvtex_mask |= 1 << i;
 290             if (img->TexFormat == MESA_FORMAT_YCBCR)
 291                 key->yuvtex_swap_mask |= 1 << i;
 292          }
 293
 294          key->tex_swizzles[i] = t->_Swizzle;
 295       }
 296       else {
 297          key->tex_swizzles[i] = SWIZZLE_NOOP;
 298       }
 299    }
 300
 301    /* Shadow */
 302    key->shadowtex_mask = fp->program.Base.ShadowSamplers;
 303
 304    /* _NEW_BUFFERS */
 305    /*
 306     * Include the draw buffer origin and height so that we can calculate
 307     * fragment position values relative to the bottom left of the drawable,
 308     * from the incoming screen origin relative position we get as part of our
 309     * payload.
 310     *
 311     * This is only needed for the WM_WPOSXY opcode when the fragment program
 312     * uses the gl_FragCoord input.
 313     *
 314     * We could avoid recompiling by including this as a constant referenced by
 315     * our program, but if we were to do that it would also be nice to handle
 316     * getting that constant updated at batchbuffer submit time (when we
 317     * hold the lock and know where the buffer really is) rather than at emit
 318     * time when we don't hold the lock and are just guessing.  We could also
 319     * just avoid using this as key data if the program doesn't use
 320     * fragment.position.
 321     *
 322     * For DRI2 the origin_x/y will always be (0,0) but we still need the
 323     * drawable height in order to invert the Y axis.
 324     */
 325    if (fp->program.Base.InputsRead & FRAG_BIT_WPOS) {
 326       if (brw->intel.driDrawable != NULL) {
 327          key->origin_x = brw->intel.driDrawable->x;
 328          key->origin_y = brw->intel.driDrawable->y;
 329          key->drawable_height = brw->intel.driDrawable->h;
 330       }
 331    }
 332
 333    key->nr_color_regions = brw->state.nr_color_regions;
 334
 335    /* CACHE_NEW_VS_PROG */
 336    key->vp_outputs_written = brw->vs.prog_data->outputs_written & DO_SETUP_BITS;
 337
 338    /* The unique fragment program ID */
 339    key->program_string_id = fp->id;
 340 }
 341
 342
 343 static void brw_prepare_wm_prog(struct brw_context *brw)
 344 {
 345    struct brw_wm_prog_key key;
 346    struct brw_fragment_program *fp = (struct brw_fragment_program *)
 347       brw->fragment_program;
 348
 349    brw_wm_populate_key(brw, &key);
 350
 351    /* Make an early check for the key.
 352     */
 353    dri_bo_unreference(brw->wm.prog_bo);
 354    brw->wm.prog_bo = brw_search_cache(&brw->cache, BRW_WM_PROG,
 355                                       &key, sizeof(key),
 356                                       NULL, 0,
 357                                       &brw->wm.prog_data);
 358    if (brw->wm.prog_bo == NULL)
 359       do_wm_prog(brw, fp, &key);
 360 }
 361
 362
 363 const struct brw_tracked_state brw_wm_prog = {
 364    .dirty = {
 365       .mesa  = (_NEW_COLOR |
 366                 _NEW_DEPTH |
 367                 _NEW_HINT |
 368                 _NEW_STENCIL |
 369                 _NEW_POLYGON |
 370                 _NEW_LINE |
 371                 _NEW_LIGHT |
 372                 _NEW_BUFFERS |
 373                 _NEW_TEXTURE),
 374       .brw   = (BRW_NEW_FRAGMENT_PROGRAM |
 375                 BRW_NEW_WM_INPUT_DIMENSIONS |
 376                 BRW_NEW_REDUCED_PRIMITIVE),
 377       .cache = CACHE_NEW_VS_PROG,
 378    },
 379    .prepare = brw_prepare_wm_prog
 380 };
 381