2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
32 #include "brw_context.h"
34 #include "brw_state.h"
37 /** Return number of src args for given instruction */
38 GLuint
brw_wm_nr_args( GLuint opcode
)
55 assert(opcode
< MAX_OPCODE
);
56 return _mesa_num_inst_src_regs(opcode
);
61 GLuint
brw_wm_is_scalar_result( GLuint opcode
)
84 * Do GPU code generation for non-GLSL shader. non-GLSL shaders have
85 * no flow control instructions so we can more readily do SSA-style
89 brw_wm_non_glsl_emit(struct brw_context
*brw
, struct brw_wm_compile
*c
)
91 /* Augment fragment program. Add instructions for pre- and
92 * post-fragment-program tasks such as interpolation and fogging.
96 /* Translate to intermediate representation. Build register usage
101 /* Dead code removal.
105 /* Register allocation.
106 * Divide by two because we operate on 16 pixels at a time and require
107 * two GRF entries for each logical shader register.
109 c
->grf_limit
= BRW_WM_MAX_GRF
/ 2;
113 /* how many general-purpose registers are used */
114 c
->prog_data
.total_grf
= c
->max_wm_grf
;
116 /* Scratch space is used for register spilling */
117 if (c
->last_scratch
) {
118 c
->prog_data
.total_scratch
= c
->last_scratch
+ 0x40;
121 c
->prog_data
.total_scratch
= 0;
131 * All Mesa program -> GPU code generation goes through this function.
132 * Depending on the instructions used (i.e. flow control instructions)
133 * we'll use one of two code generators.
135 static void do_wm_prog( struct brw_context
*brw
,
136 struct brw_fragment_program
*fp
,
137 struct brw_wm_prog_key
*key
)
139 struct brw_wm_compile
*c
;
140 const GLuint
*program
;
143 c
= brw
->wm
.compile_data
;
145 brw
->wm
.compile_data
= calloc(1, sizeof(*brw
->wm
.compile_data
));
146 c
= brw
->wm
.compile_data
;
148 /* Ouch - big out of memory problem. Can't continue
149 * without triggering a segfault, no way to signal,
154 c
->instruction
= calloc(1, BRW_WM_MAX_INSN
* sizeof(*c
->instruction
));
155 c
->prog_instructions
= calloc(1, BRW_WM_MAX_INSN
*
156 sizeof(*c
->prog_instructions
));
157 c
->vreg
= calloc(1, BRW_WM_MAX_VREG
* sizeof(*c
->vreg
));
158 c
->refs
= calloc(1, BRW_WM_MAX_REF
* sizeof(*c
->refs
));
160 void *instruction
= c
->instruction
;
161 void *prog_instructions
= c
->prog_instructions
;
162 void *vreg
= c
->vreg
;
163 void *refs
= c
->refs
;
164 memset(c
, 0, sizeof(*brw
->wm
.compile_data
));
165 c
->instruction
= instruction
;
166 c
->prog_instructions
= prog_instructions
;
170 memcpy(&c
->key
, key
, sizeof(*key
));
173 c
->env_param
= brw
->intel
.ctx
.FragmentProgram
.Parameters
;
175 brw_init_compile(brw
, &c
->func
);
177 /* temporary sanity check assertion */
178 ASSERT(fp
->isGLSL
== brw_wm_is_glsl(&c
->fp
->program
));
181 * Shader which use GLSL features such as flow control are handled
182 * differently from "simple" shaders.
185 c
->dispatch_width
= 8;
186 brw_wm_glsl_emit(brw
, c
);
189 c
->dispatch_width
= 16;
190 brw_wm_non_glsl_emit(brw
, c
);
193 if (INTEL_DEBUG
& DEBUG_WM
)
194 fprintf(stderr
, "\n");
198 program
= brw_get_program(&c
->func
, &program_size
);
200 dri_bo_unreference(brw
->wm
.prog_bo
);
201 brw
->wm
.prog_bo
= brw_upload_cache_with_auxdata(&brw
->cache
, BRW_WM_PROG
,
202 &c
->key
, sizeof(c
->key
),
204 program
, program_size
,
206 sizeof(c
->prog_data
),
212 static void brw_wm_populate_key( struct brw_context
*brw
,
213 struct brw_wm_prog_key
*key
)
215 GLcontext
*ctx
= &brw
->intel
.ctx
;
216 /* BRW_NEW_FRAGMENT_PROGRAM */
217 const struct brw_fragment_program
*fp
=
218 (struct brw_fragment_program
*)brw
->fragment_program
;
219 GLboolean uses_depth
= (fp
->program
.Base
.InputsRead
& (1 << FRAG_ATTRIB_WPOS
)) != 0;
224 memset(key
, 0, sizeof(*key
));
226 /* Build the index for table lookup
229 if (fp
->program
.UsesKill
||
230 ctx
->Color
.AlphaEnabled
)
231 lookup
|= IZ_PS_KILL_ALPHATEST_BIT
;
233 if (fp
->program
.Base
.OutputsWritten
& BITFIELD64_BIT(FRAG_RESULT_DEPTH
))
234 lookup
|= IZ_PS_COMPUTES_DEPTH_BIT
;
238 lookup
|= IZ_DEPTH_TEST_ENABLE_BIT
;
240 if (ctx
->Depth
.Test
&&
241 ctx
->Depth
.Mask
) /* ?? */
242 lookup
|= IZ_DEPTH_WRITE_ENABLE_BIT
;
245 if (ctx
->Stencil
._Enabled
) {
246 lookup
|= IZ_STENCIL_TEST_ENABLE_BIT
;
248 if (ctx
->Stencil
.WriteMask
[0] ||
249 ctx
->Stencil
.WriteMask
[ctx
->Stencil
._BackFace
])
250 lookup
|= IZ_STENCIL_WRITE_ENABLE_BIT
;
255 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
256 if (ctx
->Line
.SmoothFlag
) {
257 if (brw
->intel
.reduced_primitive
== GL_LINES
) {
260 else if (brw
->intel
.reduced_primitive
== GL_TRIANGLES
) {
261 if (ctx
->Polygon
.FrontMode
== GL_LINE
) {
262 line_aa
= AA_SOMETIMES
;
264 if (ctx
->Polygon
.BackMode
== GL_LINE
||
265 (ctx
->Polygon
.CullFlag
&&
266 ctx
->Polygon
.CullFaceMode
== GL_BACK
))
269 else if (ctx
->Polygon
.BackMode
== GL_LINE
) {
270 line_aa
= AA_SOMETIMES
;
272 if ((ctx
->Polygon
.CullFlag
&&
273 ctx
->Polygon
.CullFaceMode
== GL_FRONT
))
279 brw_wm_lookup_iz(line_aa
,
285 /* BRW_NEW_WM_INPUT_DIMENSIONS */
286 key
->proj_attrib_mask
= brw
->wm
.input_size_masks
[4-1];
289 key
->flat_shade
= (ctx
->Light
.ShadeModel
== GL_FLAT
);
292 key
->linear_color
= (ctx
->Hint
.PerspectiveCorrection
== GL_FASTEST
);
295 for (i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
296 const struct gl_texture_unit
*unit
= &ctx
->Texture
.Unit
[i
];
298 if (unit
->_ReallyEnabled
) {
299 const struct gl_texture_object
*t
= unit
->_Current
;
300 const struct gl_texture_image
*img
= t
->Image
[0][t
->BaseLevel
];
301 if (img
->InternalFormat
== GL_YCBCR_MESA
) {
302 key
->yuvtex_mask
|= 1 << i
;
303 if (img
->TexFormat
== MESA_FORMAT_YCBCR
)
304 key
->yuvtex_swap_mask
|= 1 << i
;
307 key
->tex_swizzles
[i
] = t
->_Swizzle
;
310 key
->tex_swizzles
[i
] = SWIZZLE_NOOP
;
315 key
->shadowtex_mask
= fp
->program
.Base
.ShadowSamplers
;
319 * Include the draw buffer origin and height so that we can calculate
320 * fragment position values relative to the bottom left of the drawable,
321 * from the incoming screen origin relative position we get as part of our
324 * This is only needed for the WM_WPOSXY opcode when the fragment program
325 * uses the gl_FragCoord input.
327 * We could avoid recompiling by including this as a constant referenced by
328 * our program, but if we were to do that it would also be nice to handle
329 * getting that constant updated at batchbuffer submit time (when we
330 * hold the lock and know where the buffer really is) rather than at emit
331 * time when we don't hold the lock and are just guessing. We could also
332 * just avoid using this as key data if the program doesn't use
335 * For DRI2 the origin_x/y will always be (0,0) but we still need the
336 * drawable height in order to invert the Y axis.
338 if (fp
->program
.Base
.InputsRead
& FRAG_BIT_WPOS
) {
339 key
->drawable_height
= ctx
->DrawBuffer
->Height
;
342 key
->nr_color_regions
= brw
->state
.nr_color_regions
;
344 /* CACHE_NEW_VS_PROG */
345 key
->vp_outputs_written
= brw
->vs
.prog_data
->outputs_written
;
347 /* The unique fragment program ID */
348 key
->program_string_id
= fp
->id
;
352 static void brw_prepare_wm_prog(struct brw_context
*brw
)
354 struct brw_wm_prog_key key
;
355 struct brw_fragment_program
*fp
= (struct brw_fragment_program
*)
356 brw
->fragment_program
;
358 brw_wm_populate_key(brw
, &key
);
360 /* Make an early check for the key.
362 dri_bo_unreference(brw
->wm
.prog_bo
);
363 brw
->wm
.prog_bo
= brw_search_cache(&brw
->cache
, BRW_WM_PROG
,
367 if (brw
->wm
.prog_bo
== NULL
)
368 do_wm_prog(brw
, fp
, &key
);
372 const struct brw_tracked_state brw_wm_prog
= {
374 .mesa
= (_NEW_COLOR
|
383 .brw
= (BRW_NEW_FRAGMENT_PROGRAM
|
384 BRW_NEW_WM_INPUT_DIMENSIONS
|
385 BRW_NEW_REDUCED_PRIMITIVE
),
386 .cache
= CACHE_NEW_VS_PROG
,
388 .prepare
= brw_prepare_wm_prog