src/mesa/drivers/dri/i965/brw_wm.c

   1 /*
   2  * Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  * Intel funded Tungsten Graphics to
   4  * develop this 3D driver.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  */
  26 #include "brw_context.h"
  27 #include "brw_wm.h"
  28 #include "brw_state.h"
  29 #include "main/enums.h"
  30 #include "main/formats.h"
  31 #include "main/fbobject.h"
  32 #include "main/samplerobj.h"
  33 #include "main/framebuffer.h"
  34 #include "program/prog_parameter.h"
  35 #include "program/program.h"
  36 #include "intel_mipmap_tree.h"
  37 #include "intel_image.h"
  38 #include "compiler/brw_nir.h"
  39 #include "brw_program.h"
  40
  41 #include "util/ralloc.h"
  42
  43 static void
  44 assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
  45                                 const struct gl_program *prog,
  46                                 const struct brw_wm_prog_key *key,
  47                                 struct brw_wm_prog_data *prog_data)
  48 {
  49    uint32_t next_binding_table_offset = 0;
  50
  51    /* If there are no color regions, we still perform an FB write to a null
  52     * renderbuffer, which we place at surface index 0.
  53     */
  54    prog_data->binding_table.render_target_start = next_binding_table_offset;
  55    next_binding_table_offset += MAX2(key->nr_color_regions, 1);
  56
  57    next_binding_table_offset =
  58       brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base,
  59                                               next_binding_table_offset);
  60
  61    if (prog->nir->info.outputs_read && !key->coherent_fb_fetch) {
  62       prog_data->binding_table.render_target_read_start =
  63          next_binding_table_offset;
  64       next_binding_table_offset += key->nr_color_regions;
  65    }
  66 }
  67
  68 static void
  69 brw_wm_debug_recompile(struct brw_context *brw, struct gl_program *prog,
  70                        const struct brw_wm_prog_key *key)
  71 {
  72    perf_debug("Recompiling fragment shader for program %d\n", prog->Id);
  73
  74    bool found = false;
  75    const struct brw_wm_prog_key *old_key =
  76       brw_find_previous_compile(&brw->cache, BRW_CACHE_FS_PROG,
  77                                 key->program_string_id);
  78
  79    if (!old_key) {
  80       perf_debug("  Didn't find previous compile in the shader cache for debug\n");
  81       return;
  82    }
  83
  84    found |= key_debug(brw, "alphatest, computed depth, depth test, or "
  85                       "depth write",
  86                       old_key->iz_lookup, key->iz_lookup);
  87    found |= key_debug(brw, "depth statistics",
  88                       old_key->stats_wm, key->stats_wm);
  89    found |= key_debug(brw, "flat shading",
  90                       old_key->flat_shade, key->flat_shade);
  91    found |= key_debug(brw, "per-sample interpolation",
  92                       old_key->persample_interp, key->persample_interp);
  93    found |= key_debug(brw, "number of color buffers",
  94                       old_key->nr_color_regions, key->nr_color_regions);
  95    found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
  96                       old_key->replicate_alpha, key->replicate_alpha);
  97    found |= key_debug(brw, "fragment color clamping",
  98                       old_key->clamp_fragment_color, key->clamp_fragment_color);
  99    found |= key_debug(brw, "multisampled FBO",
 100                       old_key->multisample_fbo, key->multisample_fbo);
 101    found |= key_debug(brw, "line smoothing",
 102                       old_key->line_aa, key->line_aa);
 103    found |= key_debug(brw, "input slots valid",
 104                       old_key->input_slots_valid, key->input_slots_valid);
 105    found |= key_debug(brw, "mrt alpha test function",
 106                       old_key->alpha_test_func, key->alpha_test_func);
 107    found |= key_debug(brw, "mrt alpha test reference value",
 108                       old_key->alpha_test_ref, key->alpha_test_ref);
 109    found |= key_debug(brw, "force dual color blending",
 110                       old_key->force_dual_color_blend,
 111                       key->force_dual_color_blend);
 112
 113    found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
 114
 115    if (!found) {
 116       perf_debug("  Something else\n");
 117    }
 118 }
 119
 120 /**
 121  * All Mesa program -> GPU code generation goes through this function.
 122  * Depending on the instructions used (i.e. flow control instructions)
 123  * we'll use one of two code generators.
 124  */
 125 static bool
 126 brw_codegen_wm_prog(struct brw_context *brw,
 127                     struct brw_program *fp,
 128                     struct brw_wm_prog_key *key,
 129                     struct brw_vue_map *vue_map)
 130 {
 131    const struct gen_device_info *devinfo = &brw->screen->devinfo;
 132    struct gl_context *ctx = &brw->ctx;
 133    void *mem_ctx = ralloc_context(NULL);
 134    struct brw_wm_prog_data prog_data;
 135    const GLuint *program;
 136    GLuint program_size;
 137    bool start_busy = false;
 138    double start_time = 0;
 139
 140    memset(&prog_data, 0, sizeof(prog_data));
 141
 142    /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
 143    if (fp->program.is_arb_asm)
 144       prog_data.base.use_alt_mode = true;
 145
 146    assign_fs_binding_table_offsets(devinfo, &fp->program, key, &prog_data);
 147
 148    /* Allocate the references to the uniforms that will end up in the
 149     * prog_data associated with the compiled program, and which will be freed
 150     * by the state cache.
 151     */
 152    int param_count = fp->program.nir->num_uniforms / 4;
 153    prog_data.base.nr_image_params = fp->program.info.num_images;
 154    /* The backend also sometimes adds params for texture size. */
 155    param_count += 2 * ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits;
 156    prog_data.base.param = rzalloc_array(NULL, uint32_t, param_count);
 157    prog_data.base.pull_param = rzalloc_array(NULL, uint32_t, param_count);
 158    prog_data.base.image_param =
 159       rzalloc_array(NULL, struct brw_image_param,
 160                     prog_data.base.nr_image_params);
 161    prog_data.base.nr_params = param_count;
 162
 163    if (!fp->program.is_arb_asm) {
 164       brw_nir_setup_glsl_uniforms(fp->program.nir, &fp->program,
 165                                   &prog_data.base, true);
 166       brw_nir_analyze_ubo_ranges(brw->screen->compiler, fp->program.nir,
 167                                  prog_data.base.ubo_ranges);
 168    } else {
 169       brw_nir_setup_arb_uniforms(fp->program.nir, &fp->program,
 170                                  &prog_data.base);
 171
 172       if (unlikely(INTEL_DEBUG & DEBUG_WM))
 173          brw_dump_arb_asm("fragment", &fp->program);
 174    }
 175
 176    if (unlikely(brw->perf_debug)) {
 177       start_busy = (brw->batch.last_bo &&
 178                     brw_bo_busy(brw->batch.last_bo));
 179       start_time = get_time();
 180    }
 181
 182    int st_index8 = -1, st_index16 = -1;
 183    if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
 184       st_index8 = brw_get_shader_time_index(brw, &fp->program, ST_FS8,
 185                                             !fp->program.is_arb_asm);
 186       st_index16 = brw_get_shader_time_index(brw, &fp->program, ST_FS16,
 187                                              !fp->program.is_arb_asm);
 188    }
 189
 190    char *error_str = NULL;
 191    program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
 192                             key, &prog_data, fp->program.nir,
 193                             &fp->program, st_index8, st_index16,
 194                             true, false, vue_map,
 195                             &program_size, &error_str);
 196
 197    if (program == NULL) {
 198       if (!fp->program.is_arb_asm) {
 199          fp->program.sh.data->LinkStatus = linking_failure;
 200          ralloc_strcat(&fp->program.sh.data->InfoLog, error_str);
 201       }
 202
 203       _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str);
 204
 205       ralloc_free(mem_ctx);
 206       return false;
 207    }
 208
 209    if (unlikely(brw->perf_debug)) {
 210       if (fp->compiled_once)
 211          brw_wm_debug_recompile(brw, &fp->program, key);
 212       fp->compiled_once = true;
 213
 214       if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
 215          perf_debug("FS compile took %.03f ms and stalled the GPU\n",
 216                     (get_time() - start_time) * 1000);
 217       }
 218    }
 219
 220    brw_alloc_stage_scratch(brw, &brw->wm.base,
 221                            prog_data.base.total_scratch,
 222                            devinfo->max_wm_threads);
 223
 224    if (unlikely((INTEL_DEBUG & DEBUG_WM) && fp->program.is_arb_asm))
 225       fprintf(stderr, "\n");
 226
 227    brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
 228                     key, sizeof(struct brw_wm_prog_key),
 229                     program, program_size,
 230                     &prog_data, sizeof(prog_data),
 231                     &brw->wm.base.prog_offset, &brw->wm.base.prog_data);
 232
 233    ralloc_free(mem_ctx);
 234
 235    return true;
 236 }
 237
 238 bool
 239 brw_debug_recompile_sampler_key(struct brw_context *brw,
 240                                 const struct brw_sampler_prog_key_data *old_key,
 241                                 const struct brw_sampler_prog_key_data *key)
 242 {
 243    bool found = false;
 244
 245    for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
 246       found |= key_debug(brw, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
 247                          old_key->swizzles[i], key->swizzles[i]);
 248    }
 249    found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 1st coordinate",
 250                       old_key->gl_clamp_mask[0], key->gl_clamp_mask[0]);
 251    found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
 252                       old_key->gl_clamp_mask[1], key->gl_clamp_mask[1]);
 253    found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
 254                       old_key->gl_clamp_mask[2], key->gl_clamp_mask[2]);
 255    found |= key_debug(brw, "gather channel quirk on any texture unit",
 256                       old_key->gather_channel_quirk_mask, key->gather_channel_quirk_mask);
 257    found |= key_debug(brw, "compressed multisample layout",
 258                       old_key->compressed_multisample_layout_mask,
 259                       key->compressed_multisample_layout_mask);
 260    found |= key_debug(brw, "16x msaa",
 261                       old_key->msaa_16,
 262                       key->msaa_16);
 263
 264    found |= key_debug(brw, "y_uv image bound",
 265                       old_key->y_uv_image_mask,
 266                       key->y_uv_image_mask);
 267    found |= key_debug(brw, "y_u_v image bound",
 268                       old_key->y_u_v_image_mask,
 269                       key->y_u_v_image_mask);
 270    found |= key_debug(brw, "yx_xuxv image bound",
 271                       old_key->yx_xuxv_image_mask,
 272                       key->yx_xuxv_image_mask);
 273    found |= key_debug(brw, "xy_uxvx image bound",
 274                       old_key->xy_uxvx_image_mask,
 275                       key->xy_uxvx_image_mask);
 276
 277
 278    for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
 279       found |= key_debug(brw, "textureGather workarounds",
 280                          old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]);
 281    }
 282
 283    return found;
 284 }
 285
 286 static uint8_t
 287 gen6_gather_workaround(GLenum internalformat)
 288 {
 289    switch (internalformat) {
 290    case GL_R8I: return WA_SIGN | WA_8BIT;
 291    case GL_R8UI: return WA_8BIT;
 292    case GL_R16I: return WA_SIGN | WA_16BIT;
 293    case GL_R16UI: return WA_16BIT;
 294    default:
 295       /* Note that even though GL_R32I and GL_R32UI have format overrides in
 296        * the surface state, there is no shader w/a required.
 297        */
 298       return 0;
 299    }
 300 }
 301
 302 void
 303 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
 304                                    const struct gl_program *prog,
 305                                    struct brw_sampler_prog_key_data *key)
 306 {
 307    struct brw_context *brw = brw_context(ctx);
 308    const struct gen_device_info *devinfo = &brw->screen->devinfo;
 309    GLbitfield mask = prog->SamplersUsed;
 310
 311    while (mask) {
 312       const int s = u_bit_scan(&mask);
 313
 314       key->swizzles[s] = SWIZZLE_NOOP;
 315
 316       int unit_id = prog->SamplerUnits[s];
 317       const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id];
 318
 319       if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) {
 320          const struct gl_texture_object *t = unit->_Current;
 321          const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
 322          struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id);
 323
 324          const bool alpha_depth = t->DepthMode == GL_ALPHA &&
 325             (img->_BaseFormat == GL_DEPTH_COMPONENT ||
 326              img->_BaseFormat == GL_DEPTH_STENCIL);
 327
 328          /* Haswell handles texture swizzling as surface format overrides
 329           * (except for GL_ALPHA); all other platforms need MOVs in the shader.
 330           */
 331          if (alpha_depth || (devinfo->gen < 8 && !devinfo->is_haswell))
 332             key->swizzles[s] = brw_get_texture_swizzle(ctx, t);
 333
 334          if (devinfo->gen < 8 &&
 335              sampler->MinFilter != GL_NEAREST &&
 336              sampler->MagFilter != GL_NEAREST) {
 337             if (sampler->WrapS == GL_CLAMP)
 338                key->gl_clamp_mask[0] |= 1 << s;
 339             if (sampler->WrapT == GL_CLAMP)
 340                key->gl_clamp_mask[1] |= 1 << s;
 341             if (sampler->WrapR == GL_CLAMP)
 342                key->gl_clamp_mask[2] |= 1 << s;
 343          }
 344
 345          /* gather4 for RG32* is broken in multiple ways on Gen7. */
 346          if (devinfo->gen == 7 && prog->nir->info.uses_texture_gather) {
 347             switch (img->InternalFormat) {
 348             case GL_RG32I:
 349             case GL_RG32UI: {
 350                /* We have to override the format to R32G32_FLOAT_LD.
 351                 * This means that SCS_ALPHA and SCS_ONE will return 0x3f8
 352                 * (1.0) rather than integer 1.  This needs shader hacks.
 353                 *
 354                 * On Ivybridge, we whack W (alpha) to ONE in our key's
 355                 * swizzle.  On Haswell, we look at the original texture
 356                 * swizzle, and use XYZW with channels overridden to ONE,
 357                 * leaving normal texture swizzling to SCS.
 358                 */
 359                unsigned src_swizzle =
 360                   devinfo->is_haswell ? t->_Swizzle : key->swizzles[s];
 361                for (int i = 0; i < 4; i++) {
 362                   unsigned src_comp = GET_SWZ(src_swizzle, i);
 363                   if (src_comp == SWIZZLE_ONE || src_comp == SWIZZLE_W) {
 364                      key->swizzles[i] &= ~(0x7 << (3 * i));
 365                      key->swizzles[i] |= SWIZZLE_ONE << (3 * i);
 366                   }
 367                }
 368                /* fallthrough */
 369             }
 370             case GL_RG32F:
 371                /* The channel select for green doesn't work - we have to
 372                 * request blue.  Haswell can use SCS for this, but Ivybridge
 373                 * needs a shader workaround.
 374                 */
 375                if (!devinfo->is_haswell)
 376                   key->gather_channel_quirk_mask |= 1 << s;
 377                break;
 378             }
 379          }
 380
 381          /* Gen6's gather4 is broken for UINT/SINT; we treat them as
 382           * UNORM/FLOAT instead and fix it in the shader.
 383           */
 384          if (devinfo->gen == 6 && prog->nir->info.uses_texture_gather) {
 385             key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
 386          }
 387
 388          /* If this is a multisample sampler, and uses the CMS MSAA layout,
 389           * then we need to emit slightly different code to first sample the
 390           * MCS surface.
 391           */
 392          struct intel_texture_object *intel_tex =
 393             intel_texture_object((struct gl_texture_object *)t);
 394
 395          /* From gen9 onwards some single sampled buffers can also be
 396           * compressed. These don't need ld2dms sampling along with mcs fetch.
 397           */
 398          if (intel_tex->mt->aux_usage == ISL_AUX_USAGE_MCS) {
 399             assert(devinfo->gen >= 7);
 400             assert(intel_tex->mt->surf.samples > 1);
 401             assert(intel_tex->mt->mcs_buf);
 402             assert(intel_tex->mt->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY);
 403             key->compressed_multisample_layout_mask |= 1 << s;
 404
 405             if (intel_tex->mt->surf.samples >= 16) {
 406                assert(devinfo->gen >= 9);
 407                key->msaa_16 |= 1 << s;
 408             }
 409          }
 410
 411          if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) {
 412             switch (intel_tex->planar_format->components) {
 413             case __DRI_IMAGE_COMPONENTS_Y_UV:
 414                key->y_uv_image_mask |= 1 << s;
 415                break;
 416             case __DRI_IMAGE_COMPONENTS_Y_U_V:
 417                key->y_u_v_image_mask |= 1 << s;
 418                break;
 419             case __DRI_IMAGE_COMPONENTS_Y_XUXV:
 420                key->yx_xuxv_image_mask |= 1 << s;
 421                break;
 422             case __DRI_IMAGE_COMPONENTS_Y_UXVX:
 423                key->xy_uxvx_image_mask |= 1 << s;
 424                break;
 425             default:
 426                break;
 427             }
 428          }
 429
 430       }
 431    }
 432 }
 433
 434 static bool
 435 brw_wm_state_dirty(const struct brw_context *brw)
 436 {
 437    return brw_state_dirty(brw,
 438                           _NEW_BUFFERS |
 439                           _NEW_COLOR |
 440                           _NEW_DEPTH |
 441                           _NEW_FRAG_CLAMP |
 442                           _NEW_HINT |
 443                           _NEW_LIGHT |
 444                           _NEW_LINE |
 445                           _NEW_MULTISAMPLE |
 446                           _NEW_POLYGON |
 447                           _NEW_STENCIL |
 448                           _NEW_TEXTURE,
 449                           BRW_NEW_FRAGMENT_PROGRAM |
 450                           BRW_NEW_REDUCED_PRIMITIVE |
 451                           BRW_NEW_STATS_WM |
 452                           BRW_NEW_VUE_MAP_GEOM_OUT);
 453 }
 454
 455 void
 456 brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
 457 {
 458    const struct gen_device_info *devinfo = &brw->screen->devinfo;
 459    struct gl_context *ctx = &brw->ctx;
 460    /* BRW_NEW_FRAGMENT_PROGRAM */
 461    const struct gl_program *prog = brw->programs[MESA_SHADER_FRAGMENT];
 462    const struct brw_program *fp = brw_program_const(prog);
 463    GLuint lookup = 0;
 464    GLuint line_aa;
 465
 466    memset(key, 0, sizeof(*key));
 467
 468    /* Build the index for table lookup
 469     */
 470    if (devinfo->gen < 6) {
 471       /* _NEW_COLOR */
 472       if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) {
 473          lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
 474       }
 475
 476       if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
 477          lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
 478       }
 479
 480       /* _NEW_DEPTH */
 481       if (ctx->Depth.Test)
 482          lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
 483
 484       if (brw_depth_writes_enabled(brw))
 485          lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
 486
 487       /* _NEW_STENCIL | _NEW_BUFFERS */
 488       if (brw->stencil_enabled) {
 489          lookup |= BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT;
 490
 491          if (ctx->Stencil.WriteMask[0] ||
 492              ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
 493             lookup |= BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT;
 494       }
 495       key->iz_lookup = lookup;
 496    }
 497
 498    line_aa = BRW_WM_AA_NEVER;
 499
 500    /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
 501    if (ctx->Line.SmoothFlag) {
 502       if (brw->reduced_primitive == GL_LINES) {
 503          line_aa = BRW_WM_AA_ALWAYS;
 504       }
 505       else if (brw->reduced_primitive == GL_TRIANGLES) {
 506          if (ctx->Polygon.FrontMode == GL_LINE) {
 507             line_aa = BRW_WM_AA_SOMETIMES;
 508
 509             if (ctx->Polygon.BackMode == GL_LINE ||
 510                 (ctx->Polygon.CullFlag &&
 511                  ctx->Polygon.CullFaceMode == GL_BACK))
 512                line_aa = BRW_WM_AA_ALWAYS;
 513          }
 514          else if (ctx->Polygon.BackMode == GL_LINE) {
 515             line_aa = BRW_WM_AA_SOMETIMES;
 516
 517             if ((ctx->Polygon.CullFlag &&
 518                  ctx->Polygon.CullFaceMode == GL_FRONT))
 519                line_aa = BRW_WM_AA_ALWAYS;
 520          }
 521       }
 522    }
 523
 524    key->line_aa = line_aa;
 525
 526    /* _NEW_HINT */
 527    key->high_quality_derivatives =
 528       ctx->Hint.FragmentShaderDerivative == GL_NICEST;
 529
 530    if (devinfo->gen < 6)
 531       key->stats_wm = brw->stats_wm;
 532
 533    /* _NEW_LIGHT */
 534    key->flat_shade =
 535       (prog->info.inputs_read & (VARYING_BIT_COL0 | VARYING_BIT_COL1)) &&
 536       (ctx->Light.ShadeModel == GL_FLAT);
 537
 538    /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
 539    key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
 540
 541    /* _NEW_TEXTURE */
 542    brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
 543
 544    /* _NEW_BUFFERS */
 545    key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
 546
 547    /* _NEW_COLOR */
 548    key->force_dual_color_blend = brw->dual_color_blend_by_location &&
 549       (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
 550
 551    /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
 552    key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
 553       (_mesa_is_alpha_test_enabled(ctx) ||
 554        _mesa_is_alpha_to_coverage_enabled(ctx));
 555
 556    /* _NEW_BUFFERS _NEW_MULTISAMPLE */
 557    /* Ignore sample qualifier while computing this flag. */
 558    if (ctx->Multisample.Enabled) {
 559       key->persample_interp =
 560          ctx->Multisample.SampleShading &&
 561          (ctx->Multisample.MinSampleShadingValue *
 562           _mesa_geometric_samples(ctx->DrawBuffer) > 1);
 563
 564       key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
 565    }
 566
 567    /* BRW_NEW_VUE_MAP_GEOM_OUT */
 568    if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
 569                                              BRW_FS_VARYING_INPUT_MASK) > 16) {
 570       key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
 571    }
 572
 573    /* _NEW_COLOR | _NEW_BUFFERS */
 574    /* Pre-gen6, the hardware alpha test always used each render
 575     * target's alpha to do alpha test, as opposed to render target 0's alpha
 576     * like GL requires.  Fix that by building the alpha test into the
 577     * shader, and we'll skip enabling the fixed function alpha test.
 578     */
 579    if (devinfo->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
 580        ctx->Color.AlphaEnabled) {
 581       key->alpha_test_func = ctx->Color.AlphaFunc;
 582       key->alpha_test_ref = ctx->Color.AlphaRef;
 583    }
 584
 585    /* The unique fragment program ID */
 586    key->program_string_id = fp->id;
 587
 588    /* Whether reads from the framebuffer should behave coherently. */
 589    key->coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
 590 }
 591
 592 void
 593 brw_upload_wm_prog(struct brw_context *brw)
 594 {
 595    struct brw_wm_prog_key key;
 596    struct brw_program *fp =
 597       (struct brw_program *) brw->programs[MESA_SHADER_FRAGMENT];
 598
 599    if (!brw_wm_state_dirty(brw))
 600       return;
 601
 602    brw_wm_populate_key(brw, &key);
 603
 604    if (!brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
 605                          &key, sizeof(key),
 606                          &brw->wm.base.prog_offset,
 607                          &brw->wm.base.prog_data)) {
 608       bool success = brw_codegen_wm_prog(brw, fp, &key,
 609                                          &brw->vue_map_geom_out);
 610       (void) success;
 611       assert(success);
 612    }
 613 }
 614
 615 bool
 616 brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
 617 {
 618    struct brw_context *brw = brw_context(ctx);
 619    const struct gen_device_info *devinfo = &brw->screen->devinfo;
 620    struct brw_wm_prog_key key;
 621
 622    struct brw_program *bfp = brw_program(prog);
 623
 624    memset(&key, 0, sizeof(key));
 625
 626    uint64_t outputs_written = prog->info.outputs_written;
 627
 628    if (devinfo->gen < 6) {
 629       if (prog->info.fs.uses_discard)
 630          key.iz_lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
 631
 632       if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
 633          key.iz_lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
 634
 635       /* Just assume depth testing. */
 636       key.iz_lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
 637       key.iz_lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
 638    }
 639
 640    if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
 641                                              BRW_FS_VARYING_INPUT_MASK) > 16) {
 642       key.input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
 643    }
 644
 645    brw_setup_tex_for_precompile(brw, &key.tex, prog);
 646
 647    key.nr_color_regions = _mesa_bitcount_64(outputs_written &
 648          ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
 649            BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
 650            BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
 651
 652    key.program_string_id = bfp->id;
 653
 654    /* Whether reads from the framebuffer should behave coherently. */
 655    key.coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
 656
 657    uint32_t old_prog_offset = brw->wm.base.prog_offset;
 658    struct brw_stage_prog_data *old_prog_data = brw->wm.base.prog_data;
 659
 660    struct brw_vue_map vue_map;
 661    if (devinfo->gen < 6) {
 662       brw_compute_vue_map(&brw->screen->devinfo, &vue_map,
 663                           prog->info.inputs_read | VARYING_BIT_POS,
 664                           false);
 665    }
 666
 667    bool success = brw_codegen_wm_prog(brw, bfp, &key, &vue_map);
 668
 669    brw->wm.base.prog_offset = old_prog_offset;
 670    brw->wm.base.prog_data = old_prog_data;
 671
 672    return success;
 673 }