f433ed6f4da3e7324ce273ad1970d7a2cbb4c0eb
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 * Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 * Intel funded Tungsten Graphics to
4 * develop this 3D driver.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26 #include "brw_context.h"
27 #include "brw_wm.h"
28 #include "brw_state.h"
29 #include "brw_shader.h"
30 #include "main/enums.h"
31 #include "main/formats.h"
32 #include "main/fbobject.h"
33 #include "main/samplerobj.h"
34 #include "main/framebuffer.h"
35 #include "program/prog_parameter.h"
36 #include "program/program.h"
37 #include "intel_mipmap_tree.h"
38 #include "intel_image.h"
39 #include "brw_nir.h"
40 #include "brw_program.h"
41
42 #include "util/ralloc.h"
43
44 static void
45 assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
46 const struct gl_shader_program *shader_prog,
47 const struct gl_program *prog,
48 const struct brw_wm_prog_key *key,
49 struct brw_wm_prog_data *prog_data)
50 {
51 uint32_t next_binding_table_offset = 0;
52
53 /* If there are no color regions, we still perform an FB write to a null
54 * renderbuffer, which we place at surface index 0.
55 */
56 prog_data->binding_table.render_target_start = next_binding_table_offset;
57 next_binding_table_offset += MAX2(key->nr_color_regions, 1);
58
59 next_binding_table_offset =
60 brw_assign_common_binding_table_offsets(MESA_SHADER_FRAGMENT, devinfo,
61 shader_prog, prog, &prog_data->base,
62 next_binding_table_offset);
63
64 if (prog->nir->info->outputs_read && !key->coherent_fb_fetch) {
65 prog_data->binding_table.render_target_read_start =
66 next_binding_table_offset;
67 next_binding_table_offset += key->nr_color_regions;
68 }
69 }
70
71 /**
72 * All Mesa program -> GPU code generation goes through this function.
73 * Depending on the instructions used (i.e. flow control instructions)
74 * we'll use one of two code generators.
75 */
76 bool
77 brw_codegen_wm_prog(struct brw_context *brw,
78 struct gl_shader_program *prog,
79 struct brw_program *fp,
80 struct brw_wm_prog_key *key,
81 struct brw_vue_map *vue_map)
82 {
83 const struct gen_device_info *devinfo = &brw->screen->devinfo;
84 struct gl_context *ctx = &brw->ctx;
85 void *mem_ctx = ralloc_context(NULL);
86 struct brw_wm_prog_data prog_data;
87 const GLuint *program;
88 struct brw_shader *fs = NULL;
89 GLuint program_size;
90 bool start_busy = false;
91 double start_time = 0;
92
93 if (prog)
94 fs = (struct brw_shader *)prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
95
96 memset(&prog_data, 0, sizeof(prog_data));
97
98 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
99 if (!prog)
100 prog_data.base.use_alt_mode = true;
101
102 assign_fs_binding_table_offsets(devinfo, prog, &fp->program, key,
103 &prog_data);
104
105 /* Allocate the references to the uniforms that will end up in the
106 * prog_data associated with the compiled program, and which will be freed
107 * by the state cache.
108 */
109 int param_count = fp->program.nir->num_uniforms / 4;
110 if (fs)
111 prog_data.base.nr_image_params = fs->base.NumImages;
112 /* The backend also sometimes adds params for texture size. */
113 param_count += 2 * ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits;
114 prog_data.base.param =
115 rzalloc_array(NULL, const gl_constant_value *, param_count);
116 prog_data.base.pull_param =
117 rzalloc_array(NULL, const gl_constant_value *, param_count);
118 prog_data.base.image_param =
119 rzalloc_array(NULL, struct brw_image_param,
120 prog_data.base.nr_image_params);
121 prog_data.base.nr_params = param_count;
122
123 if (prog) {
124 brw_nir_setup_glsl_uniforms(fp->program.nir, prog, &fp->program,
125 &prog_data.base, true);
126 } else {
127 brw_nir_setup_arb_uniforms(fp->program.nir, &fp->program,
128 &prog_data.base);
129 }
130
131 if (unlikely(brw->perf_debug)) {
132 start_busy = (brw->batch.last_bo &&
133 drm_intel_bo_busy(brw->batch.last_bo));
134 start_time = get_time();
135 }
136
137 if (unlikely(INTEL_DEBUG & DEBUG_WM))
138 brw_dump_ir("fragment", prog, fs ? &fs->base : NULL, &fp->program);
139
140 int st_index8 = -1, st_index16 = -1;
141 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
142 st_index8 = brw_get_shader_time_index(brw, prog, &fp->program, ST_FS8);
143 st_index16 = brw_get_shader_time_index(brw, prog, &fp->program, ST_FS16);
144 }
145
146 char *error_str = NULL;
147 program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
148 key, &prog_data, fp->program.nir,
149 &fp->program, st_index8, st_index16,
150 true, brw->use_rep_send, vue_map,
151 &program_size, &error_str);
152
153 if (program == NULL) {
154 if (prog) {
155 prog->LinkStatus = false;
156 ralloc_strcat(&prog->InfoLog, error_str);
157 }
158
159 _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str);
160
161 ralloc_free(mem_ctx);
162 return false;
163 }
164
165 if (unlikely(brw->perf_debug) && fs) {
166 if (fs->compiled_once)
167 brw_wm_debug_recompile(brw, prog, key);
168 fs->compiled_once = true;
169
170 if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
171 perf_debug("FS compile took %.03f ms and stalled the GPU\n",
172 (get_time() - start_time) * 1000);
173 }
174 }
175
176 brw_alloc_stage_scratch(brw, &brw->wm.base,
177 prog_data.base.total_scratch,
178 devinfo->max_wm_threads);
179
180 if (unlikely(INTEL_DEBUG & DEBUG_WM))
181 fprintf(stderr, "\n");
182
183 brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
184 key, sizeof(struct brw_wm_prog_key),
185 program, program_size,
186 &prog_data, sizeof(prog_data),
187 &brw->wm.base.prog_offset, &brw->wm.base.prog_data);
188
189 ralloc_free(mem_ctx);
190
191 return true;
192 }
193
194 bool
195 brw_debug_recompile_sampler_key(struct brw_context *brw,
196 const struct brw_sampler_prog_key_data *old_key,
197 const struct brw_sampler_prog_key_data *key)
198 {
199 bool found = false;
200
201 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
202 found |= key_debug(brw, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
203 old_key->swizzles[i], key->swizzles[i]);
204 }
205 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 1st coordinate",
206 old_key->gl_clamp_mask[0], key->gl_clamp_mask[0]);
207 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
208 old_key->gl_clamp_mask[1], key->gl_clamp_mask[1]);
209 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
210 old_key->gl_clamp_mask[2], key->gl_clamp_mask[2]);
211 found |= key_debug(brw, "gather channel quirk on any texture unit",
212 old_key->gather_channel_quirk_mask, key->gather_channel_quirk_mask);
213 found |= key_debug(brw, "compressed multisample layout",
214 old_key->compressed_multisample_layout_mask,
215 key->compressed_multisample_layout_mask);
216 found |= key_debug(brw, "16x msaa",
217 old_key->msaa_16,
218 key->msaa_16);
219
220 found |= key_debug(brw, "y_uv image bound",
221 old_key->y_uv_image_mask,
222 key->y_uv_image_mask);
223 found |= key_debug(brw, "y_u_v image bound",
224 old_key->y_u_v_image_mask,
225 key->y_u_v_image_mask);
226 found |= key_debug(brw, "yx_xuxv image bound",
227 old_key->yx_xuxv_image_mask,
228 key->yx_xuxv_image_mask);
229
230 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
231 found |= key_debug(brw, "textureGather workarounds",
232 old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]);
233 }
234
235 return found;
236 }
237
238 void
239 brw_wm_debug_recompile(struct brw_context *brw,
240 struct gl_shader_program *prog,
241 const struct brw_wm_prog_key *key)
242 {
243 struct brw_cache_item *c = NULL;
244 const struct brw_wm_prog_key *old_key = NULL;
245 bool found = false;
246
247 perf_debug("Recompiling fragment shader for program %d\n", prog->Name);
248
249 for (unsigned int i = 0; i < brw->cache.size; i++) {
250 for (c = brw->cache.items[i]; c; c = c->next) {
251 if (c->cache_id == BRW_CACHE_FS_PROG) {
252 old_key = c->key;
253
254 if (old_key->program_string_id == key->program_string_id)
255 break;
256 }
257 }
258 if (c)
259 break;
260 }
261
262 if (!c) {
263 perf_debug(" Didn't find previous compile in the shader cache for debug\n");
264 return;
265 }
266
267 found |= key_debug(brw, "alphatest, computed depth, depth test, or "
268 "depth write",
269 old_key->iz_lookup, key->iz_lookup);
270 found |= key_debug(brw, "depth statistics",
271 old_key->stats_wm, key->stats_wm);
272 found |= key_debug(brw, "flat shading",
273 old_key->flat_shade, key->flat_shade);
274 found |= key_debug(brw, "per-sample interpolation",
275 old_key->persample_interp, key->persample_interp);
276 found |= key_debug(brw, "number of color buffers",
277 old_key->nr_color_regions, key->nr_color_regions);
278 found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
279 old_key->replicate_alpha, key->replicate_alpha);
280 found |= key_debug(brw, "fragment color clamping",
281 old_key->clamp_fragment_color, key->clamp_fragment_color);
282 found |= key_debug(brw, "multisampled FBO",
283 old_key->multisample_fbo, key->multisample_fbo);
284 found |= key_debug(brw, "line smoothing",
285 old_key->line_aa, key->line_aa);
286 found |= key_debug(brw, "input slots valid",
287 old_key->input_slots_valid, key->input_slots_valid);
288 found |= key_debug(brw, "mrt alpha test function",
289 old_key->alpha_test_func, key->alpha_test_func);
290 found |= key_debug(brw, "mrt alpha test reference value",
291 old_key->alpha_test_ref, key->alpha_test_ref);
292
293 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
294
295 if (!found) {
296 perf_debug(" Something else\n");
297 }
298 }
299
300 static uint8_t
301 gen6_gather_workaround(GLenum internalformat)
302 {
303 switch (internalformat) {
304 case GL_R8I: return WA_SIGN | WA_8BIT;
305 case GL_R8UI: return WA_8BIT;
306 case GL_R16I: return WA_SIGN | WA_16BIT;
307 case GL_R16UI: return WA_16BIT;
308 default:
309 /* Note that even though GL_R32I and GL_R32UI have format overrides in
310 * the surface state, there is no shader w/a required.
311 */
312 return 0;
313 }
314 }
315
316 void
317 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
318 const struct gl_program *prog,
319 struct brw_sampler_prog_key_data *key)
320 {
321 struct brw_context *brw = brw_context(ctx);
322 GLbitfield mask = prog->SamplersUsed;
323
324 while (mask) {
325 const int s = u_bit_scan(&mask);
326
327 key->swizzles[s] = SWIZZLE_NOOP;
328
329 int unit_id = prog->SamplerUnits[s];
330 const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id];
331
332 if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) {
333 const struct gl_texture_object *t = unit->_Current;
334 const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
335 struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id);
336
337 const bool alpha_depth = t->DepthMode == GL_ALPHA &&
338 (img->_BaseFormat == GL_DEPTH_COMPONENT ||
339 img->_BaseFormat == GL_DEPTH_STENCIL);
340
341 /* Haswell handles texture swizzling as surface format overrides
342 * (except for GL_ALPHA); all other platforms need MOVs in the shader.
343 */
344 if (alpha_depth || (brw->gen < 8 && !brw->is_haswell))
345 key->swizzles[s] = brw_get_texture_swizzle(ctx, t);
346
347 if (brw->gen < 8 &&
348 sampler->MinFilter != GL_NEAREST &&
349 sampler->MagFilter != GL_NEAREST) {
350 if (sampler->WrapS == GL_CLAMP)
351 key->gl_clamp_mask[0] |= 1 << s;
352 if (sampler->WrapT == GL_CLAMP)
353 key->gl_clamp_mask[1] |= 1 << s;
354 if (sampler->WrapR == GL_CLAMP)
355 key->gl_clamp_mask[2] |= 1 << s;
356 }
357
358 /* gather4's channel select for green from RG32F is broken; requires
359 * a shader w/a on IVB; fixable with just SCS on HSW.
360 */
361 if (brw->gen == 7 && !brw->is_haswell &&
362 prog->nir->info->uses_texture_gather) {
363 if (img->InternalFormat == GL_RG32F)
364 key->gather_channel_quirk_mask |= 1 << s;
365 }
366
367 /* Gen6's gather4 is broken for UINT/SINT; we treat them as
368 * UNORM/FLOAT instead and fix it in the shader.
369 */
370 if (brw->gen == 6 && prog->nir->info->uses_texture_gather) {
371 key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
372 }
373
374 /* If this is a multisample sampler, and uses the CMS MSAA layout,
375 * then we need to emit slightly different code to first sample the
376 * MCS surface.
377 */
378 struct intel_texture_object *intel_tex =
379 intel_texture_object((struct gl_texture_object *)t);
380
381 /* From gen9 onwards some single sampled buffers can also be
382 * compressed. These don't need ld2dms sampling along with mcs fetch.
383 */
384 if (brw->gen >= 7 &&
385 intel_tex->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS &&
386 intel_tex->mt->num_samples > 1) {
387 key->compressed_multisample_layout_mask |= 1 << s;
388
389 if (intel_tex->mt->num_samples >= 16) {
390 assert(brw->gen >= 9);
391 key->msaa_16 |= 1 << s;
392 }
393 }
394
395 if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) {
396 switch (intel_tex->planar_format->components) {
397 case __DRI_IMAGE_COMPONENTS_Y_UV:
398 key->y_uv_image_mask |= 1 << s;
399 break;
400 case __DRI_IMAGE_COMPONENTS_Y_U_V:
401 key->y_u_v_image_mask |= 1 << s;
402 break;
403 case __DRI_IMAGE_COMPONENTS_Y_XUXV:
404 key->yx_xuxv_image_mask |= 1 << s;
405 break;
406 default:
407 break;
408 }
409 }
410
411 }
412 }
413 }
414
415 static bool
416 brw_wm_state_dirty(const struct brw_context *brw)
417 {
418 return brw_state_dirty(brw,
419 _NEW_BUFFERS |
420 _NEW_COLOR |
421 _NEW_DEPTH |
422 _NEW_FRAG_CLAMP |
423 _NEW_HINT |
424 _NEW_LIGHT |
425 _NEW_LINE |
426 _NEW_MULTISAMPLE |
427 _NEW_POLYGON |
428 _NEW_STENCIL |
429 _NEW_TEXTURE,
430 BRW_NEW_FRAGMENT_PROGRAM |
431 BRW_NEW_REDUCED_PRIMITIVE |
432 BRW_NEW_STATS_WM |
433 BRW_NEW_VUE_MAP_GEOM_OUT);
434 }
435
436 void
437 brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
438 {
439 struct gl_context *ctx = &brw->ctx;
440 /* BRW_NEW_FRAGMENT_PROGRAM */
441 const struct brw_program *fp = brw_program_const(brw->fragment_program);
442 const struct gl_program *prog = (struct gl_program *) brw->fragment_program;
443 GLuint lookup = 0;
444 GLuint line_aa;
445
446 memset(key, 0, sizeof(*key));
447
448 /* Build the index for table lookup
449 */
450 if (brw->gen < 6) {
451 /* _NEW_COLOR */
452 if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) {
453 lookup |= IZ_PS_KILL_ALPHATEST_BIT;
454 }
455
456 if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
457 lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
458 }
459
460 /* _NEW_DEPTH */
461 if (ctx->Depth.Test)
462 lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
463
464 if (ctx->Depth.Test && ctx->Depth.Mask) /* ?? */
465 lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
466
467 /* _NEW_STENCIL | _NEW_BUFFERS */
468 if (ctx->Stencil._Enabled) {
469 lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
470
471 if (ctx->Stencil.WriteMask[0] ||
472 ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
473 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
474 }
475 key->iz_lookup = lookup;
476 }
477
478 line_aa = AA_NEVER;
479
480 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
481 if (ctx->Line.SmoothFlag) {
482 if (brw->reduced_primitive == GL_LINES) {
483 line_aa = AA_ALWAYS;
484 }
485 else if (brw->reduced_primitive == GL_TRIANGLES) {
486 if (ctx->Polygon.FrontMode == GL_LINE) {
487 line_aa = AA_SOMETIMES;
488
489 if (ctx->Polygon.BackMode == GL_LINE ||
490 (ctx->Polygon.CullFlag &&
491 ctx->Polygon.CullFaceMode == GL_BACK))
492 line_aa = AA_ALWAYS;
493 }
494 else if (ctx->Polygon.BackMode == GL_LINE) {
495 line_aa = AA_SOMETIMES;
496
497 if ((ctx->Polygon.CullFlag &&
498 ctx->Polygon.CullFaceMode == GL_FRONT))
499 line_aa = AA_ALWAYS;
500 }
501 }
502 }
503
504 key->line_aa = line_aa;
505
506 /* _NEW_HINT */
507 key->high_quality_derivatives =
508 ctx->Hint.FragmentShaderDerivative == GL_NICEST;
509
510 if (brw->gen < 6)
511 key->stats_wm = brw->stats_wm;
512
513 /* _NEW_LIGHT */
514 key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
515
516 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
517 key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
518
519 /* _NEW_TEXTURE */
520 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
521
522 /* _NEW_BUFFERS */
523 key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
524
525 /* _NEW_COLOR */
526 key->force_dual_color_blend = brw->dual_color_blend_by_location &&
527 (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
528
529 /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
530 key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
531 (ctx->Multisample.SampleAlphaToCoverage || ctx->Color.AlphaEnabled);
532
533 /* _NEW_BUFFERS _NEW_MULTISAMPLE */
534 /* Ignore sample qualifier while computing this flag. */
535 if (ctx->Multisample.Enabled) {
536 key->persample_interp =
537 ctx->Multisample.SampleShading &&
538 (ctx->Multisample.MinSampleShadingValue *
539 _mesa_geometric_samples(ctx->DrawBuffer) > 1);
540
541 key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
542 }
543
544 /* BRW_NEW_VUE_MAP_GEOM_OUT */
545 if (brw->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
546 BRW_FS_VARYING_INPUT_MASK) > 16) {
547 key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
548 }
549
550
551 /* _NEW_COLOR | _NEW_BUFFERS */
552 /* Pre-gen6, the hardware alpha test always used each render
553 * target's alpha to do alpha test, as opposed to render target 0's alpha
554 * like GL requires. Fix that by building the alpha test into the
555 * shader, and we'll skip enabling the fixed function alpha test.
556 */
557 if (brw->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
558 ctx->Color.AlphaEnabled) {
559 key->alpha_test_func = ctx->Color.AlphaFunc;
560 key->alpha_test_ref = ctx->Color.AlphaRef;
561 }
562
563 /* The unique fragment program ID */
564 key->program_string_id = fp->id;
565
566 /* Whether reads from the framebuffer should behave coherently. */
567 key->coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
568 }
569
570 void
571 brw_upload_wm_prog(struct brw_context *brw)
572 {
573 struct gl_context *ctx = &brw->ctx;
574 struct gl_shader_program *current = ctx->_Shader->_CurrentFragmentProgram;
575 struct brw_wm_prog_key key;
576 struct brw_program *fp = (struct brw_program *) brw->fragment_program;
577
578 if (!brw_wm_state_dirty(brw))
579 return;
580
581 brw_wm_populate_key(brw, &key);
582
583 if (!brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
584 &key, sizeof(key),
585 &brw->wm.base.prog_offset,
586 &brw->wm.base.prog_data)) {
587 bool success = brw_codegen_wm_prog(brw, current, fp, &key,
588 &brw->vue_map_geom_out);
589 (void) success;
590 assert(success);
591 }
592 }
593
594 bool
595 brw_fs_precompile(struct gl_context *ctx,
596 struct gl_shader_program *shader_prog,
597 struct gl_program *prog)
598 {
599 struct brw_context *brw = brw_context(ctx);
600 struct brw_wm_prog_key key;
601
602 struct brw_program *bfp = brw_program(prog);
603
604 memset(&key, 0, sizeof(key));
605
606 uint64_t outputs_written = prog->info.outputs_written;
607
608 if (brw->gen < 6) {
609 if (prog->info.fs.uses_discard)
610 key.iz_lookup |= IZ_PS_KILL_ALPHATEST_BIT;
611
612 if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
613 key.iz_lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
614
615 /* Just assume depth testing. */
616 key.iz_lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
617 key.iz_lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
618 }
619
620 if (brw->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
621 BRW_FS_VARYING_INPUT_MASK) > 16) {
622 key.input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
623 }
624
625 brw_setup_tex_for_precompile(brw, &key.tex, prog);
626
627 key.nr_color_regions = _mesa_bitcount_64(outputs_written &
628 ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
629 BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
630 BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
631
632 key.program_string_id = bfp->id;
633
634 /* Whether reads from the framebuffer should behave coherently. */
635 key.coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
636
637 uint32_t old_prog_offset = brw->wm.base.prog_offset;
638 struct brw_stage_prog_data *old_prog_data = brw->wm.base.prog_data;
639
640 struct brw_vue_map vue_map;
641 if (brw->gen < 6) {
642 brw_compute_vue_map(&brw->screen->devinfo, &vue_map,
643 prog->info.inputs_read | VARYING_BIT_POS,
644 false);
645 }
646
647 bool success = brw_codegen_wm_prog(brw, shader_prog, bfp, &key, &vue_map);
648
649 brw->wm.base.prog_offset = old_prog_offset;
650 brw->wm.base.prog_data = old_prog_data;
651
652 return success;
653 }