src/mesa/drivers/dri/i965/brw_wm.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "brw_context.h"
  33 #include "brw_wm.h"
  34 #include "brw_state.h"
  35 #include "main/formats.h"
  36 #include "main/samplerobj.h"
  37
  38 /** Return number of src args for given instruction */
  39 GLuint brw_wm_nr_args( GLuint opcode )
  40 {
  41    switch (opcode) {
  42    case WM_FRONTFACING:
  43    case WM_PIXELXY:
  44       return 0;
  45    case WM_CINTERP:
  46    case WM_WPOSXY:
  47    case WM_DELTAXY:
  48       return 1;
  49    case WM_LINTERP:
  50    case WM_PIXELW:
  51       return 2;
  52    case WM_FB_WRITE:
  53    case WM_PINTERP:
  54       return 3;
  55    default:
  56       assert(opcode < MAX_OPCODE);
  57       return _mesa_num_inst_src_regs(opcode);
  58    }
  59 }
  60
  61
  62 GLuint brw_wm_is_scalar_result( GLuint opcode )
  63 {
  64    switch (opcode) {
  65    case OPCODE_COS:
  66    case OPCODE_EX2:
  67    case OPCODE_LG2:
  68    case OPCODE_POW:
  69    case OPCODE_RCP:
  70    case OPCODE_RSQ:
  71    case OPCODE_SIN:
  72    case OPCODE_DP2:
  73    case OPCODE_DP3:
  74    case OPCODE_DP4:
  75    case OPCODE_DPH:
  76    case OPCODE_DST:
  77       return 1;
  78
  79    default:
  80       return 0;
  81    }
  82 }
  83
  84
  85 /**
  86  * Do GPU code generation for non-GLSL shader.  non-GLSL shaders have
  87  * no flow control instructions so we can more readily do SSA-style
  88  * optimizations.
  89  */
  90 static void
  91 brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
  92 {
  93    /* Augment fragment program.  Add instructions for pre- and
  94     * post-fragment-program tasks such as interpolation and fogging.
  95     */
  96    brw_wm_pass_fp(c);
  97
  98    /* Translate to intermediate representation.  Build register usage
  99     * chains.
 100     */
 101    brw_wm_pass0(c);
 102
 103    /* Dead code removal.
 104     */
 105    brw_wm_pass1(c);
 106
 107    /* Register allocation.
 108     * Divide by two because we operate on 16 pixels at a time and require
 109     * two GRF entries for each logical shader register.
 110     */
 111    c->grf_limit = BRW_WM_MAX_GRF / 2;
 112
 113    brw_wm_pass2(c);
 114
 115    /* how many general-purpose registers are used */
 116    c->prog_data.total_grf = c->max_wm_grf;
 117
 118    /* Emit GEN4 code.
 119     */
 120    brw_wm_emit(c);
 121 }
 122
 123 static void
 124 brw_wm_payload_setup(struct brw_context *brw,
 125                      struct brw_wm_compile *c)
 126 {
 127    struct intel_context *intel = &brw->intel;
 128    bool uses_depth = (c->fp->program.Base.InputsRead &
 129                       (1 << FRAG_ATTRIB_WPOS)) != 0;
 130
 131    if (intel->gen >= 6) {
 132       /* R0-1: masks, pixel X/Y coordinates. */
 133       c->nr_payload_regs = 2;
 134       /* R2: only for 32-pixel dispatch.*/
 135       /* R3-4: perspective pixel location barycentric */
 136       c->nr_payload_regs += 2;
 137       /* R5-6: perspective pixel location bary for dispatch width != 8 */
 138       if (c->dispatch_width == 16) {
 139          c->nr_payload_regs += 2;
 140       }
 141       /* R7-10: perspective centroid barycentric */
 142       /* R11-14: perspective sample barycentric */
 143       /* R15-18: linear pixel location barycentric */
 144       /* R19-22: linear centroid barycentric */
 145       /* R23-26: linear sample barycentric */
 146
 147       /* R27: interpolated depth if uses source depth */
 148       if (uses_depth) {
 149          c->source_depth_reg = c->nr_payload_regs;
 150          c->nr_payload_regs++;
 151          if (c->dispatch_width == 16) {
 152             /* R28: interpolated depth if not 8-wide. */
 153             c->nr_payload_regs++;
 154          }
 155       }
 156       /* R29: interpolated W set if GEN6_WM_USES_SOURCE_W.
 157        */
 158       if (uses_depth) {
 159          c->source_w_reg = c->nr_payload_regs;
 160          c->nr_payload_regs++;
 161          if (c->dispatch_width == 16) {
 162             /* R30: interpolated W if not 8-wide. */
 163             c->nr_payload_regs++;
 164          }
 165       }
 166       /* R31: MSAA position offsets. */
 167       /* R32-: bary for 32-pixel. */
 168       /* R58-59: interp W for 32-pixel. */
 169
 170       if (c->fp->program.Base.OutputsWritten &
 171           BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
 172          c->source_depth_to_render_target = GL_TRUE;
 173          c->computes_depth = GL_TRUE;
 174       }
 175    } else {
 176       brw_wm_lookup_iz(intel, c);
 177    }
 178 }
 179
 180 /**
 181  * All Mesa program -> GPU code generation goes through this function.
 182  * Depending on the instructions used (i.e. flow control instructions)
 183  * we'll use one of two code generators.
 184  */
 185 static void do_wm_prog( struct brw_context *brw,
 186                         struct brw_fragment_program *fp,
 187                         struct brw_wm_prog_key *key)
 188 {
 189    struct intel_context *intel = &brw->intel;
 190    struct brw_wm_compile *c;
 191    const GLuint *program;
 192    GLuint program_size;
 193
 194    c = brw->wm.compile_data;
 195    if (c == NULL) {
 196       brw->wm.compile_data = calloc(1, sizeof(*brw->wm.compile_data));
 197       c = brw->wm.compile_data;
 198       if (c == NULL) {
 199          /* Ouch - big out of memory problem.  Can't continue
 200           * without triggering a segfault, no way to signal,
 201           * so just return.
 202           */
 203          return;
 204       }
 205       c->instruction = calloc(1, BRW_WM_MAX_INSN * sizeof(*c->instruction));
 206       c->prog_instructions = calloc(1, BRW_WM_MAX_INSN *
 207                                           sizeof(*c->prog_instructions));
 208       c->vreg = calloc(1, BRW_WM_MAX_VREG * sizeof(*c->vreg));
 209       c->refs = calloc(1, BRW_WM_MAX_REF * sizeof(*c->refs));
 210    } else {
 211       void *instruction = c->instruction;
 212       void *prog_instructions = c->prog_instructions;
 213       void *vreg = c->vreg;
 214       void *refs = c->refs;
 215       memset(c, 0, sizeof(*brw->wm.compile_data));
 216       c->instruction = instruction;
 217       c->prog_instructions = prog_instructions;
 218       c->vreg = vreg;
 219       c->refs = refs;
 220    }
 221    memcpy(&c->key, key, sizeof(*key));
 222
 223    c->fp = fp;
 224    c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
 225
 226    brw_init_compile(brw, &c->func);
 227
 228    brw_wm_payload_setup(brw, c);
 229
 230    if (!brw_wm_fs_emit(brw, c)) {
 231       /*
 232        * Shader which use GLSL features such as flow control are handled
 233        * differently from "simple" shaders.
 234        */
 235       c->dispatch_width = 16;
 236       brw_wm_payload_setup(brw, c);
 237       brw_wm_non_glsl_emit(brw, c);
 238    }
 239    c->prog_data.dispatch_width = c->dispatch_width;
 240
 241    /* Scratch space is used for register spilling */
 242    if (c->last_scratch) {
 243       uint32_t total_scratch;
 244
 245       /* Per-thread scratch space is power-of-two sized. */
 246       for (c->prog_data.total_scratch = 1024;
 247            c->prog_data.total_scratch <= c->last_scratch;
 248            c->prog_data.total_scratch *= 2) {
 249          /* empty */
 250       }
 251       total_scratch = c->prog_data.total_scratch * brw->wm_max_threads;
 252
 253       if (brw->wm.scratch_bo && total_scratch > brw->wm.scratch_bo->size) {
 254          drm_intel_bo_unreference(brw->wm.scratch_bo);
 255          brw->wm.scratch_bo = NULL;
 256       }
 257       if (brw->wm.scratch_bo == NULL) {
 258          brw->wm.scratch_bo = drm_intel_bo_alloc(intel->bufmgr,
 259                                                  "wm scratch",
 260                                                  total_scratch,
 261                                                  4096);
 262       }
 263    }
 264    else {
 265       c->prog_data.total_scratch = 0;
 266    }
 267
 268    if (unlikely(INTEL_DEBUG & DEBUG_WM))
 269       fprintf(stderr, "\n");
 270
 271    /* get the program
 272     */
 273    program = brw_get_program(&c->func, &program_size);
 274
 275    drm_intel_bo_unreference(brw->wm.prog_bo);
 276    brw->wm.prog_bo = brw_upload_cache_with_auxdata(&brw->cache, BRW_WM_PROG,
 277                                                    &c->key, sizeof(c->key),
 278                                                    NULL, 0,
 279                                                    program, program_size,
 280                                                    &c->prog_data,
 281                                                    sizeof(c->prog_data),
 282                                                    &brw->wm.prog_data);
 283 }
 284
 285
 286
 287 static void brw_wm_populate_key( struct brw_context *brw,
 288                                  struct brw_wm_prog_key *key )
 289 {
 290    struct gl_context *ctx = &brw->intel.ctx;
 291    /* BRW_NEW_FRAGMENT_PROGRAM */
 292    const struct brw_fragment_program *fp =
 293       (struct brw_fragment_program *)brw->fragment_program;
 294    GLuint lookup = 0;
 295    GLuint line_aa;
 296    GLuint i;
 297
 298    memset(key, 0, sizeof(*key));
 299
 300    /* Build the index for table lookup
 301     */
 302    /* _NEW_COLOR */
 303    key->alpha_test = ctx->Color.AlphaEnabled;
 304    if (fp->program.UsesKill ||
 305        ctx->Color.AlphaEnabled)
 306       lookup |= IZ_PS_KILL_ALPHATEST_BIT;
 307
 308    if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
 309       lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
 310
 311    /* _NEW_DEPTH */
 312    if (ctx->Depth.Test)
 313       lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
 314
 315    if (ctx->Depth.Test &&
 316        ctx->Depth.Mask) /* ?? */
 317       lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
 318
 319    /* _NEW_STENCIL */
 320    if (ctx->Stencil._Enabled) {
 321       lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
 322
 323       if (ctx->Stencil.WriteMask[0] ||
 324           ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
 325          lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
 326    }
 327
 328    line_aa = AA_NEVER;
 329
 330    /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
 331    if (ctx->Line.SmoothFlag) {
 332       if (brw->intel.reduced_primitive == GL_LINES) {
 333          line_aa = AA_ALWAYS;
 334       }
 335       else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
 336          if (ctx->Polygon.FrontMode == GL_LINE) {
 337             line_aa = AA_SOMETIMES;
 338
 339             if (ctx->Polygon.BackMode == GL_LINE ||
 340                 (ctx->Polygon.CullFlag &&
 341                  ctx->Polygon.CullFaceMode == GL_BACK))
 342                line_aa = AA_ALWAYS;
 343          }
 344          else if (ctx->Polygon.BackMode == GL_LINE) {
 345             line_aa = AA_SOMETIMES;
 346
 347             if ((ctx->Polygon.CullFlag &&
 348                  ctx->Polygon.CullFaceMode == GL_FRONT))
 349                line_aa = AA_ALWAYS;
 350          }
 351       }
 352    }
 353
 354    key->iz_lookup = lookup;
 355    key->line_aa = line_aa;
 356    key->stats_wm = brw->intel.stats_wm;
 357
 358    /* BRW_NEW_WM_INPUT_DIMENSIONS */
 359    key->proj_attrib_mask = brw->wm.input_size_masks[4-1];
 360
 361    /* _NEW_LIGHT */
 362    key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
 363
 364    /* _NEW_HINT */
 365    key->linear_color = (ctx->Hint.PerspectiveCorrection == GL_FASTEST);
 366
 367    /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
 368    key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
 369
 370    /* _NEW_TEXTURE */
 371    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 372       const struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
 373
 374       if (unit->_ReallyEnabled) {
 375          const struct gl_texture_object *t = unit->_Current;
 376          const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
 377          struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, i);
 378          int swizzles[SWIZZLE_NIL + 1] = {
 379             SWIZZLE_X,
 380             SWIZZLE_Y,
 381             SWIZZLE_Z,
 382             SWIZZLE_W,
 383             SWIZZLE_ZERO,
 384             SWIZZLE_ONE,
 385             SWIZZLE_NIL
 386          };
 387
 388          /* GL_DEPTH_TEXTURE_MODE is normally handled through
 389           * brw_wm_surface_state, but it applies to shadow compares as
 390           * well and our shadow compares always return the result in
 391           * all 4 channels.
 392           */
 393          if (sampler->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB) {
 394             if (sampler->DepthMode == GL_ALPHA) {
 395                swizzles[0] = SWIZZLE_ZERO;
 396                swizzles[1] = SWIZZLE_ZERO;
 397                swizzles[2] = SWIZZLE_ZERO;
 398             } else if (sampler->DepthMode == GL_LUMINANCE) {
 399                swizzles[3] = SWIZZLE_ONE;
 400             } else if (sampler->DepthMode == GL_RED) {
 401                /* See table 3.23 of the GL 3.0 spec. */
 402                swizzles[1] = SWIZZLE_ZERO;
 403                swizzles[2] = SWIZZLE_ZERO;
 404                swizzles[3] = SWIZZLE_ONE;
 405             }
 406          }
 407
 408          if (img->InternalFormat == GL_YCBCR_MESA) {
 409             key->yuvtex_mask |= 1 << i;
 410             if (img->TexFormat == MESA_FORMAT_YCBCR)
 411                 key->yuvtex_swap_mask |= 1 << i;
 412          }
 413
 414          key->tex_swizzles[i] =
 415             MAKE_SWIZZLE4(swizzles[GET_SWZ(t->_Swizzle, 0)],
 416                           swizzles[GET_SWZ(t->_Swizzle, 1)],
 417                           swizzles[GET_SWZ(t->_Swizzle, 2)],
 418                           swizzles[GET_SWZ(t->_Swizzle, 3)]);
 419       }
 420       else {
 421          key->tex_swizzles[i] = SWIZZLE_NOOP;
 422       }
 423    }
 424
 425    /* Shadow */
 426    key->shadowtex_mask = fp->program.Base.ShadowSamplers;
 427
 428    /* _NEW_BUFFERS */
 429    /*
 430     * Include the draw buffer origin and height so that we can calculate
 431     * fragment position values relative to the bottom left of the drawable,
 432     * from the incoming screen origin relative position we get as part of our
 433     * payload.
 434     *
 435     * This is only needed for the WM_WPOSXY opcode when the fragment program
 436     * uses the gl_FragCoord input.
 437     *
 438     * We could avoid recompiling by including this as a constant referenced by
 439     * our program, but if we were to do that it would also be nice to handle
 440     * getting that constant updated at batchbuffer submit time (when we
 441     * hold the lock and know where the buffer really is) rather than at emit
 442     * time when we don't hold the lock and are just guessing.  We could also
 443     * just avoid using this as key data if the program doesn't use
 444     * fragment.position.
 445     *
 446     * For DRI2 the origin_x/y will always be (0,0) but we still need the
 447     * drawable height in order to invert the Y axis.
 448     */
 449    if (fp->program.Base.InputsRead & FRAG_BIT_WPOS) {
 450       key->drawable_height = ctx->DrawBuffer->Height;
 451       key->render_to_fbo = ctx->DrawBuffer->Name != 0;
 452    }
 453
 454    /* _NEW_BUFFERS */
 455    key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
 456
 457    /* CACHE_NEW_VS_PROG */
 458    key->vp_outputs_written = brw->vs.prog_data->outputs_written;
 459
 460    /* The unique fragment program ID */
 461    key->program_string_id = fp->id;
 462 }
 463
 464
 465 static void brw_prepare_wm_prog(struct brw_context *brw)
 466 {
 467    struct brw_wm_prog_key key;
 468    struct brw_fragment_program *fp = (struct brw_fragment_program *)
 469       brw->fragment_program;
 470
 471    brw_wm_populate_key(brw, &key);
 472
 473    /* Make an early check for the key.
 474     */
 475    drm_intel_bo_unreference(brw->wm.prog_bo);
 476    brw->wm.prog_bo = brw_search_cache(&brw->cache, BRW_WM_PROG,
 477                                       &key, sizeof(key),
 478                                       NULL, 0,
 479                                       &brw->wm.prog_data);
 480    if (brw->wm.prog_bo == NULL)
 481       do_wm_prog(brw, fp, &key);
 482 }
 483
 484
 485 const struct brw_tracked_state brw_wm_prog = {
 486    .dirty = {
 487       .mesa  = (_NEW_COLOR |
 488                 _NEW_DEPTH |
 489                 _NEW_HINT |
 490                 _NEW_STENCIL |
 491                 _NEW_POLYGON |
 492                 _NEW_LINE |
 493                 _NEW_LIGHT |
 494                 _NEW_FRAG_CLAMP |
 495                 _NEW_BUFFERS |
 496                 _NEW_TEXTURE),
 497       .brw   = (BRW_NEW_FRAGMENT_PROGRAM |
 498                 BRW_NEW_WM_INPUT_DIMENSIONS |
 499                 BRW_NEW_REDUCED_PRIMITIVE),
 500       .cache = CACHE_NEW_VS_PROG,
 501    },
 502    .prepare = brw_prepare_wm_prog
 503 };
 504