i965: Print "force dual color blending" in FS recompile debug output.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 * Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 * Intel funded Tungsten Graphics to
4 * develop this 3D driver.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26 #include "brw_context.h"
27 #include "brw_wm.h"
28 #include "brw_state.h"
29 #include "main/enums.h"
30 #include "main/formats.h"
31 #include "main/fbobject.h"
32 #include "main/samplerobj.h"
33 #include "main/framebuffer.h"
34 #include "program/prog_parameter.h"
35 #include "program/program.h"
36 #include "intel_mipmap_tree.h"
37 #include "intel_image.h"
38 #include "compiler/brw_nir.h"
39 #include "brw_program.h"
40
41 #include "util/ralloc.h"
42
43 static void
44 assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
45 const struct gl_program *prog,
46 const struct brw_wm_prog_key *key,
47 struct brw_wm_prog_data *prog_data)
48 {
49 uint32_t next_binding_table_offset = 0;
50
51 /* If there are no color regions, we still perform an FB write to a null
52 * renderbuffer, which we place at surface index 0.
53 */
54 prog_data->binding_table.render_target_start = next_binding_table_offset;
55 next_binding_table_offset += MAX2(key->nr_color_regions, 1);
56
57 next_binding_table_offset =
58 brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base,
59 next_binding_table_offset);
60
61 if (prog->nir->info.outputs_read && !key->coherent_fb_fetch) {
62 prog_data->binding_table.render_target_read_start =
63 next_binding_table_offset;
64 next_binding_table_offset += key->nr_color_regions;
65 }
66 }
67
68 static void
69 brw_wm_debug_recompile(struct brw_context *brw, struct gl_program *prog,
70 const struct brw_wm_prog_key *key)
71 {
72 perf_debug("Recompiling fragment shader for program %d\n", prog->Id);
73
74 bool found = false;
75 const struct brw_wm_prog_key *old_key =
76 brw_find_previous_compile(&brw->cache, BRW_CACHE_FS_PROG,
77 key->program_string_id);
78
79 if (!old_key) {
80 perf_debug(" Didn't find previous compile in the shader cache for debug\n");
81 return;
82 }
83
84 found |= key_debug(brw, "alphatest, computed depth, depth test, or "
85 "depth write",
86 old_key->iz_lookup, key->iz_lookup);
87 found |= key_debug(brw, "depth statistics",
88 old_key->stats_wm, key->stats_wm);
89 found |= key_debug(brw, "flat shading",
90 old_key->flat_shade, key->flat_shade);
91 found |= key_debug(brw, "per-sample interpolation",
92 old_key->persample_interp, key->persample_interp);
93 found |= key_debug(brw, "number of color buffers",
94 old_key->nr_color_regions, key->nr_color_regions);
95 found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
96 old_key->replicate_alpha, key->replicate_alpha);
97 found |= key_debug(brw, "fragment color clamping",
98 old_key->clamp_fragment_color, key->clamp_fragment_color);
99 found |= key_debug(brw, "multisampled FBO",
100 old_key->multisample_fbo, key->multisample_fbo);
101 found |= key_debug(brw, "line smoothing",
102 old_key->line_aa, key->line_aa);
103 found |= key_debug(brw, "input slots valid",
104 old_key->input_slots_valid, key->input_slots_valid);
105 found |= key_debug(brw, "mrt alpha test function",
106 old_key->alpha_test_func, key->alpha_test_func);
107 found |= key_debug(brw, "mrt alpha test reference value",
108 old_key->alpha_test_ref, key->alpha_test_ref);
109 found |= key_debug(brw, "force dual color blending",
110 old_key->force_dual_color_blend,
111 key->force_dual_color_blend);
112
113 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
114
115 if (!found) {
116 perf_debug(" Something else\n");
117 }
118 }
119
120 /**
121 * All Mesa program -> GPU code generation goes through this function.
122 * Depending on the instructions used (i.e. flow control instructions)
123 * we'll use one of two code generators.
124 */
125 static bool
126 brw_codegen_wm_prog(struct brw_context *brw,
127 struct brw_program *fp,
128 struct brw_wm_prog_key *key,
129 struct brw_vue_map *vue_map)
130 {
131 const struct gen_device_info *devinfo = &brw->screen->devinfo;
132 struct gl_context *ctx = &brw->ctx;
133 void *mem_ctx = ralloc_context(NULL);
134 struct brw_wm_prog_data prog_data;
135 const GLuint *program;
136 GLuint program_size;
137 bool start_busy = false;
138 double start_time = 0;
139
140 memset(&prog_data, 0, sizeof(prog_data));
141
142 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
143 if (fp->program.is_arb_asm)
144 prog_data.base.use_alt_mode = true;
145
146 assign_fs_binding_table_offsets(devinfo, &fp->program, key, &prog_data);
147
148 /* Allocate the references to the uniforms that will end up in the
149 * prog_data associated with the compiled program, and which will be freed
150 * by the state cache.
151 */
152 int param_count = fp->program.nir->num_uniforms / 4;
153 prog_data.base.nr_image_params = fp->program.info.num_images;
154 /* The backend also sometimes adds params for texture size. */
155 param_count += 2 * ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits;
156 prog_data.base.param =
157 rzalloc_array(NULL, const gl_constant_value *, param_count);
158 prog_data.base.pull_param =
159 rzalloc_array(NULL, const gl_constant_value *, param_count);
160 prog_data.base.image_param =
161 rzalloc_array(NULL, struct brw_image_param,
162 prog_data.base.nr_image_params);
163 prog_data.base.nr_params = param_count;
164
165 if (!fp->program.is_arb_asm) {
166 brw_nir_setup_glsl_uniforms(fp->program.nir, &fp->program,
167 &prog_data.base, true);
168 } else {
169 brw_nir_setup_arb_uniforms(fp->program.nir, &fp->program,
170 &prog_data.base);
171
172 if (unlikely(INTEL_DEBUG & DEBUG_WM))
173 brw_dump_arb_asm("fragment", &fp->program);
174 }
175
176 if (unlikely(brw->perf_debug)) {
177 start_busy = (brw->batch.last_bo &&
178 brw_bo_busy(brw->batch.last_bo));
179 start_time = get_time();
180 }
181
182 int st_index8 = -1, st_index16 = -1;
183 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
184 st_index8 = brw_get_shader_time_index(brw, &fp->program, ST_FS8,
185 !fp->program.is_arb_asm);
186 st_index16 = brw_get_shader_time_index(brw, &fp->program, ST_FS16,
187 !fp->program.is_arb_asm);
188 }
189
190 char *error_str = NULL;
191 program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
192 key, &prog_data, fp->program.nir,
193 &fp->program, st_index8, st_index16,
194 true, brw->use_rep_send, vue_map,
195 &program_size, &error_str);
196
197 if (program == NULL) {
198 if (!fp->program.is_arb_asm) {
199 fp->program.sh.data->LinkStatus = linking_failure;
200 ralloc_strcat(&fp->program.sh.data->InfoLog, error_str);
201 }
202
203 _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str);
204
205 ralloc_free(mem_ctx);
206 return false;
207 }
208
209 if (unlikely(brw->perf_debug)) {
210 if (fp->compiled_once)
211 brw_wm_debug_recompile(brw, &fp->program, key);
212 fp->compiled_once = true;
213
214 if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
215 perf_debug("FS compile took %.03f ms and stalled the GPU\n",
216 (get_time() - start_time) * 1000);
217 }
218 }
219
220 brw_alloc_stage_scratch(brw, &brw->wm.base,
221 prog_data.base.total_scratch,
222 devinfo->max_wm_threads);
223
224 if (unlikely((INTEL_DEBUG & DEBUG_WM) && fp->program.is_arb_asm))
225 fprintf(stderr, "\n");
226
227 brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
228 key, sizeof(struct brw_wm_prog_key),
229 program, program_size,
230 &prog_data, sizeof(prog_data),
231 &brw->wm.base.prog_offset, &brw->wm.base.prog_data);
232
233 ralloc_free(mem_ctx);
234
235 return true;
236 }
237
238 bool
239 brw_debug_recompile_sampler_key(struct brw_context *brw,
240 const struct brw_sampler_prog_key_data *old_key,
241 const struct brw_sampler_prog_key_data *key)
242 {
243 bool found = false;
244
245 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
246 found |= key_debug(brw, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
247 old_key->swizzles[i], key->swizzles[i]);
248 }
249 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 1st coordinate",
250 old_key->gl_clamp_mask[0], key->gl_clamp_mask[0]);
251 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
252 old_key->gl_clamp_mask[1], key->gl_clamp_mask[1]);
253 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
254 old_key->gl_clamp_mask[2], key->gl_clamp_mask[2]);
255 found |= key_debug(brw, "gather channel quirk on any texture unit",
256 old_key->gather_channel_quirk_mask, key->gather_channel_quirk_mask);
257 found |= key_debug(brw, "compressed multisample layout",
258 old_key->compressed_multisample_layout_mask,
259 key->compressed_multisample_layout_mask);
260 found |= key_debug(brw, "16x msaa",
261 old_key->msaa_16,
262 key->msaa_16);
263
264 found |= key_debug(brw, "y_uv image bound",
265 old_key->y_uv_image_mask,
266 key->y_uv_image_mask);
267 found |= key_debug(brw, "y_u_v image bound",
268 old_key->y_u_v_image_mask,
269 key->y_u_v_image_mask);
270 found |= key_debug(brw, "yx_xuxv image bound",
271 old_key->yx_xuxv_image_mask,
272 key->yx_xuxv_image_mask);
273
274 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
275 found |= key_debug(brw, "textureGather workarounds",
276 old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]);
277 }
278
279 return found;
280 }
281
282 static uint8_t
283 gen6_gather_workaround(GLenum internalformat)
284 {
285 switch (internalformat) {
286 case GL_R8I: return WA_SIGN | WA_8BIT;
287 case GL_R8UI: return WA_8BIT;
288 case GL_R16I: return WA_SIGN | WA_16BIT;
289 case GL_R16UI: return WA_16BIT;
290 default:
291 /* Note that even though GL_R32I and GL_R32UI have format overrides in
292 * the surface state, there is no shader w/a required.
293 */
294 return 0;
295 }
296 }
297
298 void
299 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
300 const struct gl_program *prog,
301 struct brw_sampler_prog_key_data *key)
302 {
303 struct brw_context *brw = brw_context(ctx);
304 GLbitfield mask = prog->SamplersUsed;
305
306 while (mask) {
307 const int s = u_bit_scan(&mask);
308
309 key->swizzles[s] = SWIZZLE_NOOP;
310
311 int unit_id = prog->SamplerUnits[s];
312 const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id];
313
314 if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) {
315 const struct gl_texture_object *t = unit->_Current;
316 const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
317 struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id);
318
319 const bool alpha_depth = t->DepthMode == GL_ALPHA &&
320 (img->_BaseFormat == GL_DEPTH_COMPONENT ||
321 img->_BaseFormat == GL_DEPTH_STENCIL);
322
323 /* Haswell handles texture swizzling as surface format overrides
324 * (except for GL_ALPHA); all other platforms need MOVs in the shader.
325 */
326 if (alpha_depth || (brw->gen < 8 && !brw->is_haswell))
327 key->swizzles[s] = brw_get_texture_swizzle(ctx, t);
328
329 if (brw->gen < 8 &&
330 sampler->MinFilter != GL_NEAREST &&
331 sampler->MagFilter != GL_NEAREST) {
332 if (sampler->WrapS == GL_CLAMP)
333 key->gl_clamp_mask[0] |= 1 << s;
334 if (sampler->WrapT == GL_CLAMP)
335 key->gl_clamp_mask[1] |= 1 << s;
336 if (sampler->WrapR == GL_CLAMP)
337 key->gl_clamp_mask[2] |= 1 << s;
338 }
339
340 /* gather4 for RG32* is broken in multiple ways on Gen7. */
341 if (brw->gen == 7 && prog->nir->info.uses_texture_gather) {
342 switch (img->InternalFormat) {
343 case GL_RG32I:
344 case GL_RG32UI: {
345 /* We have to override the format to R32G32_FLOAT_LD.
346 * This means that SCS_ALPHA and SCS_ONE will return 0x3f8
347 * (1.0) rather than integer 1. This needs shader hacks.
348 *
349 * On Ivybridge, we whack W (alpha) to ONE in our key's
350 * swizzle. On Haswell, we look at the original texture
351 * swizzle, and use XYZW with channels overridden to ONE,
352 * leaving normal texture swizzling to SCS.
353 */
354 unsigned src_swizzle =
355 brw->is_haswell ? t->_Swizzle : key->swizzles[s];
356 for (int i = 0; i < 4; i++) {
357 unsigned src_comp = GET_SWZ(src_swizzle, i);
358 if (src_comp == SWIZZLE_ONE || src_comp == SWIZZLE_W) {
359 key->swizzles[i] &= ~(0x7 << (3 * i));
360 key->swizzles[i] |= SWIZZLE_ONE << (3 * i);
361 }
362 }
363 /* fallthrough */
364 }
365 case GL_RG32F:
366 /* The channel select for green doesn't work - we have to
367 * request blue. Haswell can use SCS for this, but Ivybridge
368 * needs a shader workaround.
369 */
370 if (!brw->is_haswell)
371 key->gather_channel_quirk_mask |= 1 << s;
372 break;
373 }
374 }
375
376 /* Gen6's gather4 is broken for UINT/SINT; we treat them as
377 * UNORM/FLOAT instead and fix it in the shader.
378 */
379 if (brw->gen == 6 && prog->nir->info.uses_texture_gather) {
380 key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
381 }
382
383 /* If this is a multisample sampler, and uses the CMS MSAA layout,
384 * then we need to emit slightly different code to first sample the
385 * MCS surface.
386 */
387 struct intel_texture_object *intel_tex =
388 intel_texture_object((struct gl_texture_object *)t);
389
390 /* From gen9 onwards some single sampled buffers can also be
391 * compressed. These don't need ld2dms sampling along with mcs fetch.
392 */
393 if (brw->gen >= 7 &&
394 intel_tex->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS &&
395 intel_tex->mt->num_samples > 1) {
396 key->compressed_multisample_layout_mask |= 1 << s;
397
398 if (intel_tex->mt->num_samples >= 16) {
399 assert(brw->gen >= 9);
400 key->msaa_16 |= 1 << s;
401 }
402 }
403
404 if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) {
405 switch (intel_tex->planar_format->components) {
406 case __DRI_IMAGE_COMPONENTS_Y_UV:
407 key->y_uv_image_mask |= 1 << s;
408 break;
409 case __DRI_IMAGE_COMPONENTS_Y_U_V:
410 key->y_u_v_image_mask |= 1 << s;
411 break;
412 case __DRI_IMAGE_COMPONENTS_Y_XUXV:
413 key->yx_xuxv_image_mask |= 1 << s;
414 break;
415 default:
416 break;
417 }
418 }
419
420 }
421 }
422 }
423
424 static bool
425 brw_wm_state_dirty(const struct brw_context *brw)
426 {
427 return brw_state_dirty(brw,
428 _NEW_BUFFERS |
429 _NEW_COLOR |
430 _NEW_DEPTH |
431 _NEW_FRAG_CLAMP |
432 _NEW_HINT |
433 _NEW_LIGHT |
434 _NEW_LINE |
435 _NEW_MULTISAMPLE |
436 _NEW_POLYGON |
437 _NEW_STENCIL |
438 _NEW_TEXTURE,
439 BRW_NEW_FRAGMENT_PROGRAM |
440 BRW_NEW_REDUCED_PRIMITIVE |
441 BRW_NEW_STATS_WM |
442 BRW_NEW_VUE_MAP_GEOM_OUT);
443 }
444
445 void
446 brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
447 {
448 struct gl_context *ctx = &brw->ctx;
449 /* BRW_NEW_FRAGMENT_PROGRAM */
450 const struct brw_program *fp = brw_program_const(brw->fragment_program);
451 const struct gl_program *prog = (struct gl_program *) brw->fragment_program;
452 GLuint lookup = 0;
453 GLuint line_aa;
454
455 memset(key, 0, sizeof(*key));
456
457 /* Build the index for table lookup
458 */
459 if (brw->gen < 6) {
460 /* _NEW_COLOR */
461 if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) {
462 lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
463 }
464
465 if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
466 lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
467 }
468
469 /* _NEW_DEPTH */
470 if (ctx->Depth.Test)
471 lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
472
473 if (brw_depth_writes_enabled(brw))
474 lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
475
476 /* _NEW_STENCIL | _NEW_BUFFERS */
477 if (ctx->Stencil._Enabled) {
478 lookup |= BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT;
479
480 if (ctx->Stencil.WriteMask[0] ||
481 ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
482 lookup |= BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT;
483 }
484 key->iz_lookup = lookup;
485 }
486
487 line_aa = BRW_WM_AA_NEVER;
488
489 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
490 if (ctx->Line.SmoothFlag) {
491 if (brw->reduced_primitive == GL_LINES) {
492 line_aa = BRW_WM_AA_ALWAYS;
493 }
494 else if (brw->reduced_primitive == GL_TRIANGLES) {
495 if (ctx->Polygon.FrontMode == GL_LINE) {
496 line_aa = BRW_WM_AA_SOMETIMES;
497
498 if (ctx->Polygon.BackMode == GL_LINE ||
499 (ctx->Polygon.CullFlag &&
500 ctx->Polygon.CullFaceMode == GL_BACK))
501 line_aa = BRW_WM_AA_ALWAYS;
502 }
503 else if (ctx->Polygon.BackMode == GL_LINE) {
504 line_aa = BRW_WM_AA_SOMETIMES;
505
506 if ((ctx->Polygon.CullFlag &&
507 ctx->Polygon.CullFaceMode == GL_FRONT))
508 line_aa = BRW_WM_AA_ALWAYS;
509 }
510 }
511 }
512
513 key->line_aa = line_aa;
514
515 /* _NEW_HINT */
516 key->high_quality_derivatives =
517 ctx->Hint.FragmentShaderDerivative == GL_NICEST;
518
519 if (brw->gen < 6)
520 key->stats_wm = brw->stats_wm;
521
522 /* _NEW_LIGHT */
523 key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
524
525 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
526 key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
527
528 /* _NEW_TEXTURE */
529 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
530
531 /* _NEW_BUFFERS */
532 key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
533
534 /* _NEW_COLOR */
535 key->force_dual_color_blend = brw->dual_color_blend_by_location &&
536 (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
537
538 /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
539 key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
540 (_mesa_is_alpha_test_enabled(ctx) ||
541 _mesa_is_alpha_to_coverage_enabled(ctx));
542
543 /* _NEW_BUFFERS _NEW_MULTISAMPLE */
544 /* Ignore sample qualifier while computing this flag. */
545 if (ctx->Multisample.Enabled) {
546 key->persample_interp =
547 ctx->Multisample.SampleShading &&
548 (ctx->Multisample.MinSampleShadingValue *
549 _mesa_geometric_samples(ctx->DrawBuffer) > 1);
550
551 key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
552 }
553
554 /* BRW_NEW_VUE_MAP_GEOM_OUT */
555 if (brw->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
556 BRW_FS_VARYING_INPUT_MASK) > 16) {
557 key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
558 }
559
560 /* _NEW_COLOR | _NEW_BUFFERS */
561 /* Pre-gen6, the hardware alpha test always used each render
562 * target's alpha to do alpha test, as opposed to render target 0's alpha
563 * like GL requires. Fix that by building the alpha test into the
564 * shader, and we'll skip enabling the fixed function alpha test.
565 */
566 if (brw->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
567 ctx->Color.AlphaEnabled) {
568 key->alpha_test_func = ctx->Color.AlphaFunc;
569 key->alpha_test_ref = ctx->Color.AlphaRef;
570 }
571
572 /* The unique fragment program ID */
573 key->program_string_id = fp->id;
574
575 /* Whether reads from the framebuffer should behave coherently. */
576 key->coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
577 }
578
579 void
580 brw_upload_wm_prog(struct brw_context *brw)
581 {
582 struct brw_wm_prog_key key;
583 struct brw_program *fp = (struct brw_program *) brw->fragment_program;
584
585 if (!brw_wm_state_dirty(brw))
586 return;
587
588 brw_wm_populate_key(brw, &key);
589
590 if (!brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
591 &key, sizeof(key),
592 &brw->wm.base.prog_offset,
593 &brw->wm.base.prog_data)) {
594 bool success = brw_codegen_wm_prog(brw, fp, &key,
595 &brw->vue_map_geom_out);
596 (void) success;
597 assert(success);
598 }
599 }
600
601 bool
602 brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
603 {
604 struct brw_context *brw = brw_context(ctx);
605 struct brw_wm_prog_key key;
606
607 struct brw_program *bfp = brw_program(prog);
608
609 memset(&key, 0, sizeof(key));
610
611 uint64_t outputs_written = prog->info.outputs_written;
612
613 if (brw->gen < 6) {
614 if (prog->info.fs.uses_discard)
615 key.iz_lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
616
617 if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
618 key.iz_lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
619
620 /* Just assume depth testing. */
621 key.iz_lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
622 key.iz_lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
623 }
624
625 if (brw->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
626 BRW_FS_VARYING_INPUT_MASK) > 16) {
627 key.input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
628 }
629
630 brw_setup_tex_for_precompile(brw, &key.tex, prog);
631
632 key.nr_color_regions = _mesa_bitcount_64(outputs_written &
633 ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
634 BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
635 BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
636
637 key.program_string_id = bfp->id;
638
639 /* Whether reads from the framebuffer should behave coherently. */
640 key.coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
641
642 uint32_t old_prog_offset = brw->wm.base.prog_offset;
643 struct brw_stage_prog_data *old_prog_data = brw->wm.base.prog_data;
644
645 struct brw_vue_map vue_map;
646 if (brw->gen < 6) {
647 brw_compute_vue_map(&brw->screen->devinfo, &vue_map,
648 prog->info.inputs_read | VARYING_BIT_POS,
649 false);
650 }
651
652 bool success = brw_codegen_wm_prog(brw, bfp, &key, &vue_map);
653
654 brw->wm.base.prog_offset = old_prog_offset;
655 brw->wm.base.prog_data = old_prog_data;
656
657 return success;
658 }