src/mesa/drivers/dri/i965/brw_wm.c

   1 /*
   2  * Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  * Intel funded Tungsten Graphics to
   4  * develop this 3D driver.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining
   7  * a copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sublicense, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial
  16  * portions of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  */
  26 #include "brw_context.h"
  27 #include "brw_wm.h"
  28 #include "brw_state.h"
  29 #include "main/enums.h"
  30 #include "main/formats.h"
  31 #include "main/fbobject.h"
  32 #include "main/samplerobj.h"
  33 #include "main/framebuffer.h"
  34 #include "program/prog_parameter.h"
  35 #include "program/program.h"
  36 #include "intel_mipmap_tree.h"
  37 #include "intel_image.h"
  38 #include "compiler/brw_nir.h"
  39 #include "brw_program.h"
  40
  41 #include "util/ralloc.h"
  42
  43 static void
  44 assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
  45                                 const struct gl_program *prog,
  46                                 const struct brw_wm_prog_key *key,
  47                                 struct brw_wm_prog_data *prog_data)
  48 {
  49    uint32_t next_binding_table_offset = 0;
  50
  51    /* If there are no color regions, we still perform an FB write to a null
  52     * renderbuffer, which we place at surface index 0.
  53     */
  54    prog_data->binding_table.render_target_start = next_binding_table_offset;
  55    next_binding_table_offset += MAX2(key->nr_color_regions, 1);
  56
  57    next_binding_table_offset =
  58       brw_assign_common_binding_table_offsets(devinfo, prog, &prog_data->base,
  59                                               next_binding_table_offset);
  60
  61    if (prog->nir->info.outputs_read && !key->coherent_fb_fetch) {
  62       prog_data->binding_table.render_target_read_start =
  63          next_binding_table_offset;
  64       next_binding_table_offset += key->nr_color_regions;
  65    }
  66 }
  67
  68 static void
  69 brw_wm_debug_recompile(struct brw_context *brw, struct gl_program *prog,
  70                        const struct brw_wm_prog_key *key)
  71 {
  72    perf_debug("Recompiling fragment shader for program %d\n", prog->Id);
  73
  74    bool found = false;
  75    const struct brw_wm_prog_key *old_key =
  76       brw_find_previous_compile(&brw->cache, BRW_CACHE_FS_PROG,
  77                                 key->program_string_id);
  78
  79    if (!old_key) {
  80       perf_debug("  Didn't find previous compile in the shader cache for debug\n");
  81       return;
  82    }
  83
  84    found |= key_debug(brw, "alphatest, computed depth, depth test, or "
  85                       "depth write",
  86                       old_key->iz_lookup, key->iz_lookup);
  87    found |= key_debug(brw, "depth statistics",
  88                       old_key->stats_wm, key->stats_wm);
  89    found |= key_debug(brw, "flat shading",
  90                       old_key->flat_shade, key->flat_shade);
  91    found |= key_debug(brw, "per-sample interpolation",
  92                       old_key->persample_interp, key->persample_interp);
  93    found |= key_debug(brw, "number of color buffers",
  94                       old_key->nr_color_regions, key->nr_color_regions);
  95    found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
  96                       old_key->replicate_alpha, key->replicate_alpha);
  97    found |= key_debug(brw, "fragment color clamping",
  98                       old_key->clamp_fragment_color, key->clamp_fragment_color);
  99    found |= key_debug(brw, "multisampled FBO",
 100                       old_key->multisample_fbo, key->multisample_fbo);
 101    found |= key_debug(brw, "line smoothing",
 102                       old_key->line_aa, key->line_aa);
 103    found |= key_debug(brw, "input slots valid",
 104                       old_key->input_slots_valid, key->input_slots_valid);
 105    found |= key_debug(brw, "mrt alpha test function",
 106                       old_key->alpha_test_func, key->alpha_test_func);
 107    found |= key_debug(brw, "mrt alpha test reference value",
 108                       old_key->alpha_test_ref, key->alpha_test_ref);
 109    found |= key_debug(brw, "force dual color blending",
 110                       old_key->force_dual_color_blend,
 111                       key->force_dual_color_blend);
 112
 113    found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
 114
 115    if (!found) {
 116       perf_debug("  Something else\n");
 117    }
 118 }
 119
 120 /**
 121  * All Mesa program -> GPU code generation goes through this function.
 122  * Depending on the instructions used (i.e. flow control instructions)
 123  * we'll use one of two code generators.
 124  */
 125 static bool
 126 brw_codegen_wm_prog(struct brw_context *brw,
 127                     struct brw_program *fp,
 128                     struct brw_wm_prog_key *key,
 129                     struct brw_vue_map *vue_map)
 130 {
 131    const struct gen_device_info *devinfo = &brw->screen->devinfo;
 132    void *mem_ctx = ralloc_context(NULL);
 133    struct brw_wm_prog_data prog_data;
 134    const GLuint *program;
 135    GLuint program_size;
 136    bool start_busy = false;
 137    double start_time = 0;
 138
 139    memset(&prog_data, 0, sizeof(prog_data));
 140
 141    /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
 142    if (fp->program.is_arb_asm)
 143       prog_data.base.use_alt_mode = true;
 144
 145    assign_fs_binding_table_offsets(devinfo, &fp->program, key, &prog_data);
 146
 147    if (!fp->program.is_arb_asm) {
 148       brw_nir_setup_glsl_uniforms(mem_ctx, fp->program.nir, &fp->program,
 149                                   &prog_data.base, true);
 150       brw_nir_analyze_ubo_ranges(brw->screen->compiler, fp->program.nir,
 151                                  prog_data.base.ubo_ranges);
 152    } else {
 153       brw_nir_setup_arb_uniforms(mem_ctx, fp->program.nir, &fp->program,
 154                                  &prog_data.base);
 155
 156       if (unlikely(INTEL_DEBUG & DEBUG_WM))
 157          brw_dump_arb_asm("fragment", &fp->program);
 158    }
 159
 160    if (unlikely(brw->perf_debug)) {
 161       start_busy = (brw->batch.last_bo &&
 162                     brw_bo_busy(brw->batch.last_bo));
 163       start_time = get_time();
 164    }
 165
 166    int st_index8 = -1, st_index16 = -1;
 167    if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
 168       st_index8 = brw_get_shader_time_index(brw, &fp->program, ST_FS8,
 169                                             !fp->program.is_arb_asm);
 170       st_index16 = brw_get_shader_time_index(brw, &fp->program, ST_FS16,
 171                                              !fp->program.is_arb_asm);
 172    }
 173
 174    char *error_str = NULL;
 175    program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
 176                             key, &prog_data, fp->program.nir,
 177                             &fp->program, st_index8, st_index16,
 178                             true, false, vue_map,
 179                             &program_size, &error_str);
 180
 181    if (program == NULL) {
 182       if (!fp->program.is_arb_asm) {
 183          fp->program.sh.data->LinkStatus = linking_failure;
 184          ralloc_strcat(&fp->program.sh.data->InfoLog, error_str);
 185       }
 186
 187       _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str);
 188
 189       ralloc_free(mem_ctx);
 190       return false;
 191    }
 192
 193    if (unlikely(brw->perf_debug)) {
 194       if (fp->compiled_once)
 195          brw_wm_debug_recompile(brw, &fp->program, key);
 196       fp->compiled_once = true;
 197
 198       if (start_busy && !brw_bo_busy(brw->batch.last_bo)) {
 199          perf_debug("FS compile took %.03f ms and stalled the GPU\n",
 200                     (get_time() - start_time) * 1000);
 201       }
 202    }
 203
 204    brw_alloc_stage_scratch(brw, &brw->wm.base,
 205                            prog_data.base.total_scratch,
 206                            devinfo->max_wm_threads);
 207
 208    if (unlikely((INTEL_DEBUG & DEBUG_WM) && fp->program.is_arb_asm))
 209       fprintf(stderr, "\n");
 210
 211    /* The param and pull_param arrays will be freed by the shader cache. */
 212    ralloc_steal(NULL, prog_data.base.param);
 213    ralloc_steal(NULL, prog_data.base.pull_param);
 214    brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
 215                     key, sizeof(struct brw_wm_prog_key),
 216                     program, program_size,
 217                     &prog_data, sizeof(prog_data),
 218                     &brw->wm.base.prog_offset, &brw->wm.base.prog_data);
 219
 220    ralloc_free(mem_ctx);
 221
 222    return true;
 223 }
 224
 225 bool
 226 brw_debug_recompile_sampler_key(struct brw_context *brw,
 227                                 const struct brw_sampler_prog_key_data *old_key,
 228                                 const struct brw_sampler_prog_key_data *key)
 229 {
 230    bool found = false;
 231
 232    for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
 233       found |= key_debug(brw, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
 234                          old_key->swizzles[i], key->swizzles[i]);
 235    }
 236    found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 1st coordinate",
 237                       old_key->gl_clamp_mask[0], key->gl_clamp_mask[0]);
 238    found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
 239                       old_key->gl_clamp_mask[1], key->gl_clamp_mask[1]);
 240    found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
 241                       old_key->gl_clamp_mask[2], key->gl_clamp_mask[2]);
 242    found |= key_debug(brw, "gather channel quirk on any texture unit",
 243                       old_key->gather_channel_quirk_mask, key->gather_channel_quirk_mask);
 244    found |= key_debug(brw, "compressed multisample layout",
 245                       old_key->compressed_multisample_layout_mask,
 246                       key->compressed_multisample_layout_mask);
 247    found |= key_debug(brw, "16x msaa",
 248                       old_key->msaa_16,
 249                       key->msaa_16);
 250
 251    found |= key_debug(brw, "y_uv image bound",
 252                       old_key->y_uv_image_mask,
 253                       key->y_uv_image_mask);
 254    found |= key_debug(brw, "y_u_v image bound",
 255                       old_key->y_u_v_image_mask,
 256                       key->y_u_v_image_mask);
 257    found |= key_debug(brw, "yx_xuxv image bound",
 258                       old_key->yx_xuxv_image_mask,
 259                       key->yx_xuxv_image_mask);
 260    found |= key_debug(brw, "xy_uxvx image bound",
 261                       old_key->xy_uxvx_image_mask,
 262                       key->xy_uxvx_image_mask);
 263
 264
 265    for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
 266       found |= key_debug(brw, "textureGather workarounds",
 267                          old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]);
 268    }
 269
 270    return found;
 271 }
 272
 273 static uint8_t
 274 gen6_gather_workaround(GLenum internalformat)
 275 {
 276    switch (internalformat) {
 277    case GL_R8I: return WA_SIGN | WA_8BIT;
 278    case GL_R8UI: return WA_8BIT;
 279    case GL_R16I: return WA_SIGN | WA_16BIT;
 280    case GL_R16UI: return WA_16BIT;
 281    default:
 282       /* Note that even though GL_R32I and GL_R32UI have format overrides in
 283        * the surface state, there is no shader w/a required.
 284        */
 285       return 0;
 286    }
 287 }
 288
 289 void
 290 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
 291                                    const struct gl_program *prog,
 292                                    struct brw_sampler_prog_key_data *key)
 293 {
 294    struct brw_context *brw = brw_context(ctx);
 295    const struct gen_device_info *devinfo = &brw->screen->devinfo;
 296    GLbitfield mask = prog->SamplersUsed;
 297
 298    while (mask) {
 299       const int s = u_bit_scan(&mask);
 300
 301       key->swizzles[s] = SWIZZLE_NOOP;
 302
 303       int unit_id = prog->SamplerUnits[s];
 304       const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id];
 305
 306       if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) {
 307          const struct gl_texture_object *t = unit->_Current;
 308          const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
 309          struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id);
 310
 311          const bool alpha_depth = t->DepthMode == GL_ALPHA &&
 312             (img->_BaseFormat == GL_DEPTH_COMPONENT ||
 313              img->_BaseFormat == GL_DEPTH_STENCIL);
 314
 315          /* Haswell handles texture swizzling as surface format overrides
 316           * (except for GL_ALPHA); all other platforms need MOVs in the shader.
 317           */
 318          if (alpha_depth || (devinfo->gen < 8 && !devinfo->is_haswell))
 319             key->swizzles[s] = brw_get_texture_swizzle(ctx, t);
 320
 321          if (devinfo->gen < 8 &&
 322              sampler->MinFilter != GL_NEAREST &&
 323              sampler->MagFilter != GL_NEAREST) {
 324             if (sampler->WrapS == GL_CLAMP)
 325                key->gl_clamp_mask[0] |= 1 << s;
 326             if (sampler->WrapT == GL_CLAMP)
 327                key->gl_clamp_mask[1] |= 1 << s;
 328             if (sampler->WrapR == GL_CLAMP)
 329                key->gl_clamp_mask[2] |= 1 << s;
 330          }
 331
 332          /* gather4 for RG32* is broken in multiple ways on Gen7. */
 333          if (devinfo->gen == 7 && prog->nir->info.uses_texture_gather) {
 334             switch (img->InternalFormat) {
 335             case GL_RG32I:
 336             case GL_RG32UI: {
 337                /* We have to override the format to R32G32_FLOAT_LD.
 338                 * This means that SCS_ALPHA and SCS_ONE will return 0x3f8
 339                 * (1.0) rather than integer 1.  This needs shader hacks.
 340                 *
 341                 * On Ivybridge, we whack W (alpha) to ONE in our key's
 342                 * swizzle.  On Haswell, we look at the original texture
 343                 * swizzle, and use XYZW with channels overridden to ONE,
 344                 * leaving normal texture swizzling to SCS.
 345                 */
 346                unsigned src_swizzle =
 347                   devinfo->is_haswell ? t->_Swizzle : key->swizzles[s];
 348                for (int i = 0; i < 4; i++) {
 349                   unsigned src_comp = GET_SWZ(src_swizzle, i);
 350                   if (src_comp == SWIZZLE_ONE || src_comp == SWIZZLE_W) {
 351                      key->swizzles[i] &= ~(0x7 << (3 * i));
 352                      key->swizzles[i] |= SWIZZLE_ONE << (3 * i);
 353                   }
 354                }
 355                /* fallthrough */
 356             }
 357             case GL_RG32F:
 358                /* The channel select for green doesn't work - we have to
 359                 * request blue.  Haswell can use SCS for this, but Ivybridge
 360                 * needs a shader workaround.
 361                 */
 362                if (!devinfo->is_haswell)
 363                   key->gather_channel_quirk_mask |= 1 << s;
 364                break;
 365             }
 366          }
 367
 368          /* Gen6's gather4 is broken for UINT/SINT; we treat them as
 369           * UNORM/FLOAT instead and fix it in the shader.
 370           */
 371          if (devinfo->gen == 6 && prog->nir->info.uses_texture_gather) {
 372             key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
 373          }
 374
 375          /* If this is a multisample sampler, and uses the CMS MSAA layout,
 376           * then we need to emit slightly different code to first sample the
 377           * MCS surface.
 378           */
 379          struct intel_texture_object *intel_tex =
 380             intel_texture_object((struct gl_texture_object *)t);
 381
 382          /* From gen9 onwards some single sampled buffers can also be
 383           * compressed. These don't need ld2dms sampling along with mcs fetch.
 384           */
 385          if (intel_tex->mt->aux_usage == ISL_AUX_USAGE_MCS) {
 386             assert(devinfo->gen >= 7);
 387             assert(intel_tex->mt->surf.samples > 1);
 388             assert(intel_tex->mt->mcs_buf);
 389             assert(intel_tex->mt->surf.msaa_layout == ISL_MSAA_LAYOUT_ARRAY);
 390             key->compressed_multisample_layout_mask |= 1 << s;
 391
 392             if (intel_tex->mt->surf.samples >= 16) {
 393                assert(devinfo->gen >= 9);
 394                key->msaa_16 |= 1 << s;
 395             }
 396          }
 397
 398          if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) {
 399             switch (intel_tex->planar_format->components) {
 400             case __DRI_IMAGE_COMPONENTS_Y_UV:
 401                key->y_uv_image_mask |= 1 << s;
 402                break;
 403             case __DRI_IMAGE_COMPONENTS_Y_U_V:
 404                key->y_u_v_image_mask |= 1 << s;
 405                break;
 406             case __DRI_IMAGE_COMPONENTS_Y_XUXV:
 407                key->yx_xuxv_image_mask |= 1 << s;
 408                break;
 409             case __DRI_IMAGE_COMPONENTS_Y_UXVX:
 410                key->xy_uxvx_image_mask |= 1 << s;
 411                break;
 412             default:
 413                break;
 414             }
 415          }
 416
 417       }
 418    }
 419 }
 420
 421 static bool
 422 brw_wm_state_dirty(const struct brw_context *brw)
 423 {
 424    return brw_state_dirty(brw,
 425                           _NEW_BUFFERS |
 426                           _NEW_COLOR |
 427                           _NEW_DEPTH |
 428                           _NEW_FRAG_CLAMP |
 429                           _NEW_HINT |
 430                           _NEW_LIGHT |
 431                           _NEW_LINE |
 432                           _NEW_MULTISAMPLE |
 433                           _NEW_POLYGON |
 434                           _NEW_STENCIL |
 435                           _NEW_TEXTURE,
 436                           BRW_NEW_FRAGMENT_PROGRAM |
 437                           BRW_NEW_REDUCED_PRIMITIVE |
 438                           BRW_NEW_STATS_WM |
 439                           BRW_NEW_VUE_MAP_GEOM_OUT);
 440 }
 441
 442 void
 443 brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
 444 {
 445    const struct gen_device_info *devinfo = &brw->screen->devinfo;
 446    struct gl_context *ctx = &brw->ctx;
 447    /* BRW_NEW_FRAGMENT_PROGRAM */
 448    const struct gl_program *prog = brw->programs[MESA_SHADER_FRAGMENT];
 449    const struct brw_program *fp = brw_program_const(prog);
 450    GLuint lookup = 0;
 451    GLuint line_aa;
 452
 453    memset(key, 0, sizeof(*key));
 454
 455    /* Build the index for table lookup
 456     */
 457    if (devinfo->gen < 6) {
 458       /* _NEW_COLOR */
 459       if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) {
 460          lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
 461       }
 462
 463       if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
 464          lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
 465       }
 466
 467       /* _NEW_DEPTH */
 468       if (ctx->Depth.Test)
 469          lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
 470
 471       if (brw_depth_writes_enabled(brw))
 472          lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
 473
 474       /* _NEW_STENCIL | _NEW_BUFFERS */
 475       if (brw->stencil_enabled) {
 476          lookup |= BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT;
 477
 478          if (ctx->Stencil.WriteMask[0] ||
 479              ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
 480             lookup |= BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT;
 481       }
 482       key->iz_lookup = lookup;
 483    }
 484
 485    line_aa = BRW_WM_AA_NEVER;
 486
 487    /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
 488    if (ctx->Line.SmoothFlag) {
 489       if (brw->reduced_primitive == GL_LINES) {
 490          line_aa = BRW_WM_AA_ALWAYS;
 491       }
 492       else if (brw->reduced_primitive == GL_TRIANGLES) {
 493          if (ctx->Polygon.FrontMode == GL_LINE) {
 494             line_aa = BRW_WM_AA_SOMETIMES;
 495
 496             if (ctx->Polygon.BackMode == GL_LINE ||
 497                 (ctx->Polygon.CullFlag &&
 498                  ctx->Polygon.CullFaceMode == GL_BACK))
 499                line_aa = BRW_WM_AA_ALWAYS;
 500          }
 501          else if (ctx->Polygon.BackMode == GL_LINE) {
 502             line_aa = BRW_WM_AA_SOMETIMES;
 503
 504             if ((ctx->Polygon.CullFlag &&
 505                  ctx->Polygon.CullFaceMode == GL_FRONT))
 506                line_aa = BRW_WM_AA_ALWAYS;
 507          }
 508       }
 509    }
 510
 511    key->line_aa = line_aa;
 512
 513    /* _NEW_HINT */
 514    key->high_quality_derivatives =
 515       ctx->Hint.FragmentShaderDerivative == GL_NICEST;
 516
 517    if (devinfo->gen < 6)
 518       key->stats_wm = brw->stats_wm;
 519
 520    /* _NEW_LIGHT */
 521    key->flat_shade =
 522       (prog->info.inputs_read & (VARYING_BIT_COL0 | VARYING_BIT_COL1)) &&
 523       (ctx->Light.ShadeModel == GL_FLAT);
 524
 525    /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
 526    key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
 527
 528    /* _NEW_TEXTURE */
 529    brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
 530
 531    /* _NEW_BUFFERS */
 532    key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
 533
 534    /* _NEW_COLOR */
 535    key->force_dual_color_blend = brw->dual_color_blend_by_location &&
 536       (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
 537
 538    /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
 539    key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
 540       (_mesa_is_alpha_test_enabled(ctx) ||
 541        _mesa_is_alpha_to_coverage_enabled(ctx));
 542
 543    /* _NEW_BUFFERS _NEW_MULTISAMPLE */
 544    /* Ignore sample qualifier while computing this flag. */
 545    if (ctx->Multisample.Enabled) {
 546       key->persample_interp =
 547          ctx->Multisample.SampleShading &&
 548          (ctx->Multisample.MinSampleShadingValue *
 549           _mesa_geometric_samples(ctx->DrawBuffer) > 1);
 550
 551       key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
 552    }
 553
 554    /* BRW_NEW_VUE_MAP_GEOM_OUT */
 555    if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
 556                                              BRW_FS_VARYING_INPUT_MASK) > 16) {
 557       key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
 558    }
 559
 560    /* _NEW_COLOR | _NEW_BUFFERS */
 561    /* Pre-gen6, the hardware alpha test always used each render
 562     * target's alpha to do alpha test, as opposed to render target 0's alpha
 563     * like GL requires.  Fix that by building the alpha test into the
 564     * shader, and we'll skip enabling the fixed function alpha test.
 565     */
 566    if (devinfo->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
 567        ctx->Color.AlphaEnabled) {
 568       key->alpha_test_func = ctx->Color.AlphaFunc;
 569       key->alpha_test_ref = ctx->Color.AlphaRef;
 570    }
 571
 572    /* The unique fragment program ID */
 573    key->program_string_id = fp->id;
 574
 575    /* Whether reads from the framebuffer should behave coherently. */
 576    key->coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
 577 }
 578
 579 void
 580 brw_upload_wm_prog(struct brw_context *brw)
 581 {
 582    struct brw_wm_prog_key key;
 583    struct brw_program *fp =
 584       (struct brw_program *) brw->programs[MESA_SHADER_FRAGMENT];
 585
 586    if (!brw_wm_state_dirty(brw))
 587       return;
 588
 589    brw_wm_populate_key(brw, &key);
 590
 591    if (!brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
 592                          &key, sizeof(key),
 593                          &brw->wm.base.prog_offset,
 594                          &brw->wm.base.prog_data)) {
 595       bool success = brw_codegen_wm_prog(brw, fp, &key,
 596                                          &brw->vue_map_geom_out);
 597       (void) success;
 598       assert(success);
 599    }
 600 }
 601
 602 bool
 603 brw_fs_precompile(struct gl_context *ctx, struct gl_program *prog)
 604 {
 605    struct brw_context *brw = brw_context(ctx);
 606    const struct gen_device_info *devinfo = &brw->screen->devinfo;
 607    struct brw_wm_prog_key key;
 608
 609    struct brw_program *bfp = brw_program(prog);
 610
 611    memset(&key, 0, sizeof(key));
 612
 613    uint64_t outputs_written = prog->info.outputs_written;
 614
 615    if (devinfo->gen < 6) {
 616       if (prog->info.fs.uses_discard)
 617          key.iz_lookup |= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT;
 618
 619       if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
 620          key.iz_lookup |= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT;
 621
 622       /* Just assume depth testing. */
 623       key.iz_lookup |= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT;
 624       key.iz_lookup |= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT;
 625    }
 626
 627    if (devinfo->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
 628                                              BRW_FS_VARYING_INPUT_MASK) > 16) {
 629       key.input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
 630    }
 631
 632    brw_setup_tex_for_precompile(brw, &key.tex, prog);
 633
 634    key.nr_color_regions = _mesa_bitcount_64(outputs_written &
 635          ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
 636            BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
 637            BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
 638
 639    key.program_string_id = bfp->id;
 640
 641    /* Whether reads from the framebuffer should behave coherently. */
 642    key.coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
 643
 644    uint32_t old_prog_offset = brw->wm.base.prog_offset;
 645    struct brw_stage_prog_data *old_prog_data = brw->wm.base.prog_data;
 646
 647    struct brw_vue_map vue_map;
 648    if (devinfo->gen < 6) {
 649       brw_compute_vue_map(&brw->screen->devinfo, &vue_map,
 650                           prog->info.inputs_read | VARYING_BIT_POS,
 651                           false);
 652    }
 653
 654    bool success = brw_codegen_wm_prog(brw, bfp, &key, &vue_map);
 655
 656    brw->wm.base.prog_offset = old_prog_offset;
 657    brw->wm.base.prog_data = old_prog_data;
 658
 659    return success;
 660 }