src/mesa/drivers/dri/i965/brw_wm.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "brw_context.h"
  33 #include "brw_wm.h"
  34 #include "brw_state.h"
  35 #include "main/formats.h"
  36 #include "main/fbobject.h"
  37 #include "main/samplerobj.h"
  38 #include "program/prog_parameter.h"
  39
  40 #include "glsl/ralloc.h"
  41
  42 /** Return number of src args for given instruction */
  43 GLuint brw_wm_nr_args( GLuint opcode )
  44 {
  45    switch (opcode) {
  46    case WM_FRONTFACING:
  47    case WM_PIXELXY:
  48       return 0;
  49    case WM_CINTERP:
  50    case WM_WPOSXY:
  51    case WM_DELTAXY:
  52       return 1;
  53    case WM_LINTERP:
  54    case WM_PIXELW:
  55       return 2;
  56    case WM_FB_WRITE:
  57    case WM_PINTERP:
  58       return 3;
  59    default:
  60       assert(opcode < MAX_OPCODE);
  61       return _mesa_num_inst_src_regs(opcode);
  62    }
  63 }
  64
  65
  66 GLuint brw_wm_is_scalar_result( GLuint opcode )
  67 {
  68    switch (opcode) {
  69    case OPCODE_COS:
  70    case OPCODE_EX2:
  71    case OPCODE_LG2:
  72    case OPCODE_POW:
  73    case OPCODE_RCP:
  74    case OPCODE_RSQ:
  75    case OPCODE_SIN:
  76    case OPCODE_DP2:
  77    case OPCODE_DP3:
  78    case OPCODE_DP4:
  79    case OPCODE_DPH:
  80    case OPCODE_DST:
  81       return 1;
  82
  83    default:
  84       return 0;
  85    }
  86 }
  87
  88
  89 /**
  90  * Do GPU code generation for non-GLSL shader.  non-GLSL shaders have
  91  * no flow control instructions so we can more readily do SSA-style
  92  * optimizations.
  93  */
  94 static void
  95 brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
  96 {
  97    /* Augment fragment program.  Add instructions for pre- and
  98     * post-fragment-program tasks such as interpolation and fogging.
  99     */
 100    brw_wm_pass_fp(c);
 101
 102    /* Translate to intermediate representation.  Build register usage
 103     * chains.
 104     */
 105    brw_wm_pass0(c);
 106
 107    /* Dead code removal.
 108     */
 109    brw_wm_pass1(c);
 110
 111    /* Register allocation.
 112     * Divide by two because we operate on 16 pixels at a time and require
 113     * two GRF entries for each logical shader register.
 114     */
 115    c->grf_limit = BRW_WM_MAX_GRF / 2;
 116
 117    brw_wm_pass2(c);
 118
 119    /* how many general-purpose registers are used */
 120    c->prog_data.reg_blocks = brw_register_blocks(c->max_wm_grf);
 121
 122    /* Emit GEN4 code.
 123     */
 124    brw_wm_emit(c);
 125 }
 126
 127
 128 /**
 129  * Return a bitfield where bit n is set if barycentric interpolation mode n
 130  * (see enum brw_wm_barycentric_interp_mode) is needed by the fragment shader.
 131  */
 132 static unsigned
 133 brw_compute_barycentric_interp_modes(struct brw_context *brw,
 134                                      bool shade_model_flat,
 135                                      const struct gl_fragment_program *fprog)
 136 {
 137    unsigned barycentric_interp_modes = 0;
 138    int attr;
 139
 140    /* Loop through all fragment shader inputs to figure out what interpolation
 141     * modes are in use, and set the appropriate bits in
 142     * barycentric_interp_modes.
 143     */
 144    for (attr = 0; attr < FRAG_ATTRIB_MAX; ++attr) {
 145       enum glsl_interp_qualifier interp_qualifier =
 146          fprog->InterpQualifier[attr];
 147       bool is_centroid = fprog->IsCentroid & BITFIELD64_BIT(attr);
 148       bool is_gl_Color = attr == FRAG_ATTRIB_COL0 || attr == FRAG_ATTRIB_COL1;
 149
 150       /* Ignore unused inputs. */
 151       if (!(fprog->Base.InputsRead & BITFIELD64_BIT(attr)))
 152          continue;
 153
 154       /* Ignore WPOS and FACE, because they don't require interpolation. */
 155       if (attr == FRAG_ATTRIB_WPOS || attr == FRAG_ATTRIB_FACE)
 156          continue;
 157
 158       /* Determine the set (or sets) of barycentric coordinates needed to
 159        * interpolate this variable.  Note that when
 160        * brw->needs_unlit_centroid_workaround is set, centroid interpolation
 161        * uses PIXEL interpolation for unlit pixels and CENTROID interpolation
 162        * for lit pixels, so we need both sets of barycentric coordinates.
 163        */
 164       if (interp_qualifier == INTERP_QUALIFIER_NOPERSPECTIVE) {
 165          if (is_centroid) {
 166             barycentric_interp_modes |=
 167                1 << BRW_WM_NONPERSPECTIVE_CENTROID_BARYCENTRIC;
 168          }
 169          if (!is_centroid || brw->needs_unlit_centroid_workaround) {
 170             barycentric_interp_modes |=
 171                1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
 172          }
 173       } else if (interp_qualifier == INTERP_QUALIFIER_SMOOTH ||
 174                  (!(shade_model_flat && is_gl_Color) &&
 175                   interp_qualifier == INTERP_QUALIFIER_NONE)) {
 176          if (is_centroid) {
 177             barycentric_interp_modes |=
 178                1 << BRW_WM_PERSPECTIVE_CENTROID_BARYCENTRIC;
 179          }
 180          if (!is_centroid || brw->needs_unlit_centroid_workaround) {
 181             barycentric_interp_modes |=
 182                1 << BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
 183          }
 184       }
 185    }
 186
 187    return barycentric_interp_modes;
 188 }
 189
 190
 191 void
 192 brw_wm_payload_setup(struct brw_context *brw,
 193                      struct brw_wm_compile *c)
 194 {
 195    struct intel_context *intel = &brw->intel;
 196    bool uses_depth = (c->fp->program.Base.InputsRead &
 197                       (1 << FRAG_ATTRIB_WPOS)) != 0;
 198    unsigned barycentric_interp_modes = c->prog_data.barycentric_interp_modes;
 199    int i;
 200
 201    if (intel->gen >= 6) {
 202       /* R0-1: masks, pixel X/Y coordinates. */
 203       c->nr_payload_regs = 2;
 204       /* R2: only for 32-pixel dispatch.*/
 205
 206       /* R3-26: barycentric interpolation coordinates.  These appear in the
 207        * same order that they appear in the brw_wm_barycentric_interp_mode
 208        * enum.  Each set of coordinates occupies 2 registers if dispatch width
 209        * == 8 and 4 registers if dispatch width == 16.  Coordinates only
 210        * appear if they were enabled using the "Barycentric Interpolation
 211        * Mode" bits in WM_STATE.
 212        */
 213       for (i = 0; i < BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT; ++i) {
 214          if (barycentric_interp_modes & (1 << i)) {
 215             c->barycentric_coord_reg[i] = c->nr_payload_regs;
 216             c->nr_payload_regs += 2;
 217             if (c->dispatch_width == 16) {
 218                c->nr_payload_regs += 2;
 219             }
 220          }
 221       }
 222
 223       /* R27: interpolated depth if uses source depth */
 224       if (uses_depth) {
 225          c->source_depth_reg = c->nr_payload_regs;
 226          c->nr_payload_regs++;
 227          if (c->dispatch_width == 16) {
 228             /* R28: interpolated depth if not 8-wide. */
 229             c->nr_payload_regs++;
 230          }
 231       }
 232       /* R29: interpolated W set if GEN6_WM_USES_SOURCE_W.
 233        */
 234       if (uses_depth) {
 235          c->source_w_reg = c->nr_payload_regs;
 236          c->nr_payload_regs++;
 237          if (c->dispatch_width == 16) {
 238             /* R30: interpolated W if not 8-wide. */
 239             c->nr_payload_regs++;
 240          }
 241       }
 242       /* R31: MSAA position offsets. */
 243       /* R32-: bary for 32-pixel. */
 244       /* R58-59: interp W for 32-pixel. */
 245
 246       if (c->fp->program.Base.OutputsWritten &
 247           BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
 248          c->source_depth_to_render_target = true;
 249          c->computes_depth = true;
 250       }
 251    } else {
 252       brw_wm_lookup_iz(intel, c);
 253    }
 254 }
 255
 256 /**
 257  * All Mesa program -> GPU code generation goes through this function.
 258  * Depending on the instructions used (i.e. flow control instructions)
 259  * we'll use one of two code generators.
 260  */
 261 bool do_wm_prog(struct brw_context *brw,
 262                 struct gl_shader_program *prog,
 263                 struct brw_fragment_program *fp,
 264                 struct brw_wm_prog_key *key)
 265 {
 266    struct intel_context *intel = &brw->intel;
 267    struct brw_wm_compile *c;
 268    const GLuint *program;
 269    GLuint program_size;
 270
 271    c = brw->wm.compile_data;
 272    if (c == NULL) {
 273       brw->wm.compile_data = rzalloc(NULL, struct brw_wm_compile);
 274       c = brw->wm.compile_data;
 275       if (c == NULL) {
 276          /* Ouch - big out of memory problem.  Can't continue
 277           * without triggering a segfault, no way to signal,
 278           * so just return.
 279           */
 280          return false;
 281       }
 282    } else {
 283       void *instruction = c->instruction;
 284       void *prog_instructions = c->prog_instructions;
 285       void *vreg = c->vreg;
 286       void *refs = c->refs;
 287       memset(c, 0, sizeof(*brw->wm.compile_data));
 288       c->instruction = instruction;
 289       c->prog_instructions = prog_instructions;
 290       c->vreg = vreg;
 291       c->refs = refs;
 292    }
 293    memcpy(&c->key, key, sizeof(*key));
 294
 295    c->fp = fp;
 296    c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
 297
 298    brw_init_compile(brw, &c->func, c);
 299
 300    c->prog_data.barycentric_interp_modes =
 301       brw_compute_barycentric_interp_modes(brw, c->key.flat_shade,
 302                                            &fp->program);
 303
 304    if (prog && prog->_LinkedShaders[MESA_SHADER_FRAGMENT]) {
 305       if (!brw_wm_fs_emit(brw, c, prog))
 306          return false;
 307    } else {
 308       if (!c->instruction) {
 309          c->instruction = rzalloc_array(c, struct brw_wm_instruction, BRW_WM_MAX_INSN);
 310          c->prog_instructions = rzalloc_array(c, struct prog_instruction, BRW_WM_MAX_INSN);
 311          c->vreg = rzalloc_array(c, struct brw_wm_value, BRW_WM_MAX_VREG);
 312          c->refs = rzalloc_array(c, struct brw_wm_ref, BRW_WM_MAX_REF);
 313       }
 314
 315       /* Fallback for fixed function and ARB_fp shaders. */
 316       c->dispatch_width = 16;
 317       brw_wm_payload_setup(brw, c);
 318       brw_wm_non_glsl_emit(brw, c);
 319       c->prog_data.dispatch_width = 16;
 320    }
 321
 322    /* Scratch space is used for register spilling */
 323    if (c->last_scratch) {
 324       perf_debug("Fragment shader triggered register spilling.  "
 325                  "Try reducing the number of live scalar values to "
 326                  "improve performance.\n");
 327
 328       c->prog_data.total_scratch = brw_get_scratch_size(c->last_scratch);
 329
 330       brw_get_scratch_bo(intel, &brw->wm.scratch_bo,
 331                          c->prog_data.total_scratch * brw->max_wm_threads);
 332    }
 333
 334    if (unlikely(INTEL_DEBUG & DEBUG_WM))
 335       fprintf(stderr, "\n");
 336
 337    /* get the program
 338     */
 339    program = brw_get_program(&c->func, &program_size);
 340
 341    brw_upload_cache(&brw->cache, BRW_WM_PROG,
 342                     &c->key, sizeof(c->key),
 343                     program, program_size,
 344                     &c->prog_data, sizeof(c->prog_data),
 345                     &brw->wm.prog_offset, &brw->wm.prog_data);
 346
 347    return true;
 348 }
 349
 350 void
 351 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
 352                                    const struct gl_program *prog,
 353                                    struct brw_sampler_prog_key_data *key)
 354 {
 355    for (int i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 356       if (!prog->TexturesUsed[i])
 357          continue;
 358
 359       const struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
 360
 361       if (unit->_ReallyEnabled && unit->_Current->Target != GL_TEXTURE_BUFFER) {
 362          const struct gl_texture_object *t = unit->_Current;
 363          const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
 364          struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, i);
 365          int swizzles[SWIZZLE_NIL + 1] = {
 366             SWIZZLE_X,
 367             SWIZZLE_Y,
 368             SWIZZLE_Z,
 369             SWIZZLE_W,
 370             SWIZZLE_ZERO,
 371             SWIZZLE_ONE,
 372             SWIZZLE_NIL
 373          };
 374
 375          if (img->_BaseFormat == GL_DEPTH_COMPONENT ||
 376              img->_BaseFormat == GL_DEPTH_STENCIL) {
 377             /* We handle GL_DEPTH_TEXTURE_MODE here instead of as surface
 378              * format overrides because shadow comparison always returns the
 379              * result of the comparison in all channels anyway.
 380              */
 381             switch (t->DepthMode) {
 382             case GL_ALPHA:
 383                swizzles[0] = SWIZZLE_ZERO;
 384                swizzles[1] = SWIZZLE_ZERO;
 385                swizzles[2] = SWIZZLE_ZERO;
 386                swizzles[3] = SWIZZLE_X;
 387                break;
 388             case GL_LUMINANCE:
 389                swizzles[0] = SWIZZLE_X;
 390                swizzles[1] = SWIZZLE_X;
 391                swizzles[2] = SWIZZLE_X;
 392                swizzles[3] = SWIZZLE_ONE;
 393                break;
 394             case GL_INTENSITY:
 395                swizzles[0] = SWIZZLE_X;
 396                swizzles[1] = SWIZZLE_X;
 397                swizzles[2] = SWIZZLE_X;
 398                swizzles[3] = SWIZZLE_X;
 399                break;
 400             case GL_RED:
 401                swizzles[0] = SWIZZLE_X;
 402                swizzles[1] = SWIZZLE_ZERO;
 403                swizzles[2] = SWIZZLE_ZERO;
 404                swizzles[3] = SWIZZLE_ONE;
 405                break;
 406             }
 407          }
 408
 409          if (img->InternalFormat == GL_YCBCR_MESA) {
 410             key->yuvtex_mask |= 1 << i;
 411             if (img->TexFormat == MESA_FORMAT_YCBCR)
 412                 key->yuvtex_swap_mask |= 1 << i;
 413          }
 414
 415          key->swizzles[i] =
 416             MAKE_SWIZZLE4(swizzles[GET_SWZ(t->_Swizzle, 0)],
 417                           swizzles[GET_SWZ(t->_Swizzle, 1)],
 418                           swizzles[GET_SWZ(t->_Swizzle, 2)],
 419                           swizzles[GET_SWZ(t->_Swizzle, 3)]);
 420
 421          if (sampler->MinFilter != GL_NEAREST &&
 422              sampler->MagFilter != GL_NEAREST) {
 423             if (sampler->WrapS == GL_CLAMP)
 424                key->gl_clamp_mask[0] |= 1 << i;
 425             if (sampler->WrapT == GL_CLAMP)
 426                key->gl_clamp_mask[1] |= 1 << i;
 427             if (sampler->WrapR == GL_CLAMP)
 428                key->gl_clamp_mask[2] |= 1 << i;
 429          }
 430       }
 431       else {
 432          key->swizzles[i] = SWIZZLE_NOOP;
 433       }
 434    }
 435 }
 436
 437 static void brw_wm_populate_key( struct brw_context *brw,
 438                                  struct brw_wm_prog_key *key )
 439 {
 440    struct gl_context *ctx = &brw->intel.ctx;
 441    struct intel_context *intel = &brw->intel;
 442    /* BRW_NEW_FRAGMENT_PROGRAM */
 443    const struct brw_fragment_program *fp =
 444       (struct brw_fragment_program *)brw->fragment_program;
 445    const struct gl_program *prog = (struct gl_program *) brw->fragment_program;
 446    GLuint lookup = 0;
 447    GLuint line_aa;
 448    bool program_uses_dfdy = fp->program.UsesDFdy;
 449
 450    memset(key, 0, sizeof(*key));
 451
 452    /* Build the index for table lookup
 453     */
 454    if (intel->gen < 6) {
 455       /* _NEW_COLOR */
 456       if (fp->program.UsesKill || ctx->Color.AlphaEnabled)
 457          lookup |= IZ_PS_KILL_ALPHATEST_BIT;
 458
 459       if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
 460          lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
 461
 462       /* _NEW_DEPTH */
 463       if (ctx->Depth.Test)
 464          lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
 465
 466       if (ctx->Depth.Test && ctx->Depth.Mask) /* ?? */
 467          lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
 468
 469       /* _NEW_STENCIL */
 470       if (ctx->Stencil._Enabled) {
 471          lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
 472
 473          if (ctx->Stencil.WriteMask[0] ||
 474              ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
 475             lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
 476       }
 477       key->iz_lookup = lookup;
 478    }
 479
 480    line_aa = AA_NEVER;
 481
 482    /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
 483    if (ctx->Line.SmoothFlag) {
 484       if (brw->intel.reduced_primitive == GL_LINES) {
 485          line_aa = AA_ALWAYS;
 486       }
 487       else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
 488          if (ctx->Polygon.FrontMode == GL_LINE) {
 489             line_aa = AA_SOMETIMES;
 490
 491             if (ctx->Polygon.BackMode == GL_LINE ||
 492                 (ctx->Polygon.CullFlag &&
 493                  ctx->Polygon.CullFaceMode == GL_BACK))
 494                line_aa = AA_ALWAYS;
 495          }
 496          else if (ctx->Polygon.BackMode == GL_LINE) {
 497             line_aa = AA_SOMETIMES;
 498
 499             if ((ctx->Polygon.CullFlag &&
 500                  ctx->Polygon.CullFaceMode == GL_FRONT))
 501                line_aa = AA_ALWAYS;
 502          }
 503       }
 504    }
 505
 506    key->line_aa = line_aa;
 507    key->stats_wm = brw->intel.stats_wm;
 508
 509    /* BRW_NEW_WM_INPUT_DIMENSIONS */
 510    key->proj_attrib_mask = brw->wm.input_size_masks[4-1];
 511
 512    /* _NEW_LIGHT */
 513    key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
 514
 515    /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
 516    key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
 517
 518    /* _NEW_TEXTURE */
 519    brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
 520
 521    /* _NEW_BUFFERS */
 522    /*
 523     * Include the draw buffer origin and height so that we can calculate
 524     * fragment position values relative to the bottom left of the drawable,
 525     * from the incoming screen origin relative position we get as part of our
 526     * payload.
 527     *
 528     * This is only needed for the WM_WPOSXY opcode when the fragment program
 529     * uses the gl_FragCoord input.
 530     *
 531     * We could avoid recompiling by including this as a constant referenced by
 532     * our program, but if we were to do that it would also be nice to handle
 533     * getting that constant updated at batchbuffer submit time (when we
 534     * hold the lock and know where the buffer really is) rather than at emit
 535     * time when we don't hold the lock and are just guessing.  We could also
 536     * just avoid using this as key data if the program doesn't use
 537     * fragment.position.
 538     *
 539     * For DRI2 the origin_x/y will always be (0,0) but we still need the
 540     * drawable height in order to invert the Y axis.
 541     */
 542    if (fp->program.Base.InputsRead & FRAG_BIT_WPOS) {
 543       key->drawable_height = ctx->DrawBuffer->Height;
 544    }
 545
 546    if ((fp->program.Base.InputsRead & FRAG_BIT_WPOS) || program_uses_dfdy) {
 547       key->render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
 548    }
 549
 550    /* _NEW_BUFFERS */
 551    key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
 552
 553    /* CACHE_NEW_VS_PROG */
 554    key->vp_outputs_written = brw->vs.prog_data->outputs_written;
 555
 556    /* The unique fragment program ID */
 557    key->program_string_id = fp->id;
 558 }
 559
 560
 561 static void
 562 brw_upload_wm_prog(struct brw_context *brw)
 563 {
 564    struct intel_context *intel = &brw->intel;
 565    struct gl_context *ctx = &intel->ctx;
 566    struct brw_wm_prog_key key;
 567    struct brw_fragment_program *fp = (struct brw_fragment_program *)
 568       brw->fragment_program;
 569
 570    brw_wm_populate_key(brw, &key);
 571
 572    if (!brw_search_cache(&brw->cache, BRW_WM_PROG,
 573                          &key, sizeof(key),
 574                          &brw->wm.prog_offset, &brw->wm.prog_data)) {
 575       bool success = do_wm_prog(brw, ctx->Shader._CurrentFragmentProgram, fp,
 576                                 &key);
 577       (void) success;
 578       assert(success);
 579    }
 580 }
 581
 582
 583 const struct brw_tracked_state brw_wm_prog = {
 584    .dirty = {
 585       .mesa  = (_NEW_COLOR |
 586                 _NEW_DEPTH |
 587                 _NEW_STENCIL |
 588                 _NEW_POLYGON |
 589                 _NEW_LINE |
 590                 _NEW_LIGHT |
 591                 _NEW_FRAG_CLAMP |
 592                 _NEW_BUFFERS |
 593                 _NEW_TEXTURE),
 594       .brw   = (BRW_NEW_FRAGMENT_PROGRAM |
 595                 BRW_NEW_WM_INPUT_DIMENSIONS |
 596                 BRW_NEW_REDUCED_PRIMITIVE),
 597       .cache = CACHE_NEW_VS_PROG,
 598    },
 599    .emit = brw_upload_wm_prog
 600 };
 601