src/mesa/drivers/dri/i965/brw_wm.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "brw_context.h"
  33 #include "brw_wm.h"
  34 #include "brw_state.h"
  35 #include "main/formats.h"
  36 #include "main/samplerobj.h"
  37 #include "program/prog_parameter.h"
  38
  39 #include "../glsl/ralloc.h"
  40
  41 /** Return number of src args for given instruction */
  42 GLuint brw_wm_nr_args( GLuint opcode )
  43 {
  44    switch (opcode) {
  45    case WM_FRONTFACING:
  46    case WM_PIXELXY:
  47       return 0;
  48    case WM_CINTERP:
  49    case WM_WPOSXY:
  50    case WM_DELTAXY:
  51       return 1;
  52    case WM_LINTERP:
  53    case WM_PIXELW:
  54       return 2;
  55    case WM_FB_WRITE:
  56    case WM_PINTERP:
  57       return 3;
  58    default:
  59       assert(opcode < MAX_OPCODE);
  60       return _mesa_num_inst_src_regs(opcode);
  61    }
  62 }
  63
  64
  65 GLuint brw_wm_is_scalar_result( GLuint opcode )
  66 {
  67    switch (opcode) {
  68    case OPCODE_COS:
  69    case OPCODE_EX2:
  70    case OPCODE_LG2:
  71    case OPCODE_POW:
  72    case OPCODE_RCP:
  73    case OPCODE_RSQ:
  74    case OPCODE_SIN:
  75    case OPCODE_DP2:
  76    case OPCODE_DP3:
  77    case OPCODE_DP4:
  78    case OPCODE_DPH:
  79    case OPCODE_DST:
  80       return 1;
  81
  82    default:
  83       return 0;
  84    }
  85 }
  86
  87
  88 /**
  89  * Do GPU code generation for non-GLSL shader.  non-GLSL shaders have
  90  * no flow control instructions so we can more readily do SSA-style
  91  * optimizations.
  92  */
  93 static void
  94 brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
  95 {
  96    /* Augment fragment program.  Add instructions for pre- and
  97     * post-fragment-program tasks such as interpolation and fogging.
  98     */
  99    brw_wm_pass_fp(c);
 100
 101    /* Translate to intermediate representation.  Build register usage
 102     * chains.
 103     */
 104    brw_wm_pass0(c);
 105
 106    /* Dead code removal.
 107     */
 108    brw_wm_pass1(c);
 109
 110    /* Register allocation.
 111     * Divide by two because we operate on 16 pixels at a time and require
 112     * two GRF entries for each logical shader register.
 113     */
 114    c->grf_limit = BRW_WM_MAX_GRF / 2;
 115
 116    brw_wm_pass2(c);
 117
 118    /* how many general-purpose registers are used */
 119    c->prog_data.reg_blocks = brw_register_blocks(c->max_wm_grf);
 120
 121    /* Emit GEN4 code.
 122     */
 123    brw_wm_emit(c);
 124 }
 125
 126 void
 127 brw_wm_payload_setup(struct brw_context *brw,
 128                      struct brw_wm_compile *c)
 129 {
 130    struct intel_context *intel = &brw->intel;
 131    bool uses_depth = (c->fp->program.Base.InputsRead &
 132                       (1 << FRAG_ATTRIB_WPOS)) != 0;
 133
 134    if (intel->gen >= 6) {
 135       /* R0-1: masks, pixel X/Y coordinates. */
 136       c->nr_payload_regs = 2;
 137       /* R2: only for 32-pixel dispatch.*/
 138       /* R3-4: perspective pixel location barycentric */
 139       c->nr_payload_regs += 2;
 140       /* R5-6: perspective pixel location bary for dispatch width != 8 */
 141       if (c->dispatch_width == 16) {
 142          c->nr_payload_regs += 2;
 143       }
 144       /* R7-10: perspective centroid barycentric */
 145       /* R11-14: perspective sample barycentric */
 146       /* R15-18: linear pixel location barycentric */
 147       /* R19-22: linear centroid barycentric */
 148       /* R23-26: linear sample barycentric */
 149
 150       /* R27: interpolated depth if uses source depth */
 151       if (uses_depth) {
 152          c->source_depth_reg = c->nr_payload_regs;
 153          c->nr_payload_regs++;
 154          if (c->dispatch_width == 16) {
 155             /* R28: interpolated depth if not 8-wide. */
 156             c->nr_payload_regs++;
 157          }
 158       }
 159       /* R29: interpolated W set if GEN6_WM_USES_SOURCE_W.
 160        */
 161       if (uses_depth) {
 162          c->source_w_reg = c->nr_payload_regs;
 163          c->nr_payload_regs++;
 164          if (c->dispatch_width == 16) {
 165             /* R30: interpolated W if not 8-wide. */
 166             c->nr_payload_regs++;
 167          }
 168       }
 169       /* R31: MSAA position offsets. */
 170       /* R32-: bary for 32-pixel. */
 171       /* R58-59: interp W for 32-pixel. */
 172
 173       if (c->fp->program.Base.OutputsWritten &
 174           BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
 175          c->source_depth_to_render_target = GL_TRUE;
 176          c->computes_depth = GL_TRUE;
 177       }
 178    } else {
 179       brw_wm_lookup_iz(intel, c);
 180    }
 181 }
 182
 183 /**
 184  * All Mesa program -> GPU code generation goes through this function.
 185  * Depending on the instructions used (i.e. flow control instructions)
 186  * we'll use one of two code generators.
 187  */
 188 bool do_wm_prog(struct brw_context *brw,
 189                 struct gl_shader_program *prog,
 190                 struct brw_fragment_program *fp,
 191                 struct brw_wm_prog_key *key)
 192 {
 193    struct intel_context *intel = &brw->intel;
 194    struct brw_wm_compile *c;
 195    const GLuint *program;
 196    GLuint program_size;
 197
 198    c = brw->wm.compile_data;
 199    if (c == NULL) {
 200       brw->wm.compile_data = rzalloc(NULL, struct brw_wm_compile);
 201       c = brw->wm.compile_data;
 202       if (c == NULL) {
 203          /* Ouch - big out of memory problem.  Can't continue
 204           * without triggering a segfault, no way to signal,
 205           * so just return.
 206           */
 207          return false;
 208       }
 209       c->instruction = rzalloc_array(c, struct brw_wm_instruction, BRW_WM_MAX_INSN);
 210       c->prog_instructions = rzalloc_array(c, struct prog_instruction, BRW_WM_MAX_INSN);
 211       c->vreg = rzalloc_array(c, struct brw_wm_value, BRW_WM_MAX_VREG);
 212       c->refs = rzalloc_array(c, struct brw_wm_ref, BRW_WM_MAX_REF);
 213    } else {
 214       void *instruction = c->instruction;
 215       void *prog_instructions = c->prog_instructions;
 216       void *vreg = c->vreg;
 217       void *refs = c->refs;
 218       memset(c, 0, sizeof(*brw->wm.compile_data));
 219       c->instruction = instruction;
 220       c->prog_instructions = prog_instructions;
 221       c->vreg = vreg;
 222       c->refs = refs;
 223    }
 224    memcpy(&c->key, key, sizeof(*key));
 225
 226    c->fp = fp;
 227    c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
 228
 229    brw_init_compile(brw, &c->func, c);
 230
 231    if (prog && prog->FragmentProgram) {
 232       if (!brw_wm_fs_emit(brw, c, prog))
 233          return false;
 234    } else {
 235       /* Fallback for fixed function and ARB_fp shaders. */
 236       c->dispatch_width = 16;
 237       brw_wm_payload_setup(brw, c);
 238       brw_wm_non_glsl_emit(brw, c);
 239       c->prog_data.dispatch_width = 16;
 240    }
 241
 242    /* Scratch space is used for register spilling */
 243    if (c->last_scratch) {
 244       uint32_t total_scratch;
 245
 246       /* Per-thread scratch space is power-of-two sized. */
 247       for (c->prog_data.total_scratch = 1024;
 248            c->prog_data.total_scratch <= c->last_scratch;
 249            c->prog_data.total_scratch *= 2) {
 250          /* empty */
 251       }
 252       total_scratch = c->prog_data.total_scratch * brw->wm_max_threads;
 253
 254       if (brw->wm.scratch_bo && total_scratch > brw->wm.scratch_bo->size) {
 255          drm_intel_bo_unreference(brw->wm.scratch_bo);
 256          brw->wm.scratch_bo = NULL;
 257       }
 258       if (brw->wm.scratch_bo == NULL) {
 259          brw->wm.scratch_bo = drm_intel_bo_alloc(intel->bufmgr,
 260                                                  "wm scratch",
 261                                                  total_scratch,
 262                                                  4096);
 263       }
 264    }
 265    else {
 266       c->prog_data.total_scratch = 0;
 267    }
 268
 269    if (unlikely(INTEL_DEBUG & DEBUG_WM))
 270       fprintf(stderr, "\n");
 271
 272    /* get the program
 273     */
 274    program = brw_get_program(&c->func, &program_size);
 275
 276    brw_upload_cache(&brw->cache, BRW_WM_PROG,
 277                     &c->key, sizeof(c->key),
 278                     program, program_size,
 279                     &c->prog_data, sizeof(c->prog_data),
 280                     &brw->wm.prog_offset, &brw->wm.prog_data);
 281
 282    return true;
 283 }
 284
 285
 286
 287 static void brw_wm_populate_key( struct brw_context *brw,
 288                                  struct brw_wm_prog_key *key )
 289 {
 290    struct gl_context *ctx = &brw->intel.ctx;
 291    /* BRW_NEW_FRAGMENT_PROGRAM */
 292    const struct brw_fragment_program *fp =
 293       (struct brw_fragment_program *)brw->fragment_program;
 294    GLuint lookup = 0;
 295    GLuint line_aa;
 296    GLuint i;
 297
 298    memset(key, 0, sizeof(*key));
 299
 300    /* Build the index for table lookup
 301     */
 302    /* _NEW_COLOR */
 303    key->alpha_test = ctx->Color.AlphaEnabled;
 304    if (fp->program.UsesKill ||
 305        ctx->Color.AlphaEnabled)
 306       lookup |= IZ_PS_KILL_ALPHATEST_BIT;
 307
 308    if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
 309       lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
 310
 311    /* _NEW_DEPTH */
 312    if (ctx->Depth.Test)
 313       lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
 314
 315    if (ctx->Depth.Test &&
 316        ctx->Depth.Mask) /* ?? */
 317       lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
 318
 319    /* _NEW_STENCIL */
 320    if (ctx->Stencil._Enabled) {
 321       lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
 322
 323       if (ctx->Stencil.WriteMask[0] ||
 324           ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
 325          lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
 326    }
 327
 328    line_aa = AA_NEVER;
 329
 330    /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
 331    if (ctx->Line.SmoothFlag) {
 332       if (brw->intel.reduced_primitive == GL_LINES) {
 333          line_aa = AA_ALWAYS;
 334       }
 335       else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
 336          if (ctx->Polygon.FrontMode == GL_LINE) {
 337             line_aa = AA_SOMETIMES;
 338
 339             if (ctx->Polygon.BackMode == GL_LINE ||
 340                 (ctx->Polygon.CullFlag &&
 341                  ctx->Polygon.CullFaceMode == GL_BACK))
 342                line_aa = AA_ALWAYS;
 343          }
 344          else if (ctx->Polygon.BackMode == GL_LINE) {
 345             line_aa = AA_SOMETIMES;
 346
 347             if ((ctx->Polygon.CullFlag &&
 348                  ctx->Polygon.CullFaceMode == GL_FRONT))
 349                line_aa = AA_ALWAYS;
 350          }
 351       }
 352    }
 353
 354    key->iz_lookup = lookup;
 355    key->line_aa = line_aa;
 356    key->stats_wm = brw->intel.stats_wm;
 357
 358    /* BRW_NEW_WM_INPUT_DIMENSIONS */
 359    key->proj_attrib_mask = brw->wm.input_size_masks[4-1];
 360
 361    /* _NEW_LIGHT */
 362    key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
 363
 364    /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
 365    key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
 366
 367    /* _NEW_TEXTURE */
 368    for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
 369       const struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
 370
 371       if (unit->_ReallyEnabled) {
 372          const struct gl_texture_object *t = unit->_Current;
 373          const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
 374          struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, i);
 375          int swizzles[SWIZZLE_NIL + 1] = {
 376             SWIZZLE_X,
 377             SWIZZLE_Y,
 378             SWIZZLE_Z,
 379             SWIZZLE_W,
 380             SWIZZLE_ZERO,
 381             SWIZZLE_ONE,
 382             SWIZZLE_NIL
 383          };
 384
 385          /* GL_DEPTH_TEXTURE_MODE is normally handled through
 386           * brw_wm_surface_state, but it applies to shadow compares as
 387           * well and our shadow compares always return the result in
 388           * all 4 channels.
 389           */
 390          if (sampler->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB) {
 391             key->compare_funcs[i] = sampler->CompareFunc;
 392
 393             if (sampler->DepthMode == GL_ALPHA) {
 394                swizzles[0] = SWIZZLE_ZERO;
 395                swizzles[1] = SWIZZLE_ZERO;
 396                swizzles[2] = SWIZZLE_ZERO;
 397             } else if (sampler->DepthMode == GL_LUMINANCE) {
 398                swizzles[3] = SWIZZLE_ONE;
 399             } else if (sampler->DepthMode == GL_RED) {
 400                /* See table 3.23 of the GL 3.0 spec. */
 401                swizzles[1] = SWIZZLE_ZERO;
 402                swizzles[2] = SWIZZLE_ZERO;
 403                swizzles[3] = SWIZZLE_ONE;
 404             }
 405          }
 406
 407          if (img->InternalFormat == GL_YCBCR_MESA) {
 408             key->yuvtex_mask |= 1 << i;
 409             if (img->TexFormat == MESA_FORMAT_YCBCR)
 410                 key->yuvtex_swap_mask |= 1 << i;
 411          }
 412
 413          key->tex_swizzles[i] =
 414             MAKE_SWIZZLE4(swizzles[GET_SWZ(t->_Swizzle, 0)],
 415                           swizzles[GET_SWZ(t->_Swizzle, 1)],
 416                           swizzles[GET_SWZ(t->_Swizzle, 2)],
 417                           swizzles[GET_SWZ(t->_Swizzle, 3)]);
 418
 419          if (sampler->MinFilter != GL_NEAREST &&
 420              sampler->MagFilter != GL_NEAREST) {
 421             if (sampler->WrapS == GL_CLAMP)
 422                key->gl_clamp_mask[0] |= 1 << i;
 423             if (sampler->WrapT == GL_CLAMP)
 424                key->gl_clamp_mask[1] |= 1 << i;
 425             if (sampler->WrapR == GL_CLAMP)
 426                key->gl_clamp_mask[2] |= 1 << i;
 427          }
 428       }
 429       else {
 430          key->tex_swizzles[i] = SWIZZLE_NOOP;
 431       }
 432    }
 433
 434    /* _NEW_BUFFERS */
 435    /*
 436     * Include the draw buffer origin and height so that we can calculate
 437     * fragment position values relative to the bottom left of the drawable,
 438     * from the incoming screen origin relative position we get as part of our
 439     * payload.
 440     *
 441     * This is only needed for the WM_WPOSXY opcode when the fragment program
 442     * uses the gl_FragCoord input.
 443     *
 444     * We could avoid recompiling by including this as a constant referenced by
 445     * our program, but if we were to do that it would also be nice to handle
 446     * getting that constant updated at batchbuffer submit time (when we
 447     * hold the lock and know where the buffer really is) rather than at emit
 448     * time when we don't hold the lock and are just guessing.  We could also
 449     * just avoid using this as key data if the program doesn't use
 450     * fragment.position.
 451     *
 452     * For DRI2 the origin_x/y will always be (0,0) but we still need the
 453     * drawable height in order to invert the Y axis.
 454     */
 455    if (fp->program.Base.InputsRead & FRAG_BIT_WPOS) {
 456       key->drawable_height = ctx->DrawBuffer->Height;
 457       key->render_to_fbo = ctx->DrawBuffer->Name != 0;
 458    }
 459
 460    /* _NEW_BUFFERS */
 461    key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
 462
 463    /* CACHE_NEW_VS_PROG */
 464    key->vp_outputs_written = brw->vs.prog_data->outputs_written;
 465
 466    /* The unique fragment program ID */
 467    key->program_string_id = fp->id;
 468 }
 469
 470
 471 static void brw_prepare_wm_prog(struct brw_context *brw)
 472 {
 473    struct intel_context *intel = &brw->intel;
 474    struct gl_context *ctx = &intel->ctx;
 475    struct brw_wm_prog_key key;
 476    struct brw_fragment_program *fp = (struct brw_fragment_program *)
 477       brw->fragment_program;
 478
 479    brw_wm_populate_key(brw, &key);
 480
 481    if (!brw_search_cache(&brw->cache, BRW_WM_PROG,
 482                          &key, sizeof(key),
 483                          &brw->wm.prog_offset, &brw->wm.prog_data)) {
 484       bool success = do_wm_prog(brw, ctx->Shader.CurrentFragmentProgram, fp,
 485                                 &key);
 486       assert(success);
 487    }
 488 }
 489
 490
 491 const struct brw_tracked_state brw_wm_prog = {
 492    .dirty = {
 493       .mesa  = (_NEW_COLOR |
 494                 _NEW_DEPTH |
 495                 _NEW_STENCIL |
 496                 _NEW_POLYGON |
 497                 _NEW_LINE |
 498                 _NEW_LIGHT |
 499                 _NEW_FRAG_CLAMP |
 500                 _NEW_BUFFERS |
 501                 _NEW_TEXTURE),
 502       .brw   = (BRW_NEW_FRAGMENT_PROGRAM |
 503                 BRW_NEW_WM_INPUT_DIMENSIONS |
 504                 BRW_NEW_REDUCED_PRIMITIVE),
 505       .cache = CACHE_NEW_VS_PROG,
 506    },
 507    .prepare = brw_prepare_wm_prog
 508 };
 509