i965: Compute dFdy() correctly for FBOs.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32 #include "brw_context.h"
33 #include "brw_wm.h"
34 #include "brw_state.h"
35 #include "main/formats.h"
36 #include "main/fbobject.h"
37 #include "main/samplerobj.h"
38 #include "program/prog_parameter.h"
39
40 #include "glsl/ralloc.h"
41
42 /** Return number of src args for given instruction */
43 GLuint brw_wm_nr_args( GLuint opcode )
44 {
45 switch (opcode) {
46 case WM_FRONTFACING:
47 case WM_PIXELXY:
48 return 0;
49 case WM_CINTERP:
50 case WM_WPOSXY:
51 case WM_DELTAXY:
52 return 1;
53 case WM_LINTERP:
54 case WM_PIXELW:
55 return 2;
56 case WM_FB_WRITE:
57 case WM_PINTERP:
58 return 3;
59 default:
60 assert(opcode < MAX_OPCODE);
61 return _mesa_num_inst_src_regs(opcode);
62 }
63 }
64
65
66 GLuint brw_wm_is_scalar_result( GLuint opcode )
67 {
68 switch (opcode) {
69 case OPCODE_COS:
70 case OPCODE_EX2:
71 case OPCODE_LG2:
72 case OPCODE_POW:
73 case OPCODE_RCP:
74 case OPCODE_RSQ:
75 case OPCODE_SIN:
76 case OPCODE_DP2:
77 case OPCODE_DP3:
78 case OPCODE_DP4:
79 case OPCODE_DPH:
80 case OPCODE_DST:
81 return 1;
82
83 default:
84 return 0;
85 }
86 }
87
88
89 /**
90 * Do GPU code generation for non-GLSL shader. non-GLSL shaders have
91 * no flow control instructions so we can more readily do SSA-style
92 * optimizations.
93 */
94 static void
95 brw_wm_non_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c)
96 {
97 /* Augment fragment program. Add instructions for pre- and
98 * post-fragment-program tasks such as interpolation and fogging.
99 */
100 brw_wm_pass_fp(c);
101
102 /* Translate to intermediate representation. Build register usage
103 * chains.
104 */
105 brw_wm_pass0(c);
106
107 /* Dead code removal.
108 */
109 brw_wm_pass1(c);
110
111 /* Register allocation.
112 * Divide by two because we operate on 16 pixels at a time and require
113 * two GRF entries for each logical shader register.
114 */
115 c->grf_limit = BRW_WM_MAX_GRF / 2;
116
117 brw_wm_pass2(c);
118
119 /* how many general-purpose registers are used */
120 c->prog_data.reg_blocks = brw_register_blocks(c->max_wm_grf);
121
122 /* Emit GEN4 code.
123 */
124 brw_wm_emit(c);
125 }
126
127
128 /**
129 * Return a bitfield where bit n is set if barycentric interpolation mode n
130 * (see enum brw_wm_barycentric_interp_mode) is needed by the fragment shader.
131 */
132 static unsigned
133 brw_compute_barycentric_interp_modes(bool shade_model_flat,
134 const struct gl_fragment_program *fprog)
135 {
136 unsigned barycentric_interp_modes = 0;
137 int attr;
138
139 /* Loop through all fragment shader inputs to figure out what interpolation
140 * modes are in use, and set the appropriate bits in
141 * barycentric_interp_modes.
142 */
143 for (attr = 0; attr < FRAG_ATTRIB_MAX; ++attr) {
144 enum glsl_interp_qualifier interp_qualifier =
145 fprog->InterpQualifier[attr];
146 bool is_gl_Color = attr == FRAG_ATTRIB_COL0 || attr == FRAG_ATTRIB_COL1;
147
148 /* Ignore unused inputs. */
149 if (!(fprog->Base.InputsRead & BITFIELD64_BIT(attr)))
150 continue;
151
152 /* Ignore WPOS and FACE, because they don't require interpolation. */
153 if (attr == FRAG_ATTRIB_WPOS || attr == FRAG_ATTRIB_FACE)
154 continue;
155
156 if (interp_qualifier == INTERP_QUALIFIER_NOPERSPECTIVE) {
157 barycentric_interp_modes |=
158 1 << BRW_WM_NONPERSPECTIVE_PIXEL_BARYCENTRIC;
159 } else if (interp_qualifier == INTERP_QUALIFIER_SMOOTH ||
160 (!(shade_model_flat && is_gl_Color) &&
161 interp_qualifier == INTERP_QUALIFIER_NONE)) {
162 barycentric_interp_modes |=
163 1 << BRW_WM_PERSPECTIVE_PIXEL_BARYCENTRIC;
164 }
165 }
166
167 return barycentric_interp_modes;
168 }
169
170
171 void
172 brw_wm_payload_setup(struct brw_context *brw,
173 struct brw_wm_compile *c)
174 {
175 struct intel_context *intel = &brw->intel;
176 bool uses_depth = (c->fp->program.Base.InputsRead &
177 (1 << FRAG_ATTRIB_WPOS)) != 0;
178 unsigned barycentric_interp_modes = c->prog_data.barycentric_interp_modes;
179 int i;
180
181 if (intel->gen >= 6) {
182 /* R0-1: masks, pixel X/Y coordinates. */
183 c->nr_payload_regs = 2;
184 /* R2: only for 32-pixel dispatch.*/
185
186 /* R3-26: barycentric interpolation coordinates. These appear in the
187 * same order that they appear in the brw_wm_barycentric_interp_mode
188 * enum. Each set of coordinates occupies 2 registers if dispatch width
189 * == 8 and 4 registers if dispatch width == 16. Coordinates only
190 * appear if they were enabled using the "Barycentric Interpolation
191 * Mode" bits in WM_STATE.
192 */
193 for (i = 0; i < BRW_WM_BARYCENTRIC_INTERP_MODE_COUNT; ++i) {
194 if (barycentric_interp_modes & (1 << i)) {
195 c->barycentric_coord_reg[i] = c->nr_payload_regs;
196 c->nr_payload_regs += 2;
197 if (c->dispatch_width == 16) {
198 c->nr_payload_regs += 2;
199 }
200 }
201 }
202
203 /* R27: interpolated depth if uses source depth */
204 if (uses_depth) {
205 c->source_depth_reg = c->nr_payload_regs;
206 c->nr_payload_regs++;
207 if (c->dispatch_width == 16) {
208 /* R28: interpolated depth if not 8-wide. */
209 c->nr_payload_regs++;
210 }
211 }
212 /* R29: interpolated W set if GEN6_WM_USES_SOURCE_W.
213 */
214 if (uses_depth) {
215 c->source_w_reg = c->nr_payload_regs;
216 c->nr_payload_regs++;
217 if (c->dispatch_width == 16) {
218 /* R30: interpolated W if not 8-wide. */
219 c->nr_payload_regs++;
220 }
221 }
222 /* R31: MSAA position offsets. */
223 /* R32-: bary for 32-pixel. */
224 /* R58-59: interp W for 32-pixel. */
225
226 if (c->fp->program.Base.OutputsWritten &
227 BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
228 c->source_depth_to_render_target = true;
229 c->computes_depth = true;
230 }
231 } else {
232 brw_wm_lookup_iz(intel, c);
233 }
234 }
235
236 /**
237 * All Mesa program -> GPU code generation goes through this function.
238 * Depending on the instructions used (i.e. flow control instructions)
239 * we'll use one of two code generators.
240 */
241 bool do_wm_prog(struct brw_context *brw,
242 struct gl_shader_program *prog,
243 struct brw_fragment_program *fp,
244 struct brw_wm_prog_key *key)
245 {
246 struct intel_context *intel = &brw->intel;
247 struct brw_wm_compile *c;
248 const GLuint *program;
249 GLuint program_size;
250
251 c = brw->wm.compile_data;
252 if (c == NULL) {
253 brw->wm.compile_data = rzalloc(NULL, struct brw_wm_compile);
254 c = brw->wm.compile_data;
255 if (c == NULL) {
256 /* Ouch - big out of memory problem. Can't continue
257 * without triggering a segfault, no way to signal,
258 * so just return.
259 */
260 return false;
261 }
262 } else {
263 void *instruction = c->instruction;
264 void *prog_instructions = c->prog_instructions;
265 void *vreg = c->vreg;
266 void *refs = c->refs;
267 memset(c, 0, sizeof(*brw->wm.compile_data));
268 c->instruction = instruction;
269 c->prog_instructions = prog_instructions;
270 c->vreg = vreg;
271 c->refs = refs;
272 }
273 memcpy(&c->key, key, sizeof(*key));
274
275 c->fp = fp;
276 c->env_param = brw->intel.ctx.FragmentProgram.Parameters;
277
278 brw_init_compile(brw, &c->func, c);
279
280 c->prog_data.barycentric_interp_modes =
281 brw_compute_barycentric_interp_modes(c->key.flat_shade, &fp->program);
282
283 if (prog && prog->_LinkedShaders[MESA_SHADER_FRAGMENT]) {
284 if (!brw_wm_fs_emit(brw, c, prog))
285 return false;
286 } else {
287 if (!c->instruction) {
288 c->instruction = rzalloc_array(c, struct brw_wm_instruction, BRW_WM_MAX_INSN);
289 c->prog_instructions = rzalloc_array(c, struct prog_instruction, BRW_WM_MAX_INSN);
290 c->vreg = rzalloc_array(c, struct brw_wm_value, BRW_WM_MAX_VREG);
291 c->refs = rzalloc_array(c, struct brw_wm_ref, BRW_WM_MAX_REF);
292 }
293
294 /* Fallback for fixed function and ARB_fp shaders. */
295 c->dispatch_width = 16;
296 brw_wm_payload_setup(brw, c);
297 brw_wm_non_glsl_emit(brw, c);
298 c->prog_data.dispatch_width = 16;
299 }
300
301 /* Scratch space is used for register spilling */
302 if (c->last_scratch) {
303 c->prog_data.total_scratch = brw_get_scratch_size(c->last_scratch);
304
305 brw_get_scratch_bo(intel, &brw->wm.scratch_bo,
306 c->prog_data.total_scratch * brw->max_wm_threads);
307 }
308
309 if (unlikely(INTEL_DEBUG & DEBUG_WM))
310 fprintf(stderr, "\n");
311
312 /* get the program
313 */
314 program = brw_get_program(&c->func, &program_size);
315
316 brw_upload_cache(&brw->cache, BRW_WM_PROG,
317 &c->key, sizeof(c->key),
318 program, program_size,
319 &c->prog_data, sizeof(c->prog_data),
320 &brw->wm.prog_offset, &brw->wm.prog_data);
321
322 return true;
323 }
324
325 void
326 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
327 struct brw_sampler_prog_key_data *key,
328 int i)
329 {
330 const struct gl_texture_unit *unit = &ctx->Texture.Unit[i];
331
332 if (unit->_ReallyEnabled && unit->_Current->Target != GL_TEXTURE_BUFFER) {
333 const struct gl_texture_object *t = unit->_Current;
334 const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
335 struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, i);
336 int swizzles[SWIZZLE_NIL + 1] = {
337 SWIZZLE_X,
338 SWIZZLE_Y,
339 SWIZZLE_Z,
340 SWIZZLE_W,
341 SWIZZLE_ZERO,
342 SWIZZLE_ONE,
343 SWIZZLE_NIL
344 };
345
346 if (img->_BaseFormat == GL_DEPTH_COMPONENT ||
347 img->_BaseFormat == GL_DEPTH_STENCIL) {
348 if (sampler->CompareMode == GL_COMPARE_R_TO_TEXTURE_ARB)
349 key->compare_funcs[i] = sampler->CompareFunc;
350
351 /* We handle GL_DEPTH_TEXTURE_MODE here instead of as surface format
352 * overrides because shadow comparison always returns the result of
353 * the comparison in all channels anyway.
354 */
355 switch (sampler->DepthMode) {
356 case GL_ALPHA:
357 swizzles[0] = SWIZZLE_ZERO;
358 swizzles[1] = SWIZZLE_ZERO;
359 swizzles[2] = SWIZZLE_ZERO;
360 swizzles[3] = SWIZZLE_X;
361 break;
362 case GL_LUMINANCE:
363 swizzles[0] = SWIZZLE_X;
364 swizzles[1] = SWIZZLE_X;
365 swizzles[2] = SWIZZLE_X;
366 swizzles[3] = SWIZZLE_ONE;
367 break;
368 case GL_INTENSITY:
369 swizzles[0] = SWIZZLE_X;
370 swizzles[1] = SWIZZLE_X;
371 swizzles[2] = SWIZZLE_X;
372 swizzles[3] = SWIZZLE_X;
373 break;
374 case GL_RED:
375 swizzles[0] = SWIZZLE_X;
376 swizzles[1] = SWIZZLE_ZERO;
377 swizzles[2] = SWIZZLE_ZERO;
378 swizzles[3] = SWIZZLE_ONE;
379 break;
380 }
381 }
382
383 if (img->InternalFormat == GL_YCBCR_MESA) {
384 key->yuvtex_mask |= 1 << i;
385 if (img->TexFormat == MESA_FORMAT_YCBCR)
386 key->yuvtex_swap_mask |= 1 << i;
387 }
388
389 key->swizzles[i] =
390 MAKE_SWIZZLE4(swizzles[GET_SWZ(t->_Swizzle, 0)],
391 swizzles[GET_SWZ(t->_Swizzle, 1)],
392 swizzles[GET_SWZ(t->_Swizzle, 2)],
393 swizzles[GET_SWZ(t->_Swizzle, 3)]);
394
395 if (sampler->MinFilter != GL_NEAREST &&
396 sampler->MagFilter != GL_NEAREST) {
397 if (sampler->WrapS == GL_CLAMP)
398 key->gl_clamp_mask[0] |= 1 << i;
399 if (sampler->WrapT == GL_CLAMP)
400 key->gl_clamp_mask[1] |= 1 << i;
401 if (sampler->WrapR == GL_CLAMP)
402 key->gl_clamp_mask[2] |= 1 << i;
403 }
404 }
405 else {
406 key->swizzles[i] = SWIZZLE_NOOP;
407 }
408 }
409
410 static void brw_wm_populate_key( struct brw_context *brw,
411 struct brw_wm_prog_key *key )
412 {
413 struct gl_context *ctx = &brw->intel.ctx;
414 struct intel_context *intel = &brw->intel;
415 /* BRW_NEW_FRAGMENT_PROGRAM */
416 const struct brw_fragment_program *fp =
417 (struct brw_fragment_program *)brw->fragment_program;
418 const struct gl_program *prog = (struct gl_program *) brw->fragment_program;
419 GLuint lookup = 0;
420 GLuint line_aa;
421 GLuint i;
422
423 /* As a temporary measure we assume that all programs use dFdy() (and hence
424 * need to be compiled differently depending on whether we're rendering to
425 * an FBO). FIXME: set this bool correctly based on the contents of the
426 * program.
427 */
428 bool program_uses_dfdy = true;
429
430 memset(key, 0, sizeof(*key));
431
432 /* Build the index for table lookup
433 */
434 /* _NEW_COLOR */
435 key->alpha_test = ctx->Color.AlphaEnabled;
436
437 if (intel->gen < 6) {
438 if (fp->program.UsesKill || ctx->Color.AlphaEnabled)
439 lookup |= IZ_PS_KILL_ALPHATEST_BIT;
440
441 if (fp->program.Base.OutputsWritten & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
442 lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
443
444 /* _NEW_DEPTH */
445 if (ctx->Depth.Test)
446 lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
447
448 if (ctx->Depth.Test && ctx->Depth.Mask) /* ?? */
449 lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
450
451 /* _NEW_STENCIL */
452 if (ctx->Stencil._Enabled) {
453 lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
454
455 if (ctx->Stencil.WriteMask[0] ||
456 ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
457 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
458 }
459 key->iz_lookup = lookup;
460 }
461
462 line_aa = AA_NEVER;
463
464 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
465 if (ctx->Line.SmoothFlag) {
466 if (brw->intel.reduced_primitive == GL_LINES) {
467 line_aa = AA_ALWAYS;
468 }
469 else if (brw->intel.reduced_primitive == GL_TRIANGLES) {
470 if (ctx->Polygon.FrontMode == GL_LINE) {
471 line_aa = AA_SOMETIMES;
472
473 if (ctx->Polygon.BackMode == GL_LINE ||
474 (ctx->Polygon.CullFlag &&
475 ctx->Polygon.CullFaceMode == GL_BACK))
476 line_aa = AA_ALWAYS;
477 }
478 else if (ctx->Polygon.BackMode == GL_LINE) {
479 line_aa = AA_SOMETIMES;
480
481 if ((ctx->Polygon.CullFlag &&
482 ctx->Polygon.CullFaceMode == GL_FRONT))
483 line_aa = AA_ALWAYS;
484 }
485 }
486 }
487
488 key->line_aa = line_aa;
489 key->stats_wm = brw->intel.stats_wm;
490
491 /* BRW_NEW_WM_INPUT_DIMENSIONS */
492 key->proj_attrib_mask = brw->wm.input_size_masks[4-1];
493
494 /* _NEW_LIGHT */
495 key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
496
497 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
498 key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
499
500 /* _NEW_TEXTURE */
501 for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
502 if (prog->TexturesUsed[i])
503 brw_populate_sampler_prog_key_data(ctx, &key->tex, i);
504 }
505
506 /* _NEW_BUFFERS */
507 /*
508 * Include the draw buffer origin and height so that we can calculate
509 * fragment position values relative to the bottom left of the drawable,
510 * from the incoming screen origin relative position we get as part of our
511 * payload.
512 *
513 * This is only needed for the WM_WPOSXY opcode when the fragment program
514 * uses the gl_FragCoord input.
515 *
516 * We could avoid recompiling by including this as a constant referenced by
517 * our program, but if we were to do that it would also be nice to handle
518 * getting that constant updated at batchbuffer submit time (when we
519 * hold the lock and know where the buffer really is) rather than at emit
520 * time when we don't hold the lock and are just guessing. We could also
521 * just avoid using this as key data if the program doesn't use
522 * fragment.position.
523 *
524 * For DRI2 the origin_x/y will always be (0,0) but we still need the
525 * drawable height in order to invert the Y axis.
526 */
527 if (fp->program.Base.InputsRead & FRAG_BIT_WPOS) {
528 key->drawable_height = ctx->DrawBuffer->Height;
529 }
530
531 if ((fp->program.Base.InputsRead & FRAG_BIT_WPOS) || program_uses_dfdy) {
532 key->render_to_fbo = _mesa_is_user_fbo(ctx->DrawBuffer);
533 }
534
535 /* _NEW_BUFFERS */
536 key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
537
538 /* CACHE_NEW_VS_PROG */
539 key->vp_outputs_written = brw->vs.prog_data->outputs_written;
540
541 /* The unique fragment program ID */
542 key->program_string_id = fp->id;
543 }
544
545
546 static void
547 brw_upload_wm_prog(struct brw_context *brw)
548 {
549 struct intel_context *intel = &brw->intel;
550 struct gl_context *ctx = &intel->ctx;
551 struct brw_wm_prog_key key;
552 struct brw_fragment_program *fp = (struct brw_fragment_program *)
553 brw->fragment_program;
554
555 brw_wm_populate_key(brw, &key);
556
557 if (!brw_search_cache(&brw->cache, BRW_WM_PROG,
558 &key, sizeof(key),
559 &brw->wm.prog_offset, &brw->wm.prog_data)) {
560 bool success = do_wm_prog(brw, ctx->Shader._CurrentFragmentProgram, fp,
561 &key);
562 (void) success;
563 assert(success);
564 }
565 }
566
567
568 const struct brw_tracked_state brw_wm_prog = {
569 .dirty = {
570 .mesa = (_NEW_COLOR |
571 _NEW_DEPTH |
572 _NEW_STENCIL |
573 _NEW_POLYGON |
574 _NEW_LINE |
575 _NEW_LIGHT |
576 _NEW_FRAG_CLAMP |
577 _NEW_BUFFERS |
578 _NEW_TEXTURE),
579 .brw = (BRW_NEW_FRAGMENT_PROGRAM |
580 BRW_NEW_WM_INPUT_DIMENSIONS |
581 BRW_NEW_REDUCED_PRIMITIVE),
582 .cache = CACHE_NEW_VS_PROG,
583 },
584 .emit = brw_upload_wm_prog
585 };
586