2 * Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 * Intel funded Tungsten Graphics to
4 * develop this 3D driver.
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 #include "brw_context.h"
28 #include "brw_state.h"
29 #include "main/enums.h"
30 #include "main/formats.h"
31 #include "main/fbobject.h"
32 #include "main/samplerobj.h"
33 #include "main/framebuffer.h"
34 #include "program/prog_parameter.h"
35 #include "program/program.h"
36 #include "intel_mipmap_tree.h"
37 #include "intel_image.h"
38 #include "compiler/brw_nir.h"
39 #include "brw_program.h"
41 #include "util/ralloc.h"
44 assign_fs_binding_table_offsets(const struct gen_device_info
*devinfo
,
45 const struct gl_program
*prog
,
46 const struct brw_wm_prog_key
*key
,
47 struct brw_wm_prog_data
*prog_data
)
49 uint32_t next_binding_table_offset
= 0;
51 /* If there are no color regions, we still perform an FB write to a null
52 * renderbuffer, which we place at surface index 0.
54 prog_data
->binding_table
.render_target_start
= next_binding_table_offset
;
55 next_binding_table_offset
+= MAX2(key
->nr_color_regions
, 1);
57 next_binding_table_offset
=
58 brw_assign_common_binding_table_offsets(devinfo
, prog
, &prog_data
->base
,
59 next_binding_table_offset
);
61 if (prog
->nir
->info
.outputs_read
&& !key
->coherent_fb_fetch
) {
62 prog_data
->binding_table
.render_target_read_start
=
63 next_binding_table_offset
;
64 next_binding_table_offset
+= key
->nr_color_regions
;
69 brw_wm_debug_recompile(struct brw_context
*brw
, struct gl_program
*prog
,
70 const struct brw_wm_prog_key
*key
)
72 perf_debug("Recompiling fragment shader for program %d\n", prog
->Id
);
75 const struct brw_wm_prog_key
*old_key
=
76 brw_find_previous_compile(&brw
->cache
, BRW_CACHE_FS_PROG
,
77 key
->program_string_id
);
80 perf_debug(" Didn't find previous compile in the shader cache for debug\n");
84 found
|= key_debug(brw
, "alphatest, computed depth, depth test, or "
86 old_key
->iz_lookup
, key
->iz_lookup
);
87 found
|= key_debug(brw
, "depth statistics",
88 old_key
->stats_wm
, key
->stats_wm
);
89 found
|= key_debug(brw
, "flat shading",
90 old_key
->flat_shade
, key
->flat_shade
);
91 found
|= key_debug(brw
, "number of color buffers",
92 old_key
->nr_color_regions
, key
->nr_color_regions
);
93 found
|= key_debug(brw
, "MRT alpha test or alpha-to-coverage",
94 old_key
->replicate_alpha
, key
->replicate_alpha
);
95 found
|= key_debug(brw
, "fragment color clamping",
96 old_key
->clamp_fragment_color
, key
->clamp_fragment_color
);
97 found
|= key_debug(brw
, "per-sample interpolation",
98 old_key
->persample_interp
, key
->persample_interp
);
99 found
|= key_debug(brw
, "multisampled FBO",
100 old_key
->multisample_fbo
, key
->multisample_fbo
);
101 found
|= key_debug(brw
, "frag coord adds sample pos",
102 old_key
->frag_coord_adds_sample_pos
,
103 key
->frag_coord_adds_sample_pos
);
104 found
|= key_debug(brw
, "line smoothing",
105 old_key
->line_aa
, key
->line_aa
);
106 found
|= key_debug(brw
, "high quality derivatives",
107 old_key
->high_quality_derivatives
,
108 key
->high_quality_derivatives
);
109 found
|= key_debug(brw
, "force dual color blending",
110 old_key
->force_dual_color_blend
,
111 key
->force_dual_color_blend
);
112 found
|= key_debug(brw
, "coherent fb fetch",
113 old_key
->coherent_fb_fetch
, key
->coherent_fb_fetch
);
115 found
|= key_debug(brw
, "input slots valid",
116 old_key
->input_slots_valid
, key
->input_slots_valid
);
117 found
|= key_debug(brw
, "mrt alpha test function",
118 old_key
->alpha_test_func
, key
->alpha_test_func
);
119 found
|= key_debug(brw
, "mrt alpha test reference value",
120 old_key
->alpha_test_ref
, key
->alpha_test_ref
);
122 found
|= brw_debug_recompile_sampler_key(brw
, &old_key
->tex
, &key
->tex
);
125 perf_debug(" Something else\n");
130 * All Mesa program -> GPU code generation goes through this function.
131 * Depending on the instructions used (i.e. flow control instructions)
132 * we'll use one of two code generators.
135 brw_codegen_wm_prog(struct brw_context
*brw
,
136 struct brw_program
*fp
,
137 struct brw_wm_prog_key
*key
,
138 struct brw_vue_map
*vue_map
)
140 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
141 void *mem_ctx
= ralloc_context(NULL
);
142 struct brw_wm_prog_data prog_data
;
143 const GLuint
*program
;
145 bool start_busy
= false;
146 double start_time
= 0;
148 memset(&prog_data
, 0, sizeof(prog_data
));
150 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
151 if (fp
->program
.is_arb_asm
)
152 prog_data
.base
.use_alt_mode
= true;
154 assign_fs_binding_table_offsets(devinfo
, &fp
->program
, key
, &prog_data
);
156 if (!fp
->program
.is_arb_asm
) {
157 brw_nir_setup_glsl_uniforms(mem_ctx
, fp
->program
.nir
, &fp
->program
,
158 &prog_data
.base
, true);
159 brw_nir_analyze_ubo_ranges(brw
->screen
->compiler
, fp
->program
.nir
,
160 prog_data
.base
.ubo_ranges
);
162 brw_nir_setup_arb_uniforms(mem_ctx
, fp
->program
.nir
, &fp
->program
,
165 if (unlikely(INTEL_DEBUG
& DEBUG_WM
))
166 brw_dump_arb_asm("fragment", &fp
->program
);
169 if (unlikely(brw
->perf_debug
)) {
170 start_busy
= (brw
->batch
.last_bo
&&
171 brw_bo_busy(brw
->batch
.last_bo
));
172 start_time
= get_time();
175 int st_index8
= -1, st_index16
= -1;
176 if (INTEL_DEBUG
& DEBUG_SHADER_TIME
) {
177 st_index8
= brw_get_shader_time_index(brw
, &fp
->program
, ST_FS8
,
178 !fp
->program
.is_arb_asm
);
179 st_index16
= brw_get_shader_time_index(brw
, &fp
->program
, ST_FS16
,
180 !fp
->program
.is_arb_asm
);
183 char *error_str
= NULL
;
184 program
= brw_compile_fs(brw
->screen
->compiler
, brw
, mem_ctx
,
185 key
, &prog_data
, fp
->program
.nir
,
186 &fp
->program
, st_index8
, st_index16
,
187 true, false, vue_map
,
188 &program_size
, &error_str
);
190 if (program
== NULL
) {
191 if (!fp
->program
.is_arb_asm
) {
192 fp
->program
.sh
.data
->LinkStatus
= linking_failure
;
193 ralloc_strcat(&fp
->program
.sh
.data
->InfoLog
, error_str
);
196 _mesa_problem(NULL
, "Failed to compile fragment shader: %s\n", error_str
);
198 ralloc_free(mem_ctx
);
202 if (unlikely(brw
->perf_debug
)) {
203 if (fp
->compiled_once
)
204 brw_wm_debug_recompile(brw
, &fp
->program
, key
);
205 fp
->compiled_once
= true;
207 if (start_busy
&& !brw_bo_busy(brw
->batch
.last_bo
)) {
208 perf_debug("FS compile took %.03f ms and stalled the GPU\n",
209 (get_time() - start_time
) * 1000);
213 brw_alloc_stage_scratch(brw
, &brw
->wm
.base
,
214 prog_data
.base
.total_scratch
,
215 devinfo
->max_wm_threads
);
217 if (unlikely((INTEL_DEBUG
& DEBUG_WM
) && fp
->program
.is_arb_asm
))
218 fprintf(stderr
, "\n");
220 /* The param and pull_param arrays will be freed by the shader cache. */
221 ralloc_steal(NULL
, prog_data
.base
.param
);
222 ralloc_steal(NULL
, prog_data
.base
.pull_param
);
223 brw_upload_cache(&brw
->cache
, BRW_CACHE_FS_PROG
,
224 key
, sizeof(struct brw_wm_prog_key
),
225 program
, program_size
,
226 &prog_data
, sizeof(prog_data
),
227 &brw
->wm
.base
.prog_offset
, &brw
->wm
.base
.prog_data
);
229 ralloc_free(mem_ctx
);
235 brw_debug_recompile_sampler_key(struct brw_context
*brw
,
236 const struct brw_sampler_prog_key_data
*old_key
,
237 const struct brw_sampler_prog_key_data
*key
)
241 for (unsigned int i
= 0; i
< MAX_SAMPLERS
; i
++) {
242 found
|= key_debug(brw
, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
243 old_key
->swizzles
[i
], key
->swizzles
[i
]);
245 found
|= key_debug(brw
, "GL_CLAMP enabled on any texture unit's 1st coordinate",
246 old_key
->gl_clamp_mask
[0], key
->gl_clamp_mask
[0]);
247 found
|= key_debug(brw
, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
248 old_key
->gl_clamp_mask
[1], key
->gl_clamp_mask
[1]);
249 found
|= key_debug(brw
, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
250 old_key
->gl_clamp_mask
[2], key
->gl_clamp_mask
[2]);
251 found
|= key_debug(brw
, "gather channel quirk on any texture unit",
252 old_key
->gather_channel_quirk_mask
, key
->gather_channel_quirk_mask
);
253 found
|= key_debug(brw
, "compressed multisample layout",
254 old_key
->compressed_multisample_layout_mask
,
255 key
->compressed_multisample_layout_mask
);
256 found
|= key_debug(brw
, "16x msaa",
260 found
|= key_debug(brw
, "y_uv image bound",
261 old_key
->y_uv_image_mask
,
262 key
->y_uv_image_mask
);
263 found
|= key_debug(brw
, "y_u_v image bound",
264 old_key
->y_u_v_image_mask
,
265 key
->y_u_v_image_mask
);
266 found
|= key_debug(brw
, "yx_xuxv image bound",
267 old_key
->yx_xuxv_image_mask
,
268 key
->yx_xuxv_image_mask
);
269 found
|= key_debug(brw
, "xy_uxvx image bound",
270 old_key
->xy_uxvx_image_mask
,
271 key
->xy_uxvx_image_mask
);
274 for (unsigned int i
= 0; i
< MAX_SAMPLERS
; i
++) {
275 found
|= key_debug(brw
, "textureGather workarounds",
276 old_key
->gen6_gather_wa
[i
], key
->gen6_gather_wa
[i
]);
283 gen6_gather_workaround(GLenum internalformat
)
285 switch (internalformat
) {
286 case GL_R8I
: return WA_SIGN
| WA_8BIT
;
287 case GL_R8UI
: return WA_8BIT
;
288 case GL_R16I
: return WA_SIGN
| WA_16BIT
;
289 case GL_R16UI
: return WA_16BIT
;
291 /* Note that even though GL_R32I and GL_R32UI have format overrides in
292 * the surface state, there is no shader w/a required.
299 brw_populate_sampler_prog_key_data(struct gl_context
*ctx
,
300 const struct gl_program
*prog
,
301 struct brw_sampler_prog_key_data
*key
)
303 struct brw_context
*brw
= brw_context(ctx
);
304 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
305 GLbitfield mask
= prog
->SamplersUsed
;
308 const int s
= u_bit_scan(&mask
);
310 key
->swizzles
[s
] = SWIZZLE_NOOP
;
312 int unit_id
= prog
->SamplerUnits
[s
];
313 const struct gl_texture_unit
*unit
= &ctx
->Texture
.Unit
[unit_id
];
315 if (unit
->_Current
&& unit
->_Current
->Target
!= GL_TEXTURE_BUFFER
) {
316 const struct gl_texture_object
*t
= unit
->_Current
;
317 const struct gl_texture_image
*img
= t
->Image
[0][t
->BaseLevel
];
318 struct gl_sampler_object
*sampler
= _mesa_get_samplerobj(ctx
, unit_id
);
320 const bool alpha_depth
= t
->DepthMode
== GL_ALPHA
&&
321 (img
->_BaseFormat
== GL_DEPTH_COMPONENT
||
322 img
->_BaseFormat
== GL_DEPTH_STENCIL
);
324 /* Haswell handles texture swizzling as surface format overrides
325 * (except for GL_ALPHA); all other platforms need MOVs in the shader.
327 if (alpha_depth
|| (devinfo
->gen
< 8 && !devinfo
->is_haswell
))
328 key
->swizzles
[s
] = brw_get_texture_swizzle(ctx
, t
);
330 if (devinfo
->gen
< 8 &&
331 sampler
->MinFilter
!= GL_NEAREST
&&
332 sampler
->MagFilter
!= GL_NEAREST
) {
333 if (sampler
->WrapS
== GL_CLAMP
)
334 key
->gl_clamp_mask
[0] |= 1 << s
;
335 if (sampler
->WrapT
== GL_CLAMP
)
336 key
->gl_clamp_mask
[1] |= 1 << s
;
337 if (sampler
->WrapR
== GL_CLAMP
)
338 key
->gl_clamp_mask
[2] |= 1 << s
;
341 /* gather4 for RG32* is broken in multiple ways on Gen7. */
342 if (devinfo
->gen
== 7 && prog
->nir
->info
.uses_texture_gather
) {
343 switch (img
->InternalFormat
) {
346 /* We have to override the format to R32G32_FLOAT_LD.
347 * This means that SCS_ALPHA and SCS_ONE will return 0x3f8
348 * (1.0) rather than integer 1. This needs shader hacks.
350 * On Ivybridge, we whack W (alpha) to ONE in our key's
351 * swizzle. On Haswell, we look at the original texture
352 * swizzle, and use XYZW with channels overridden to ONE,
353 * leaving normal texture swizzling to SCS.
355 unsigned src_swizzle
=
356 devinfo
->is_haswell
? t
->_Swizzle
: key
->swizzles
[s
];
357 for (int i
= 0; i
< 4; i
++) {
358 unsigned src_comp
= GET_SWZ(src_swizzle
, i
);
359 if (src_comp
== SWIZZLE_ONE
|| src_comp
== SWIZZLE_W
) {
360 key
->swizzles
[i
] &= ~(0x7 << (3 * i
));
361 key
->swizzles
[i
] |= SWIZZLE_ONE
<< (3 * i
);
367 /* The channel select for green doesn't work - we have to
368 * request blue. Haswell can use SCS for this, but Ivybridge
369 * needs a shader workaround.
371 if (!devinfo
->is_haswell
)
372 key
->gather_channel_quirk_mask
|= 1 << s
;
377 /* Gen6's gather4 is broken for UINT/SINT; we treat them as
378 * UNORM/FLOAT instead and fix it in the shader.
380 if (devinfo
->gen
== 6 && prog
->nir
->info
.uses_texture_gather
) {
381 key
->gen6_gather_wa
[s
] = gen6_gather_workaround(img
->InternalFormat
);
384 /* If this is a multisample sampler, and uses the CMS MSAA layout,
385 * then we need to emit slightly different code to first sample the
388 struct intel_texture_object
*intel_tex
=
389 intel_texture_object((struct gl_texture_object
*)t
);
391 /* From gen9 onwards some single sampled buffers can also be
392 * compressed. These don't need ld2dms sampling along with mcs fetch.
394 if (intel_tex
->mt
->aux_usage
== ISL_AUX_USAGE_MCS
) {
395 assert(devinfo
->gen
>= 7);
396 assert(intel_tex
->mt
->surf
.samples
> 1);
397 assert(intel_tex
->mt
->mcs_buf
);
398 assert(intel_tex
->mt
->surf
.msaa_layout
== ISL_MSAA_LAYOUT_ARRAY
);
399 key
->compressed_multisample_layout_mask
|= 1 << s
;
401 if (intel_tex
->mt
->surf
.samples
>= 16) {
402 assert(devinfo
->gen
>= 9);
403 key
->msaa_16
|= 1 << s
;
407 if (t
->Target
== GL_TEXTURE_EXTERNAL_OES
&& intel_tex
->planar_format
) {
408 switch (intel_tex
->planar_format
->components
) {
409 case __DRI_IMAGE_COMPONENTS_Y_UV
:
410 key
->y_uv_image_mask
|= 1 << s
;
412 case __DRI_IMAGE_COMPONENTS_Y_U_V
:
413 key
->y_u_v_image_mask
|= 1 << s
;
415 case __DRI_IMAGE_COMPONENTS_Y_XUXV
:
416 key
->yx_xuxv_image_mask
|= 1 << s
;
418 case __DRI_IMAGE_COMPONENTS_Y_UXVX
:
419 key
->xy_uxvx_image_mask
|= 1 << s
;
431 brw_wm_state_dirty(const struct brw_context
*brw
)
433 return brw_state_dirty(brw
,
445 BRW_NEW_FRAGMENT_PROGRAM
|
446 BRW_NEW_REDUCED_PRIMITIVE
|
448 BRW_NEW_VUE_MAP_GEOM_OUT
);
452 brw_wm_populate_key(struct brw_context
*brw
, struct brw_wm_prog_key
*key
)
454 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
455 struct gl_context
*ctx
= &brw
->ctx
;
456 /* BRW_NEW_FRAGMENT_PROGRAM */
457 const struct gl_program
*prog
= brw
->programs
[MESA_SHADER_FRAGMENT
];
458 const struct brw_program
*fp
= brw_program_const(prog
);
462 memset(key
, 0, sizeof(*key
));
464 /* Build the index for table lookup
466 if (devinfo
->gen
< 6) {
468 if (prog
->info
.fs
.uses_discard
|| ctx
->Color
.AlphaEnabled
) {
469 lookup
|= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT
;
472 if (prog
->info
.outputs_written
& BITFIELD64_BIT(FRAG_RESULT_DEPTH
)) {
473 lookup
|= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT
;
478 lookup
|= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT
;
480 if (brw_depth_writes_enabled(brw
))
481 lookup
|= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT
;
483 /* _NEW_STENCIL | _NEW_BUFFERS */
484 if (brw
->stencil_enabled
) {
485 lookup
|= BRW_WM_IZ_STENCIL_TEST_ENABLE_BIT
;
487 if (ctx
->Stencil
.WriteMask
[0] ||
488 ctx
->Stencil
.WriteMask
[ctx
->Stencil
._BackFace
])
489 lookup
|= BRW_WM_IZ_STENCIL_WRITE_ENABLE_BIT
;
491 key
->iz_lookup
= lookup
;
494 line_aa
= BRW_WM_AA_NEVER
;
496 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
497 if (ctx
->Line
.SmoothFlag
) {
498 if (brw
->reduced_primitive
== GL_LINES
) {
499 line_aa
= BRW_WM_AA_ALWAYS
;
501 else if (brw
->reduced_primitive
== GL_TRIANGLES
) {
502 if (ctx
->Polygon
.FrontMode
== GL_LINE
) {
503 line_aa
= BRW_WM_AA_SOMETIMES
;
505 if (ctx
->Polygon
.BackMode
== GL_LINE
||
506 (ctx
->Polygon
.CullFlag
&&
507 ctx
->Polygon
.CullFaceMode
== GL_BACK
))
508 line_aa
= BRW_WM_AA_ALWAYS
;
510 else if (ctx
->Polygon
.BackMode
== GL_LINE
) {
511 line_aa
= BRW_WM_AA_SOMETIMES
;
513 if ((ctx
->Polygon
.CullFlag
&&
514 ctx
->Polygon
.CullFaceMode
== GL_FRONT
))
515 line_aa
= BRW_WM_AA_ALWAYS
;
520 key
->line_aa
= line_aa
;
523 key
->high_quality_derivatives
=
524 prog
->info
.uses_fddx_fddy
&&
525 ctx
->Hint
.FragmentShaderDerivative
== GL_NICEST
;
527 if (devinfo
->gen
< 6)
528 key
->stats_wm
= brw
->stats_wm
;
532 (prog
->info
.inputs_read
& (VARYING_BIT_COL0
| VARYING_BIT_COL1
)) &&
533 (ctx
->Light
.ShadeModel
== GL_FLAT
);
535 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
536 key
->clamp_fragment_color
= ctx
->Color
._ClampFragmentColor
;
539 brw_populate_sampler_prog_key_data(ctx
, prog
, &key
->tex
);
542 key
->nr_color_regions
= ctx
->DrawBuffer
->_NumColorDrawBuffers
;
545 key
->force_dual_color_blend
= brw
->dual_color_blend_by_location
&&
546 (ctx
->Color
.BlendEnabled
& 1) && ctx
->Color
.Blend
[0]._UsesDualSrc
;
548 /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
549 key
->replicate_alpha
= ctx
->DrawBuffer
->_NumColorDrawBuffers
> 1 &&
550 (_mesa_is_alpha_test_enabled(ctx
) ||
551 _mesa_is_alpha_to_coverage_enabled(ctx
));
553 /* _NEW_BUFFERS _NEW_MULTISAMPLE */
554 /* Ignore sample qualifier while computing this flag. */
555 if (ctx
->Multisample
.Enabled
) {
556 key
->persample_interp
=
557 ctx
->Multisample
.SampleShading
&&
558 (ctx
->Multisample
.MinSampleShadingValue
*
559 _mesa_geometric_samples(ctx
->DrawBuffer
) > 1);
561 key
->multisample_fbo
= _mesa_geometric_samples(ctx
->DrawBuffer
) > 1;
564 /* BRW_NEW_VUE_MAP_GEOM_OUT */
565 if (devinfo
->gen
< 6 || _mesa_bitcount_64(prog
->info
.inputs_read
&
566 BRW_FS_VARYING_INPUT_MASK
) > 16) {
567 key
->input_slots_valid
= brw
->vue_map_geom_out
.slots_valid
;
570 /* _NEW_COLOR | _NEW_BUFFERS */
571 /* Pre-gen6, the hardware alpha test always used each render
572 * target's alpha to do alpha test, as opposed to render target 0's alpha
573 * like GL requires. Fix that by building the alpha test into the
574 * shader, and we'll skip enabling the fixed function alpha test.
576 if (devinfo
->gen
< 6 && ctx
->DrawBuffer
->_NumColorDrawBuffers
> 1 &&
577 ctx
->Color
.AlphaEnabled
) {
578 key
->alpha_test_func
= ctx
->Color
.AlphaFunc
;
579 key
->alpha_test_ref
= ctx
->Color
.AlphaRef
;
582 /* The unique fragment program ID */
583 key
->program_string_id
= fp
->id
;
585 /* Whether reads from the framebuffer should behave coherently. */
586 key
->coherent_fb_fetch
= ctx
->Extensions
.MESA_shader_framebuffer_fetch
;
590 brw_upload_wm_prog(struct brw_context
*brw
)
592 struct brw_wm_prog_key key
;
593 struct brw_program
*fp
=
594 (struct brw_program
*) brw
->programs
[MESA_SHADER_FRAGMENT
];
596 if (!brw_wm_state_dirty(brw
))
599 brw_wm_populate_key(brw
, &key
);
601 if (!brw_search_cache(&brw
->cache
, BRW_CACHE_FS_PROG
,
603 &brw
->wm
.base
.prog_offset
,
604 &brw
->wm
.base
.prog_data
)) {
605 bool success
= brw_codegen_wm_prog(brw
, fp
, &key
,
606 &brw
->vue_map_geom_out
);
613 brw_fs_precompile(struct gl_context
*ctx
, struct gl_program
*prog
)
615 struct brw_context
*brw
= brw_context(ctx
);
616 const struct gen_device_info
*devinfo
= &brw
->screen
->devinfo
;
617 struct brw_wm_prog_key key
;
619 struct brw_program
*bfp
= brw_program(prog
);
621 memset(&key
, 0, sizeof(key
));
623 uint64_t outputs_written
= prog
->info
.outputs_written
;
625 if (devinfo
->gen
< 6) {
626 if (prog
->info
.fs
.uses_discard
)
627 key
.iz_lookup
|= BRW_WM_IZ_PS_KILL_ALPHATEST_BIT
;
629 if (outputs_written
& BITFIELD64_BIT(FRAG_RESULT_DEPTH
))
630 key
.iz_lookup
|= BRW_WM_IZ_PS_COMPUTES_DEPTH_BIT
;
632 /* Just assume depth testing. */
633 key
.iz_lookup
|= BRW_WM_IZ_DEPTH_TEST_ENABLE_BIT
;
634 key
.iz_lookup
|= BRW_WM_IZ_DEPTH_WRITE_ENABLE_BIT
;
637 if (devinfo
->gen
< 6 || _mesa_bitcount_64(prog
->info
.inputs_read
&
638 BRW_FS_VARYING_INPUT_MASK
) > 16) {
639 key
.input_slots_valid
= prog
->info
.inputs_read
| VARYING_BIT_POS
;
642 brw_setup_tex_for_precompile(brw
, &key
.tex
, prog
);
644 key
.nr_color_regions
= _mesa_bitcount_64(outputs_written
&
645 ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH
) |
646 BITFIELD64_BIT(FRAG_RESULT_STENCIL
) |
647 BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK
)));
649 key
.program_string_id
= bfp
->id
;
651 /* Whether reads from the framebuffer should behave coherently. */
652 key
.coherent_fb_fetch
= ctx
->Extensions
.MESA_shader_framebuffer_fetch
;
654 uint32_t old_prog_offset
= brw
->wm
.base
.prog_offset
;
655 struct brw_stage_prog_data
*old_prog_data
= brw
->wm
.base
.prog_data
;
657 struct brw_vue_map vue_map
;
658 if (devinfo
->gen
< 6) {
659 brw_compute_vue_map(&brw
->screen
->devinfo
, &vue_map
,
660 prog
->info
.inputs_read
| VARYING_BIT_POS
,
664 bool success
= brw_codegen_wm_prog(brw
, bfp
, &key
, &vue_map
);
666 brw
->wm
.base
.prog_offset
= old_prog_offset
;
667 brw
->wm
.base
.prog_data
= old_prog_data
;