2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **********************************************************************/
29 * Keith Whitwell <keith@tungstengraphics.com>
32 #include "brw_context.h"
34 #include "brw_state.h"
35 #include "main/formats.h"
37 /** Return number of src args for given instruction */
38 GLuint
brw_wm_nr_args( GLuint opcode
)
55 assert(opcode
< MAX_OPCODE
);
56 return _mesa_num_inst_src_regs(opcode
);
61 GLuint
brw_wm_is_scalar_result( GLuint opcode
)
85 * Do GPU code generation for non-GLSL shader. non-GLSL shaders have
86 * no flow control instructions so we can more readily do SSA-style
90 brw_wm_non_glsl_emit(struct brw_context
*brw
, struct brw_wm_compile
*c
)
92 /* Augment fragment program. Add instructions for pre- and
93 * post-fragment-program tasks such as interpolation and fogging.
97 /* Translate to intermediate representation. Build register usage
102 /* Dead code removal.
106 /* Register allocation.
107 * Divide by two because we operate on 16 pixels at a time and require
108 * two GRF entries for each logical shader register.
110 c
->grf_limit
= BRW_WM_MAX_GRF
/ 2;
114 /* how many general-purpose registers are used */
115 c
->prog_data
.total_grf
= c
->max_wm_grf
;
124 * All Mesa program -> GPU code generation goes through this function.
125 * Depending on the instructions used (i.e. flow control instructions)
126 * we'll use one of two code generators.
128 static void do_wm_prog( struct brw_context
*brw
,
129 struct brw_fragment_program
*fp
,
130 struct brw_wm_prog_key
*key
)
132 struct brw_wm_compile
*c
;
133 const GLuint
*program
;
136 c
= brw
->wm
.compile_data
;
138 brw
->wm
.compile_data
= calloc(1, sizeof(*brw
->wm
.compile_data
));
139 c
= brw
->wm
.compile_data
;
141 /* Ouch - big out of memory problem. Can't continue
142 * without triggering a segfault, no way to signal,
147 c
->instruction
= calloc(1, BRW_WM_MAX_INSN
* sizeof(*c
->instruction
));
148 c
->prog_instructions
= calloc(1, BRW_WM_MAX_INSN
*
149 sizeof(*c
->prog_instructions
));
150 c
->vreg
= calloc(1, BRW_WM_MAX_VREG
* sizeof(*c
->vreg
));
151 c
->refs
= calloc(1, BRW_WM_MAX_REF
* sizeof(*c
->refs
));
153 void *instruction
= c
->instruction
;
154 void *prog_instructions
= c
->prog_instructions
;
155 void *vreg
= c
->vreg
;
156 void *refs
= c
->refs
;
157 memset(c
, 0, sizeof(*brw
->wm
.compile_data
));
158 c
->instruction
= instruction
;
159 c
->prog_instructions
= prog_instructions
;
163 memcpy(&c
->key
, key
, sizeof(*key
));
166 c
->env_param
= brw
->intel
.ctx
.FragmentProgram
.Parameters
;
168 brw_init_compile(brw
, &c
->func
);
170 /* temporary sanity check assertion */
171 ASSERT(fp
->isGLSL
== brw_wm_is_glsl(&c
->fp
->program
));
173 if (!brw_wm_fs_emit(brw
, c
)) {
175 * Shader which use GLSL features such as flow control are handled
176 * differently from "simple" shaders.
179 c
->dispatch_width
= 8;
180 brw_wm_glsl_emit(brw
, c
);
183 c
->dispatch_width
= 16;
184 brw_wm_non_glsl_emit(brw
, c
);
188 /* Scratch space is used for register spilling */
189 if (c
->last_scratch
) {
190 /* Per-thread scratch space is power-of-two sized. */
191 for (c
->prog_data
.total_scratch
= 1024;
192 c
->prog_data
.total_scratch
<= c
->last_scratch
;
193 c
->prog_data
.total_scratch
*= 2) {
198 c
->prog_data
.total_scratch
= 0;
201 if (unlikely(INTEL_DEBUG
& DEBUG_WM
))
202 fprintf(stderr
, "\n");
206 program
= brw_get_program(&c
->func
, &program_size
);
208 drm_intel_bo_unreference(brw
->wm
.prog_bo
);
209 brw
->wm
.prog_bo
= brw_upload_cache_with_auxdata(&brw
->cache
, BRW_WM_PROG
,
210 &c
->key
, sizeof(c
->key
),
212 program
, program_size
,
214 sizeof(c
->prog_data
),
220 static void brw_wm_populate_key( struct brw_context
*brw
,
221 struct brw_wm_prog_key
*key
)
223 struct intel_context
*intel
= &brw
->intel
;
224 struct gl_context
*ctx
= &brw
->intel
.ctx
;
225 /* BRW_NEW_FRAGMENT_PROGRAM */
226 const struct brw_fragment_program
*fp
=
227 (struct brw_fragment_program
*)brw
->fragment_program
;
228 GLboolean uses_depth
= (fp
->program
.Base
.InputsRead
& (1 << FRAG_ATTRIB_WPOS
)) != 0;
233 memset(key
, 0, sizeof(*key
));
235 /* Build the index for table lookup
238 if (fp
->program
.UsesKill
||
239 ctx
->Color
.AlphaEnabled
)
240 lookup
|= IZ_PS_KILL_ALPHATEST_BIT
;
242 if (fp
->program
.Base
.OutputsWritten
& BITFIELD64_BIT(FRAG_RESULT_DEPTH
))
243 lookup
|= IZ_PS_COMPUTES_DEPTH_BIT
;
247 lookup
|= IZ_DEPTH_TEST_ENABLE_BIT
;
249 if (ctx
->Depth
.Test
&&
250 ctx
->Depth
.Mask
) /* ?? */
251 lookup
|= IZ_DEPTH_WRITE_ENABLE_BIT
;
254 if (ctx
->Stencil
._Enabled
) {
255 lookup
|= IZ_STENCIL_TEST_ENABLE_BIT
;
257 if (ctx
->Stencil
.WriteMask
[0] ||
258 ctx
->Stencil
.WriteMask
[ctx
->Stencil
._BackFace
])
259 lookup
|= IZ_STENCIL_WRITE_ENABLE_BIT
;
264 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
265 if (ctx
->Line
.SmoothFlag
) {
266 if (brw
->intel
.reduced_primitive
== GL_LINES
) {
269 else if (brw
->intel
.reduced_primitive
== GL_TRIANGLES
) {
270 if (ctx
->Polygon
.FrontMode
== GL_LINE
) {
271 line_aa
= AA_SOMETIMES
;
273 if (ctx
->Polygon
.BackMode
== GL_LINE
||
274 (ctx
->Polygon
.CullFlag
&&
275 ctx
->Polygon
.CullFaceMode
== GL_BACK
))
278 else if (ctx
->Polygon
.BackMode
== GL_LINE
) {
279 line_aa
= AA_SOMETIMES
;
281 if ((ctx
->Polygon
.CullFlag
&&
282 ctx
->Polygon
.CullFaceMode
== GL_FRONT
))
288 if (intel
->gen
>= 6) {
289 /* R0-1: masks, pixel X/Y coordinates. */
290 key
->nr_payload_regs
= 2;
291 /* R2: only for 32-pixel dispatch.*/
292 /* R3-4: perspective pixel location barycentric */
293 key
->nr_payload_regs
+= 2;
294 /* R5-6: perspective pixel location bary for dispatch width != 8 */
295 if (!fp
->isGLSL
) { /* dispatch_width != 8 */
296 key
->nr_payload_regs
+= 2;
298 /* R7-10: perspective centroid barycentric */
299 /* R11-14: perspective sample barycentric */
300 /* R15-18: linear pixel location barycentric */
301 /* R19-22: linear centroid barycentric */
302 /* R23-26: linear sample barycentric */
304 /* R27: interpolated depth if uses source depth */
306 key
->source_depth_reg
= key
->nr_payload_regs
;
307 key
->nr_payload_regs
++;
308 if (!fp
->isGLSL
) { /* dispatch_width != 8 */
309 /* R28: interpolated depth if not 8-wide. */
310 key
->nr_payload_regs
++;
313 /* R29: interpolated W set if GEN6_WM_USES_SOURCE_W.
316 key
->source_w_reg
= key
->nr_payload_regs
;
317 key
->nr_payload_regs
++;
318 if (!fp
->isGLSL
) { /* dispatch_width != 8 */
319 /* R30: interpolated W if not 8-wide. */
320 key
->nr_payload_regs
++;
323 /* R31: MSAA position offsets. */
324 /* R32-: bary for 32-pixel. */
325 /* R58-59: interp W for 32-pixel. */
327 if (fp
->program
.Base
.OutputsWritten
& BITFIELD64_BIT(FRAG_RESULT_DEPTH
)) {
328 key
->source_depth_to_render_target
= GL_TRUE
;
329 key
->computes_depth
= GL_TRUE
;
333 brw_wm_lookup_iz(intel
,
340 /* BRW_NEW_WM_INPUT_DIMENSIONS */
341 key
->proj_attrib_mask
= brw
->wm
.input_size_masks
[4-1];
344 key
->flat_shade
= (ctx
->Light
.ShadeModel
== GL_FLAT
);
347 key
->linear_color
= (ctx
->Hint
.PerspectiveCorrection
== GL_FASTEST
);
350 for (i
= 0; i
< BRW_MAX_TEX_UNIT
; i
++) {
351 const struct gl_texture_unit
*unit
= &ctx
->Texture
.Unit
[i
];
353 if (unit
->_ReallyEnabled
) {
354 const struct gl_texture_object
*t
= unit
->_Current
;
355 const struct gl_texture_image
*img
= t
->Image
[0][t
->BaseLevel
];
356 int swizzles
[SWIZZLE_NIL
+ 1] = {
366 key
->tex_swizzles
[i
] = SWIZZLE_NOOP
;
368 /* GL_DEPTH_TEXTURE_MODE is normally handled through
369 * brw_wm_surface_state, but it applies to shadow compares as
370 * well and our shadow compares always return the result in
373 if (t
->CompareMode
== GL_COMPARE_R_TO_TEXTURE_ARB
) {
374 if (t
->DepthMode
== GL_ALPHA
) {
375 swizzles
[0] = SWIZZLE_ZERO
;
376 swizzles
[1] = SWIZZLE_ZERO
;
377 swizzles
[2] = SWIZZLE_ZERO
;
378 } else if (t
->DepthMode
== GL_LUMINANCE
) {
379 swizzles
[3] = SWIZZLE_ONE
;
383 if (img
->InternalFormat
== GL_YCBCR_MESA
) {
384 key
->yuvtex_mask
|= 1 << i
;
385 if (img
->TexFormat
== MESA_FORMAT_YCBCR
)
386 key
->yuvtex_swap_mask
|= 1 << i
;
389 key
->tex_swizzles
[i
] =
390 MAKE_SWIZZLE4(swizzles
[GET_SWZ(t
->_Swizzle
, 0)],
391 swizzles
[GET_SWZ(t
->_Swizzle
, 1)],
392 swizzles
[GET_SWZ(t
->_Swizzle
, 2)],
393 swizzles
[GET_SWZ(t
->_Swizzle
, 3)]);
396 key
->tex_swizzles
[i
] = SWIZZLE_NOOP
;
401 key
->shadowtex_mask
= fp
->program
.Base
.ShadowSamplers
;
405 * Include the draw buffer origin and height so that we can calculate
406 * fragment position values relative to the bottom left of the drawable,
407 * from the incoming screen origin relative position we get as part of our
410 * This is only needed for the WM_WPOSXY opcode when the fragment program
411 * uses the gl_FragCoord input.
413 * We could avoid recompiling by including this as a constant referenced by
414 * our program, but if we were to do that it would also be nice to handle
415 * getting that constant updated at batchbuffer submit time (when we
416 * hold the lock and know where the buffer really is) rather than at emit
417 * time when we don't hold the lock and are just guessing. We could also
418 * just avoid using this as key data if the program doesn't use
421 * For DRI2 the origin_x/y will always be (0,0) but we still need the
422 * drawable height in order to invert the Y axis.
424 if (fp
->program
.Base
.InputsRead
& FRAG_BIT_WPOS
) {
425 key
->drawable_height
= ctx
->DrawBuffer
->Height
;
426 key
->render_to_fbo
= ctx
->DrawBuffer
->Name
!= 0;
429 key
->nr_color_regions
= brw
->state
.nr_color_regions
;
431 /* CACHE_NEW_VS_PROG */
432 key
->vp_outputs_written
= brw
->vs
.prog_data
->outputs_written
;
434 /* The unique fragment program ID */
435 key
->program_string_id
= fp
->id
;
439 static void brw_prepare_wm_prog(struct brw_context
*brw
)
441 struct brw_wm_prog_key key
;
442 struct brw_fragment_program
*fp
= (struct brw_fragment_program
*)
443 brw
->fragment_program
;
445 brw_wm_populate_key(brw
, &key
);
447 /* Make an early check for the key.
449 drm_intel_bo_unreference(brw
->wm
.prog_bo
);
450 brw
->wm
.prog_bo
= brw_search_cache(&brw
->cache
, BRW_WM_PROG
,
454 if (brw
->wm
.prog_bo
== NULL
)
455 do_wm_prog(brw
, fp
, &key
);
459 const struct brw_tracked_state brw_wm_prog
= {
461 .mesa
= (_NEW_COLOR
|
470 .brw
= (BRW_NEW_FRAGMENT_PROGRAM
|
471 BRW_NEW_WM_INPUT_DIMENSIONS
|
472 BRW_NEW_REDUCED_PRIMITIVE
),
473 .cache
= CACHE_NEW_VS_PROG
,
475 .prepare
= brw_prepare_wm_prog