i965: Disable depth writes when depth test is GL_EQUAL.
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.c
1 /*
2 * Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 * Intel funded Tungsten Graphics to
4 * develop this 3D driver.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sublicense, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial
16 * portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 */
26 #include "brw_context.h"
27 #include "brw_wm.h"
28 #include "brw_state.h"
29 #include "brw_shader.h"
30 #include "main/enums.h"
31 #include "main/formats.h"
32 #include "main/fbobject.h"
33 #include "main/samplerobj.h"
34 #include "main/framebuffer.h"
35 #include "program/prog_parameter.h"
36 #include "program/program.h"
37 #include "intel_mipmap_tree.h"
38 #include "intel_image.h"
39 #include "brw_nir.h"
40 #include "brw_program.h"
41
42 #include "util/ralloc.h"
43
44 static void
45 assign_fs_binding_table_offsets(const struct gen_device_info *devinfo,
46 const struct gl_shader_program *shader_prog,
47 const struct gl_program *prog,
48 const struct brw_wm_prog_key *key,
49 struct brw_wm_prog_data *prog_data)
50 {
51 uint32_t next_binding_table_offset = 0;
52
53 /* If there are no color regions, we still perform an FB write to a null
54 * renderbuffer, which we place at surface index 0.
55 */
56 prog_data->binding_table.render_target_start = next_binding_table_offset;
57 next_binding_table_offset += MAX2(key->nr_color_regions, 1);
58
59 next_binding_table_offset =
60 brw_assign_common_binding_table_offsets(MESA_SHADER_FRAGMENT, devinfo,
61 shader_prog, prog, &prog_data->base,
62 next_binding_table_offset);
63
64 if (prog->nir->info->outputs_read && !key->coherent_fb_fetch) {
65 prog_data->binding_table.render_target_read_start =
66 next_binding_table_offset;
67 next_binding_table_offset += key->nr_color_regions;
68 }
69 }
70
71 /**
72 * All Mesa program -> GPU code generation goes through this function.
73 * Depending on the instructions used (i.e. flow control instructions)
74 * we'll use one of two code generators.
75 */
76 bool
77 brw_codegen_wm_prog(struct brw_context *brw,
78 struct gl_shader_program *prog,
79 struct brw_program *fp,
80 struct brw_wm_prog_key *key,
81 struct brw_vue_map *vue_map)
82 {
83 const struct gen_device_info *devinfo = &brw->screen->devinfo;
84 struct gl_context *ctx = &brw->ctx;
85 void *mem_ctx = ralloc_context(NULL);
86 struct brw_wm_prog_data prog_data;
87 const GLuint *program;
88 struct brw_shader *fs = NULL;
89 GLuint program_size;
90 bool start_busy = false;
91 double start_time = 0;
92
93 if (prog)
94 fs = (struct brw_shader *)prog->_LinkedShaders[MESA_SHADER_FRAGMENT];
95
96 memset(&prog_data, 0, sizeof(prog_data));
97
98 /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */
99 if (!prog)
100 prog_data.base.use_alt_mode = true;
101
102 assign_fs_binding_table_offsets(devinfo, prog, &fp->program, key,
103 &prog_data);
104
105 /* Allocate the references to the uniforms that will end up in the
106 * prog_data associated with the compiled program, and which will be freed
107 * by the state cache.
108 */
109 int param_count = fp->program.nir->num_uniforms / 4;
110 prog_data.base.nr_image_params = fp->program.info.num_images;
111 /* The backend also sometimes adds params for texture size. */
112 param_count += 2 * ctx->Const.Program[MESA_SHADER_FRAGMENT].MaxTextureImageUnits;
113 prog_data.base.param =
114 rzalloc_array(NULL, const gl_constant_value *, param_count);
115 prog_data.base.pull_param =
116 rzalloc_array(NULL, const gl_constant_value *, param_count);
117 prog_data.base.image_param =
118 rzalloc_array(NULL, struct brw_image_param,
119 prog_data.base.nr_image_params);
120 prog_data.base.nr_params = param_count;
121
122 if (prog) {
123 brw_nir_setup_glsl_uniforms(fp->program.nir, prog, &fp->program,
124 &prog_data.base, true);
125 } else {
126 brw_nir_setup_arb_uniforms(fp->program.nir, &fp->program,
127 &prog_data.base);
128
129 if (unlikely(INTEL_DEBUG & DEBUG_WM))
130 brw_dump_arb_asm("fragment", &fp->program);
131 }
132
133 if (unlikely(brw->perf_debug)) {
134 start_busy = (brw->batch.last_bo &&
135 drm_intel_bo_busy(brw->batch.last_bo));
136 start_time = get_time();
137 }
138
139 int st_index8 = -1, st_index16 = -1;
140 if (INTEL_DEBUG & DEBUG_SHADER_TIME) {
141 st_index8 = brw_get_shader_time_index(brw, prog, &fp->program, ST_FS8);
142 st_index16 = brw_get_shader_time_index(brw, prog, &fp->program, ST_FS16);
143 }
144
145 char *error_str = NULL;
146 program = brw_compile_fs(brw->screen->compiler, brw, mem_ctx,
147 key, &prog_data, fp->program.nir,
148 &fp->program, st_index8, st_index16,
149 true, brw->use_rep_send, vue_map,
150 &program_size, &error_str);
151
152 if (program == NULL) {
153 if (prog) {
154 prog->LinkStatus = false;
155 ralloc_strcat(&prog->InfoLog, error_str);
156 }
157
158 _mesa_problem(NULL, "Failed to compile fragment shader: %s\n", error_str);
159
160 ralloc_free(mem_ctx);
161 return false;
162 }
163
164 if (unlikely(brw->perf_debug) && fs) {
165 if (fs->compiled_once)
166 brw_wm_debug_recompile(brw, prog, key);
167 fs->compiled_once = true;
168
169 if (start_busy && !drm_intel_bo_busy(brw->batch.last_bo)) {
170 perf_debug("FS compile took %.03f ms and stalled the GPU\n",
171 (get_time() - start_time) * 1000);
172 }
173 }
174
175 brw_alloc_stage_scratch(brw, &brw->wm.base,
176 prog_data.base.total_scratch,
177 devinfo->max_wm_threads);
178
179 if (unlikely((INTEL_DEBUG & DEBUG_WM) && !prog))
180 fprintf(stderr, "\n");
181
182 brw_upload_cache(&brw->cache, BRW_CACHE_FS_PROG,
183 key, sizeof(struct brw_wm_prog_key),
184 program, program_size,
185 &prog_data, sizeof(prog_data),
186 &brw->wm.base.prog_offset, &brw->wm.base.prog_data);
187
188 ralloc_free(mem_ctx);
189
190 return true;
191 }
192
193 bool
194 brw_debug_recompile_sampler_key(struct brw_context *brw,
195 const struct brw_sampler_prog_key_data *old_key,
196 const struct brw_sampler_prog_key_data *key)
197 {
198 bool found = false;
199
200 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
201 found |= key_debug(brw, "EXT_texture_swizzle or DEPTH_TEXTURE_MODE",
202 old_key->swizzles[i], key->swizzles[i]);
203 }
204 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 1st coordinate",
205 old_key->gl_clamp_mask[0], key->gl_clamp_mask[0]);
206 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 2nd coordinate",
207 old_key->gl_clamp_mask[1], key->gl_clamp_mask[1]);
208 found |= key_debug(brw, "GL_CLAMP enabled on any texture unit's 3rd coordinate",
209 old_key->gl_clamp_mask[2], key->gl_clamp_mask[2]);
210 found |= key_debug(brw, "gather channel quirk on any texture unit",
211 old_key->gather_channel_quirk_mask, key->gather_channel_quirk_mask);
212 found |= key_debug(brw, "compressed multisample layout",
213 old_key->compressed_multisample_layout_mask,
214 key->compressed_multisample_layout_mask);
215 found |= key_debug(brw, "16x msaa",
216 old_key->msaa_16,
217 key->msaa_16);
218
219 found |= key_debug(brw, "y_uv image bound",
220 old_key->y_uv_image_mask,
221 key->y_uv_image_mask);
222 found |= key_debug(brw, "y_u_v image bound",
223 old_key->y_u_v_image_mask,
224 key->y_u_v_image_mask);
225 found |= key_debug(brw, "yx_xuxv image bound",
226 old_key->yx_xuxv_image_mask,
227 key->yx_xuxv_image_mask);
228
229 for (unsigned int i = 0; i < MAX_SAMPLERS; i++) {
230 found |= key_debug(brw, "textureGather workarounds",
231 old_key->gen6_gather_wa[i], key->gen6_gather_wa[i]);
232 }
233
234 return found;
235 }
236
237 void
238 brw_wm_debug_recompile(struct brw_context *brw,
239 struct gl_shader_program *prog,
240 const struct brw_wm_prog_key *key)
241 {
242 struct brw_cache_item *c = NULL;
243 const struct brw_wm_prog_key *old_key = NULL;
244 bool found = false;
245
246 perf_debug("Recompiling fragment shader for program %d\n", prog->Name);
247
248 for (unsigned int i = 0; i < brw->cache.size; i++) {
249 for (c = brw->cache.items[i]; c; c = c->next) {
250 if (c->cache_id == BRW_CACHE_FS_PROG) {
251 old_key = c->key;
252
253 if (old_key->program_string_id == key->program_string_id)
254 break;
255 }
256 }
257 if (c)
258 break;
259 }
260
261 if (!c) {
262 perf_debug(" Didn't find previous compile in the shader cache for debug\n");
263 return;
264 }
265
266 found |= key_debug(brw, "alphatest, computed depth, depth test, or "
267 "depth write",
268 old_key->iz_lookup, key->iz_lookup);
269 found |= key_debug(brw, "depth statistics",
270 old_key->stats_wm, key->stats_wm);
271 found |= key_debug(brw, "flat shading",
272 old_key->flat_shade, key->flat_shade);
273 found |= key_debug(brw, "per-sample interpolation",
274 old_key->persample_interp, key->persample_interp);
275 found |= key_debug(brw, "number of color buffers",
276 old_key->nr_color_regions, key->nr_color_regions);
277 found |= key_debug(brw, "MRT alpha test or alpha-to-coverage",
278 old_key->replicate_alpha, key->replicate_alpha);
279 found |= key_debug(brw, "fragment color clamping",
280 old_key->clamp_fragment_color, key->clamp_fragment_color);
281 found |= key_debug(brw, "multisampled FBO",
282 old_key->multisample_fbo, key->multisample_fbo);
283 found |= key_debug(brw, "line smoothing",
284 old_key->line_aa, key->line_aa);
285 found |= key_debug(brw, "input slots valid",
286 old_key->input_slots_valid, key->input_slots_valid);
287 found |= key_debug(brw, "mrt alpha test function",
288 old_key->alpha_test_func, key->alpha_test_func);
289 found |= key_debug(brw, "mrt alpha test reference value",
290 old_key->alpha_test_ref, key->alpha_test_ref);
291
292 found |= brw_debug_recompile_sampler_key(brw, &old_key->tex, &key->tex);
293
294 if (!found) {
295 perf_debug(" Something else\n");
296 }
297 }
298
299 static uint8_t
300 gen6_gather_workaround(GLenum internalformat)
301 {
302 switch (internalformat) {
303 case GL_R8I: return WA_SIGN | WA_8BIT;
304 case GL_R8UI: return WA_8BIT;
305 case GL_R16I: return WA_SIGN | WA_16BIT;
306 case GL_R16UI: return WA_16BIT;
307 default:
308 /* Note that even though GL_R32I and GL_R32UI have format overrides in
309 * the surface state, there is no shader w/a required.
310 */
311 return 0;
312 }
313 }
314
315 void
316 brw_populate_sampler_prog_key_data(struct gl_context *ctx,
317 const struct gl_program *prog,
318 struct brw_sampler_prog_key_data *key)
319 {
320 struct brw_context *brw = brw_context(ctx);
321 GLbitfield mask = prog->SamplersUsed;
322
323 while (mask) {
324 const int s = u_bit_scan(&mask);
325
326 key->swizzles[s] = SWIZZLE_NOOP;
327
328 int unit_id = prog->SamplerUnits[s];
329 const struct gl_texture_unit *unit = &ctx->Texture.Unit[unit_id];
330
331 if (unit->_Current && unit->_Current->Target != GL_TEXTURE_BUFFER) {
332 const struct gl_texture_object *t = unit->_Current;
333 const struct gl_texture_image *img = t->Image[0][t->BaseLevel];
334 struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit_id);
335
336 const bool alpha_depth = t->DepthMode == GL_ALPHA &&
337 (img->_BaseFormat == GL_DEPTH_COMPONENT ||
338 img->_BaseFormat == GL_DEPTH_STENCIL);
339
340 /* Haswell handles texture swizzling as surface format overrides
341 * (except for GL_ALPHA); all other platforms need MOVs in the shader.
342 */
343 if (alpha_depth || (brw->gen < 8 && !brw->is_haswell))
344 key->swizzles[s] = brw_get_texture_swizzle(ctx, t);
345
346 if (brw->gen < 8 &&
347 sampler->MinFilter != GL_NEAREST &&
348 sampler->MagFilter != GL_NEAREST) {
349 if (sampler->WrapS == GL_CLAMP)
350 key->gl_clamp_mask[0] |= 1 << s;
351 if (sampler->WrapT == GL_CLAMP)
352 key->gl_clamp_mask[1] |= 1 << s;
353 if (sampler->WrapR == GL_CLAMP)
354 key->gl_clamp_mask[2] |= 1 << s;
355 }
356
357 /* gather4's channel select for green from RG32F is broken; requires
358 * a shader w/a on IVB; fixable with just SCS on HSW.
359 */
360 if (brw->gen == 7 && !brw->is_haswell &&
361 prog->nir->info->uses_texture_gather) {
362 if (img->InternalFormat == GL_RG32F)
363 key->gather_channel_quirk_mask |= 1 << s;
364 }
365
366 /* Gen6's gather4 is broken for UINT/SINT; we treat them as
367 * UNORM/FLOAT instead and fix it in the shader.
368 */
369 if (brw->gen == 6 && prog->nir->info->uses_texture_gather) {
370 key->gen6_gather_wa[s] = gen6_gather_workaround(img->InternalFormat);
371 }
372
373 /* If this is a multisample sampler, and uses the CMS MSAA layout,
374 * then we need to emit slightly different code to first sample the
375 * MCS surface.
376 */
377 struct intel_texture_object *intel_tex =
378 intel_texture_object((struct gl_texture_object *)t);
379
380 /* From gen9 onwards some single sampled buffers can also be
381 * compressed. These don't need ld2dms sampling along with mcs fetch.
382 */
383 if (brw->gen >= 7 &&
384 intel_tex->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS &&
385 intel_tex->mt->num_samples > 1) {
386 key->compressed_multisample_layout_mask |= 1 << s;
387
388 if (intel_tex->mt->num_samples >= 16) {
389 assert(brw->gen >= 9);
390 key->msaa_16 |= 1 << s;
391 }
392 }
393
394 if (t->Target == GL_TEXTURE_EXTERNAL_OES && intel_tex->planar_format) {
395 switch (intel_tex->planar_format->components) {
396 case __DRI_IMAGE_COMPONENTS_Y_UV:
397 key->y_uv_image_mask |= 1 << s;
398 break;
399 case __DRI_IMAGE_COMPONENTS_Y_U_V:
400 key->y_u_v_image_mask |= 1 << s;
401 break;
402 case __DRI_IMAGE_COMPONENTS_Y_XUXV:
403 key->yx_xuxv_image_mask |= 1 << s;
404 break;
405 default:
406 break;
407 }
408 }
409
410 }
411 }
412 }
413
414 static bool
415 brw_wm_state_dirty(const struct brw_context *brw)
416 {
417 return brw_state_dirty(brw,
418 _NEW_BUFFERS |
419 _NEW_COLOR |
420 _NEW_DEPTH |
421 _NEW_FRAG_CLAMP |
422 _NEW_HINT |
423 _NEW_LIGHT |
424 _NEW_LINE |
425 _NEW_MULTISAMPLE |
426 _NEW_POLYGON |
427 _NEW_STENCIL |
428 _NEW_TEXTURE,
429 BRW_NEW_FRAGMENT_PROGRAM |
430 BRW_NEW_REDUCED_PRIMITIVE |
431 BRW_NEW_STATS_WM |
432 BRW_NEW_VUE_MAP_GEOM_OUT);
433 }
434
435 void
436 brw_wm_populate_key(struct brw_context *brw, struct brw_wm_prog_key *key)
437 {
438 struct gl_context *ctx = &brw->ctx;
439 /* BRW_NEW_FRAGMENT_PROGRAM */
440 const struct brw_program *fp = brw_program_const(brw->fragment_program);
441 const struct gl_program *prog = (struct gl_program *) brw->fragment_program;
442 GLuint lookup = 0;
443 GLuint line_aa;
444
445 memset(key, 0, sizeof(*key));
446
447 /* Build the index for table lookup
448 */
449 if (brw->gen < 6) {
450 /* _NEW_COLOR */
451 if (prog->info.fs.uses_discard || ctx->Color.AlphaEnabled) {
452 lookup |= IZ_PS_KILL_ALPHATEST_BIT;
453 }
454
455 if (prog->info.outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH)) {
456 lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
457 }
458
459 /* _NEW_DEPTH */
460 if (ctx->Depth.Test)
461 lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
462
463 if (brw_depth_writes_enabled(brw))
464 lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
465
466 /* _NEW_STENCIL | _NEW_BUFFERS */
467 if (ctx->Stencil._Enabled) {
468 lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
469
470 if (ctx->Stencil.WriteMask[0] ||
471 ctx->Stencil.WriteMask[ctx->Stencil._BackFace])
472 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
473 }
474 key->iz_lookup = lookup;
475 }
476
477 line_aa = AA_NEVER;
478
479 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
480 if (ctx->Line.SmoothFlag) {
481 if (brw->reduced_primitive == GL_LINES) {
482 line_aa = AA_ALWAYS;
483 }
484 else if (brw->reduced_primitive == GL_TRIANGLES) {
485 if (ctx->Polygon.FrontMode == GL_LINE) {
486 line_aa = AA_SOMETIMES;
487
488 if (ctx->Polygon.BackMode == GL_LINE ||
489 (ctx->Polygon.CullFlag &&
490 ctx->Polygon.CullFaceMode == GL_BACK))
491 line_aa = AA_ALWAYS;
492 }
493 else if (ctx->Polygon.BackMode == GL_LINE) {
494 line_aa = AA_SOMETIMES;
495
496 if ((ctx->Polygon.CullFlag &&
497 ctx->Polygon.CullFaceMode == GL_FRONT))
498 line_aa = AA_ALWAYS;
499 }
500 }
501 }
502
503 key->line_aa = line_aa;
504
505 /* _NEW_HINT */
506 key->high_quality_derivatives =
507 ctx->Hint.FragmentShaderDerivative == GL_NICEST;
508
509 if (brw->gen < 6)
510 key->stats_wm = brw->stats_wm;
511
512 /* _NEW_LIGHT */
513 key->flat_shade = (ctx->Light.ShadeModel == GL_FLAT);
514
515 /* _NEW_FRAG_CLAMP | _NEW_BUFFERS */
516 key->clamp_fragment_color = ctx->Color._ClampFragmentColor;
517
518 /* _NEW_TEXTURE */
519 brw_populate_sampler_prog_key_data(ctx, prog, &key->tex);
520
521 /* _NEW_BUFFERS */
522 key->nr_color_regions = ctx->DrawBuffer->_NumColorDrawBuffers;
523
524 /* _NEW_COLOR */
525 key->force_dual_color_blend = brw->dual_color_blend_by_location &&
526 (ctx->Color.BlendEnabled & 1) && ctx->Color.Blend[0]._UsesDualSrc;
527
528 /* _NEW_MULTISAMPLE, _NEW_COLOR, _NEW_BUFFERS */
529 key->replicate_alpha = ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
530 (_mesa_is_alpha_test_enabled(ctx) ||
531 _mesa_is_alpha_to_coverage_enabled(ctx));
532
533 /* _NEW_BUFFERS _NEW_MULTISAMPLE */
534 /* Ignore sample qualifier while computing this flag. */
535 if (ctx->Multisample.Enabled) {
536 key->persample_interp =
537 ctx->Multisample.SampleShading &&
538 (ctx->Multisample.MinSampleShadingValue *
539 _mesa_geometric_samples(ctx->DrawBuffer) > 1);
540
541 key->multisample_fbo = _mesa_geometric_samples(ctx->DrawBuffer) > 1;
542 }
543
544 /* BRW_NEW_VUE_MAP_GEOM_OUT */
545 if (brw->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
546 BRW_FS_VARYING_INPUT_MASK) > 16) {
547 key->input_slots_valid = brw->vue_map_geom_out.slots_valid;
548 }
549
550 /* _NEW_COLOR | _NEW_BUFFERS */
551 /* Pre-gen6, the hardware alpha test always used each render
552 * target's alpha to do alpha test, as opposed to render target 0's alpha
553 * like GL requires. Fix that by building the alpha test into the
554 * shader, and we'll skip enabling the fixed function alpha test.
555 */
556 if (brw->gen < 6 && ctx->DrawBuffer->_NumColorDrawBuffers > 1 &&
557 ctx->Color.AlphaEnabled) {
558 key->alpha_test_func = ctx->Color.AlphaFunc;
559 key->alpha_test_ref = ctx->Color.AlphaRef;
560 }
561
562 /* The unique fragment program ID */
563 key->program_string_id = fp->id;
564
565 /* Whether reads from the framebuffer should behave coherently. */
566 key->coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
567 }
568
569 void
570 brw_upload_wm_prog(struct brw_context *brw)
571 {
572 struct gl_context *ctx = &brw->ctx;
573 struct gl_shader_program *current = ctx->_Shader->_CurrentFragmentProgram;
574 struct brw_wm_prog_key key;
575 struct brw_program *fp = (struct brw_program *) brw->fragment_program;
576
577 if (!brw_wm_state_dirty(brw))
578 return;
579
580 brw_wm_populate_key(brw, &key);
581
582 if (!brw_search_cache(&brw->cache, BRW_CACHE_FS_PROG,
583 &key, sizeof(key),
584 &brw->wm.base.prog_offset,
585 &brw->wm.base.prog_data)) {
586 bool success = brw_codegen_wm_prog(brw, current, fp, &key,
587 &brw->vue_map_geom_out);
588 (void) success;
589 assert(success);
590 }
591 }
592
593 bool
594 brw_fs_precompile(struct gl_context *ctx,
595 struct gl_shader_program *shader_prog,
596 struct gl_program *prog)
597 {
598 struct brw_context *brw = brw_context(ctx);
599 struct brw_wm_prog_key key;
600
601 struct brw_program *bfp = brw_program(prog);
602
603 memset(&key, 0, sizeof(key));
604
605 uint64_t outputs_written = prog->info.outputs_written;
606
607 if (brw->gen < 6) {
608 if (prog->info.fs.uses_discard)
609 key.iz_lookup |= IZ_PS_KILL_ALPHATEST_BIT;
610
611 if (outputs_written & BITFIELD64_BIT(FRAG_RESULT_DEPTH))
612 key.iz_lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
613
614 /* Just assume depth testing. */
615 key.iz_lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
616 key.iz_lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
617 }
618
619 if (brw->gen < 6 || _mesa_bitcount_64(prog->info.inputs_read &
620 BRW_FS_VARYING_INPUT_MASK) > 16) {
621 key.input_slots_valid = prog->info.inputs_read | VARYING_BIT_POS;
622 }
623
624 brw_setup_tex_for_precompile(brw, &key.tex, prog);
625
626 key.nr_color_regions = _mesa_bitcount_64(outputs_written &
627 ~(BITFIELD64_BIT(FRAG_RESULT_DEPTH) |
628 BITFIELD64_BIT(FRAG_RESULT_STENCIL) |
629 BITFIELD64_BIT(FRAG_RESULT_SAMPLE_MASK)));
630
631 key.program_string_id = bfp->id;
632
633 /* Whether reads from the framebuffer should behave coherently. */
634 key.coherent_fb_fetch = ctx->Extensions.MESA_shader_framebuffer_fetch;
635
636 uint32_t old_prog_offset = brw->wm.base.prog_offset;
637 struct brw_stage_prog_data *old_prog_data = brw->wm.base.prog_data;
638
639 struct brw_vue_map vue_map;
640 if (brw->gen < 6) {
641 brw_compute_vue_map(&brw->screen->devinfo, &vue_map,
642 prog->info.inputs_read | VARYING_BIT_POS,
643 false);
644 }
645
646 bool success = brw_codegen_wm_prog(brw, shader_prog, bfp, &key, &vue_map);
647
648 brw->wm.base.prog_offset = old_prog_offset;
649 brw->wm.base.prog_data = old_prog_data;
650
651 return success;
652 }