src/mesa/drivers/dri/i965/brw_wm.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRW_WM_H
  34 #define BRW_WM_H
  35
  36 #include <stdbool.h>
  37
  38 #include "program/prog_instruction.h"
  39 #include "brw_context.h"
  40 #include "brw_eu.h"
  41
  42 #define SATURATE (1<<5)
  43
  44 /* A big lookup table is used to figure out which and how many
  45  * additional regs will inserted before the main payload in the WM
  46  * program execution.  These mainly relate to depth and stencil
  47  * processing and the early-depth-test optimization.
  48  */
  49 #define IZ_PS_KILL_ALPHATEST_BIT    0x1
  50 #define IZ_PS_COMPUTES_DEPTH_BIT    0x2
  51 #define IZ_DEPTH_WRITE_ENABLE_BIT   0x4
  52 #define IZ_DEPTH_TEST_ENABLE_BIT    0x8
  53 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
  54 #define IZ_STENCIL_TEST_ENABLE_BIT  0x20
  55 #define IZ_BIT_MAX                  0x40
  56
  57 #define AA_NEVER     0
  58 #define AA_SOMETIMES 1
  59 #define AA_ALWAYS    2
  60
  61 struct brw_wm_prog_key {
  62    uint8_t iz_lookup;
  63    GLuint stats_wm:1;
  64    GLuint flat_shade:1;
  65    GLuint nr_color_regions:5;
  66    GLuint render_to_fbo:1;
  67    GLuint alpha_test:1;
  68    GLuint clamp_fragment_color:1;
  69    GLuint line_aa:2;
  70
  71    /**
  72     * Per-sampler comparison functions:
  73     *
  74     * If comparison mode is GL_COMPARE_R_TO_TEXTURE, then this is set to one
  75     * of GL_NEVER, GL_LESS, GL_EQUAL, GL_LEQUAL, GL_GREATER, GL_NOTEQUAL,
  76     * GL_GEQUAL, or GL_ALWAYS.  Otherwise (comparison mode is GL_NONE), this
  77     * field is irrelevant so it's left as GL_NONE (0).
  78     *
  79     * While this is a GLenum, all possible values fit in 16-bits.
  80     */
  81    uint16_t compare_funcs[BRW_MAX_TEX_UNIT];
  82
  83    GLbitfield proj_attrib_mask; /**< one bit per fragment program attribute */
  84    GLuint yuvtex_mask:16;
  85    GLuint yuvtex_swap_mask:16;  /* UV swaped */
  86    uint16_t gl_clamp_mask[3];
  87
  88    GLushort tex_swizzles[BRW_MAX_TEX_UNIT];
  89    GLushort drawable_height;
  90    GLbitfield64 vp_outputs_written;
  91    GLuint program_string_id:32;
  92 };
  93
  94
  95 /* A bit of a glossary:
  96  *
  97  * brw_wm_value: A computed value or program input.  Values are
  98  * constant, they are created once and are never modified.  When a
  99  * fragment program register is written or overwritten, new values are
 100  * created fresh, preserving the rule that values are constant.
 101  *
 102  * brw_wm_ref: A reference to a value.  Wherever a value used is by an
 103  * instruction or as a program output, that is tracked with an
 104  * instance of this struct.  All references to a value occur after it
 105  * is created.  After the last reference, a value is dead and can be
 106  * discarded.
 107  *
 108  * brw_wm_grf: Represents a physical hardware register.  May be either
 109  * empty or hold a value.  Register allocation is the process of
 110  * assigning values to grf registers.  This occurs in pass2 and the
 111  * brw_wm_grf struct is not used before that.
 112  *
 113  * Fragment program registers: These are time-varying constructs that
 114  * are hard to reason about and which we translate away in pass0.  A
 115  * single fragment program register element (eg. temp[0].x) will be
 116  * translated to one or more brw_wm_value structs, one for each time
 117  * that temp[0].x is written to during the program.
 118  */
 119
 120
 121
 122 /* Used in pass2 to track register allocation.
 123  */
 124 struct brw_wm_grf {
 125    struct brw_wm_value *value;
 126    GLuint nextuse;
 127 };
 128
 129 struct brw_wm_value {
 130    struct brw_reg hw_reg;       /* emitted to this reg, may not always be there */
 131    struct brw_wm_ref *lastuse;
 132    struct brw_wm_grf *resident;
 133    GLuint contributes_to_output:1;
 134    GLuint spill_slot:16;        /* if non-zero, spill immediately after calculation */
 135 };
 136
 137 struct brw_wm_ref {
 138    struct brw_reg hw_reg;       /* nr filled in in pass2, everything else, pass0 */
 139    struct brw_wm_value *value;
 140    struct brw_wm_ref *prevuse;
 141    GLuint unspill_reg:7;        /* unspill to reg */
 142    GLuint emitted:1;
 143    GLuint insn:24;
 144 };
 145
 146 struct brw_wm_constref {
 147    const struct brw_wm_ref *ref;
 148    GLfloat constval;
 149 };
 150
 151
 152 struct brw_wm_instruction {
 153    struct brw_wm_value *dst[4];
 154    struct brw_wm_ref *src[3][4];
 155    GLuint opcode:8;
 156    GLuint saturate:1;
 157    GLuint writemask:4;
 158    GLuint tex_unit:4;   /* texture unit for TEX, TXD, TXP instructions */
 159    GLuint tex_idx:3;    /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */
 160    GLuint tex_shadow:1; /* do shadow comparison? */
 161    GLuint eot:1;        /* End of thread indicator for FB_WRITE*/
 162    GLuint target:10;    /* target binding table index for FB_WRITE*/
 163 };
 164
 165
 166 #define BRW_WM_MAX_INSN  (MAX_PROGRAM_INSTRUCTIONS*3 + FRAG_ATTRIB_MAX + 3)
 167 #define BRW_WM_MAX_GRF   128            /* hardware limit */
 168 #define BRW_WM_MAX_VREG  (BRW_WM_MAX_INSN * 4)
 169 #define BRW_WM_MAX_REF   (BRW_WM_MAX_INSN * 12)
 170 #define BRW_WM_MAX_PARAM 256
 171 #define BRW_WM_MAX_CONST 256
 172 #define BRW_WM_MAX_SUBROUTINE 16
 173
 174 /* used in masks next to WRITEMASK_*. */
 175 #define SATURATE (1<<5)
 176
 177
 178 /* New opcodes to track internal operations required for WM unit.
 179  * These are added early so that the registers used can be tracked,
 180  * freed and reused like those of other instructions.
 181  */
 182 #define WM_PIXELXY        (MAX_OPCODE)
 183 #define WM_DELTAXY        (MAX_OPCODE + 1)
 184 #define WM_PIXELW         (MAX_OPCODE + 2)
 185 #define WM_LINTERP        (MAX_OPCODE + 3)
 186 #define WM_PINTERP        (MAX_OPCODE + 4)
 187 #define WM_CINTERP        (MAX_OPCODE + 5)
 188 #define WM_WPOSXY         (MAX_OPCODE + 6)
 189 #define WM_FB_WRITE       (MAX_OPCODE + 7)
 190 #define WM_FRONTFACING    (MAX_OPCODE + 8)
 191 #define MAX_WM_OPCODE     (MAX_OPCODE + 9)
 192
 193 #define PROGRAM_PAYLOAD   (PROGRAM_FILE_MAX)
 194 #define NUM_FILES         (PROGRAM_PAYLOAD + 1)
 195
 196 #define PAYLOAD_DEPTH     (FRAG_ATTRIB_MAX)
 197 #define PAYLOAD_W         (FRAG_ATTRIB_MAX + 1)
 198 #define PAYLOAD_FP_REG_MAX (FRAG_ATTRIB_MAX + 2)
 199
 200 struct brw_wm_compile {
 201    struct brw_compile func;
 202    struct brw_wm_prog_key key;
 203    struct brw_wm_prog_data prog_data;
 204
 205    struct brw_fragment_program *fp;
 206
 207    GLfloat (*env_param)[4];
 208
 209    enum {
 210       START,
 211       PASS2_DONE
 212    } state;
 213
 214    uint8_t source_depth_reg;
 215    uint8_t source_w_reg;
 216    uint8_t aa_dest_stencil_reg;
 217    uint8_t dest_depth_reg;
 218    uint8_t nr_payload_regs;
 219    GLuint computes_depth:1;     /* could be derived from program string */
 220    GLuint source_depth_to_render_target:1;
 221    GLuint runtime_check_aads_emit:1;
 222
 223    /* Initial pass - translate fp instructions to fp instructions,
 224     * simplifying and adding instructions for interpolation and
 225     * framebuffer writes.
 226     */
 227    struct prog_instruction *prog_instructions;
 228    GLuint nr_fp_insns;
 229    GLuint fp_temp;
 230    GLuint fp_interp_emitted;
 231
 232    struct prog_src_register pixel_xy;
 233    struct prog_src_register delta_xy;
 234    struct prog_src_register pixel_w;
 235
 236
 237    struct brw_wm_value *vreg;
 238    GLuint nr_vreg;
 239
 240    struct brw_wm_value creg[BRW_WM_MAX_PARAM];
 241    GLuint nr_creg;
 242
 243    struct {
 244       struct brw_wm_value depth[4]; /* includes r0/r1 */
 245       struct brw_wm_value input_interp[FRAG_ATTRIB_MAX];
 246    } payload;
 247
 248
 249    const struct brw_wm_ref *pass0_fp_reg[NUM_FILES][256][4];
 250
 251    struct brw_wm_ref undef_ref;
 252    struct brw_wm_value undef_value;
 253
 254    struct brw_wm_ref *refs;
 255    GLuint nr_refs;
 256
 257    struct brw_wm_instruction *instruction;
 258    GLuint nr_insns;
 259
 260    struct brw_wm_constref constref[BRW_WM_MAX_CONST];
 261    GLuint nr_constrefs;
 262
 263    struct brw_wm_grf pass2_grf[BRW_WM_MAX_GRF/2];
 264
 265    GLuint grf_limit;
 266    GLuint max_wm_grf;
 267    GLuint last_scratch;
 268
 269    GLuint cur_inst;  /**< index of current instruction */
 270
 271    GLboolean out_of_regs;  /**< ran out of GRF registers? */
 272
 273    /** Mapping from Mesa registers to hardware registers */
 274    struct {
 275       GLboolean inited;
 276       struct brw_reg reg;
 277    } wm_regs[NUM_FILES][256][4];
 278
 279    GLboolean used_grf[BRW_WM_MAX_GRF];
 280    GLuint first_free_grf;
 281    struct brw_reg stack;
 282    struct brw_reg emit_mask_reg;
 283    GLuint tmp_regs[BRW_WM_MAX_GRF];
 284    GLuint tmp_index;
 285    GLuint tmp_max;
 286    GLuint subroutines[BRW_WM_MAX_SUBROUTINE];
 287    GLuint dispatch_width;
 288
 289    /** we may need up to 3 constants per instruction (if use_const_buffer) */
 290    struct {
 291       GLint index;
 292       struct brw_reg reg;
 293    } current_const[3];
 294 };
 295
 296
 297 /** Bits for prog_instruction::Aux field */
 298 #define INST_AUX_EOT      0x1
 299 #define INST_AUX_TARGET(T)  (T << 1)
 300 #define INST_AUX_GET_TARGET(AUX) ((AUX) >> 1)
 301
 302
 303 GLuint brw_wm_nr_args( GLuint opcode );
 304 GLuint brw_wm_is_scalar_result( GLuint opcode );
 305
 306 void brw_wm_pass_fp( struct brw_wm_compile *c );
 307 void brw_wm_pass0( struct brw_wm_compile *c );
 308 void brw_wm_pass1( struct brw_wm_compile *c );
 309 void brw_wm_pass2( struct brw_wm_compile *c );
 310 void brw_wm_emit( struct brw_wm_compile *c );
 311 GLboolean brw_wm_arg_can_be_immediate(enum prog_opcode, int arg);
 312 void brw_wm_print_value( struct brw_wm_compile *c,
 313                          struct brw_wm_value *value );
 314
 315 void brw_wm_print_ref( struct brw_wm_compile *c,
 316                        struct brw_wm_ref *ref );
 317
 318 void brw_wm_print_insn( struct brw_wm_compile *c,
 319                         struct brw_wm_instruction *inst );
 320
 321 void brw_wm_print_program( struct brw_wm_compile *c,
 322                            const char *stage );
 323
 324 void brw_wm_lookup_iz(struct intel_context *intel,
 325                       struct brw_wm_compile *c);
 326
 327 bool brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c,
 328                     struct gl_shader_program *prog);
 329
 330 /* brw_wm_emit.c */
 331 void emit_alu1(struct brw_compile *p,
 332                struct brw_instruction *(*func)(struct brw_compile *,
 333                                                struct brw_reg,
 334                                                struct brw_reg),
 335                const struct brw_reg *dst,
 336                GLuint mask,
 337                const struct brw_reg *arg0);
 338 void emit_alu2(struct brw_compile *p,
 339                struct brw_instruction *(*func)(struct brw_compile *,
 340                                                struct brw_reg,
 341                                                struct brw_reg,
 342                                                struct brw_reg),
 343                const struct brw_reg *dst,
 344                GLuint mask,
 345                const struct brw_reg *arg0,
 346                const struct brw_reg *arg1);
 347 void emit_cinterp(struct brw_compile *p,
 348                   const struct brw_reg *dst,
 349                   GLuint mask,
 350                   const struct brw_reg *arg0);
 351 void emit_cmp(struct brw_compile *p,
 352               const struct brw_reg *dst,
 353               GLuint mask,
 354               const struct brw_reg *arg0,
 355               const struct brw_reg *arg1,
 356               const struct brw_reg *arg2);
 357 void emit_ddxy(struct brw_compile *p,
 358                const struct brw_reg *dst,
 359                GLuint mask,
 360                GLboolean is_ddx,
 361                const struct brw_reg *arg0);
 362 void emit_delta_xy(struct brw_compile *p,
 363                    const struct brw_reg *dst,
 364                    GLuint mask,
 365                    const struct brw_reg *arg0);
 366 void emit_dp2(struct brw_compile *p,
 367               const struct brw_reg *dst,
 368               GLuint mask,
 369               const struct brw_reg *arg0,
 370               const struct brw_reg *arg1);
 371 void emit_dp3(struct brw_compile *p,
 372               const struct brw_reg *dst,
 373               GLuint mask,
 374               const struct brw_reg *arg0,
 375               const struct brw_reg *arg1);
 376 void emit_dp4(struct brw_compile *p,
 377               const struct brw_reg *dst,
 378               GLuint mask,
 379               const struct brw_reg *arg0,
 380               const struct brw_reg *arg1);
 381 void emit_dph(struct brw_compile *p,
 382               const struct brw_reg *dst,
 383               GLuint mask,
 384               const struct brw_reg *arg0,
 385               const struct brw_reg *arg1);
 386 void emit_fb_write(struct brw_wm_compile *c,
 387                    struct brw_reg *arg0,
 388                    struct brw_reg *arg1,
 389                    struct brw_reg *arg2,
 390                    GLuint target,
 391                    GLuint eot);
 392 void emit_frontfacing(struct brw_compile *p,
 393                       const struct brw_reg *dst,
 394                       GLuint mask);
 395 void emit_linterp(struct brw_compile *p,
 396                   const struct brw_reg *dst,
 397                   GLuint mask,
 398                   const struct brw_reg *arg0,
 399                   const struct brw_reg *deltas);
 400 void emit_lrp(struct brw_compile *p,
 401               const struct brw_reg *dst,
 402               GLuint mask,
 403               const struct brw_reg *arg0,
 404               const struct brw_reg *arg1,
 405               const struct brw_reg *arg2);
 406 void emit_mad(struct brw_compile *p,
 407               const struct brw_reg *dst,
 408               GLuint mask,
 409               const struct brw_reg *arg0,
 410               const struct brw_reg *arg1,
 411               const struct brw_reg *arg2);
 412 void emit_math1(struct brw_wm_compile *c,
 413                 GLuint function,
 414                 const struct brw_reg *dst,
 415                 GLuint mask,
 416                 const struct brw_reg *arg0);
 417 void emit_math2(struct brw_wm_compile *c,
 418                 GLuint function,
 419                 const struct brw_reg *dst,
 420                 GLuint mask,
 421                 const struct brw_reg *arg0,
 422                 const struct brw_reg *arg1);
 423 void emit_min(struct brw_compile *p,
 424               const struct brw_reg *dst,
 425               GLuint mask,
 426               const struct brw_reg *arg0,
 427               const struct brw_reg *arg1);
 428 void emit_max(struct brw_compile *p,
 429               const struct brw_reg *dst,
 430               GLuint mask,
 431               const struct brw_reg *arg0,
 432               const struct brw_reg *arg1);
 433 void emit_pinterp(struct brw_compile *p,
 434                   const struct brw_reg *dst,
 435                   GLuint mask,
 436                   const struct brw_reg *arg0,
 437                   const struct brw_reg *deltas,
 438                   const struct brw_reg *w);
 439 void emit_pixel_xy(struct brw_wm_compile *c,
 440                    const struct brw_reg *dst,
 441                    GLuint mask);
 442 void emit_pixel_w(struct brw_wm_compile *c,
 443                   const struct brw_reg *dst,
 444                   GLuint mask,
 445                   const struct brw_reg *arg0,
 446                   const struct brw_reg *deltas);
 447 void emit_sop(struct brw_compile *p,
 448               const struct brw_reg *dst,
 449               GLuint mask,
 450               GLuint cond,
 451               const struct brw_reg *arg0,
 452               const struct brw_reg *arg1);
 453 void emit_sign(struct brw_compile *p,
 454                const struct brw_reg *dst,
 455                GLuint mask,
 456                const struct brw_reg *arg0);
 457 void emit_tex(struct brw_wm_compile *c,
 458               struct brw_reg *dst,
 459               GLuint dst_flags,
 460               struct brw_reg *arg,
 461               struct brw_reg depth_payload,
 462               GLuint tex_idx,
 463               GLuint sampler,
 464               GLboolean shadow);
 465 void emit_txb(struct brw_wm_compile *c,
 466               struct brw_reg *dst,
 467               GLuint dst_flags,
 468               struct brw_reg *arg,
 469               struct brw_reg depth_payload,
 470               GLuint tex_idx,
 471               GLuint sampler);
 472 void emit_wpos_xy(struct brw_wm_compile *c,
 473                   const struct brw_reg *dst,
 474                   GLuint mask,
 475                   const struct brw_reg *arg0);
 476 void emit_xpd(struct brw_compile *p,
 477               const struct brw_reg *dst,
 478               GLuint mask,
 479               const struct brw_reg *arg0,
 480               const struct brw_reg *arg1);
 481
 482 GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog);
 483 struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type);
 484 struct gl_shader_program *brw_new_shader_program(struct gl_context *ctx, GLuint name);
 485
 486 bool brw_color_buffer_write_enabled(struct brw_context *brw);
 487 bool brw_render_target_supported(gl_format format);
 488 void brw_wm_payload_setup(struct brw_context *brw,
 489                           struct brw_wm_compile *c);
 490 bool do_wm_prog(struct brw_context *brw,
 491                 struct gl_shader_program *prog,
 492                 struct brw_fragment_program *fp,
 493                 struct brw_wm_prog_key *key);
 494
 495 #endif