src/mesa/drivers/dri/i965/brw_wm.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRW_WM_H
  34 #define BRW_WM_H
  35
  36 #include <stdbool.h>
  37
  38 #include "program/prog_instruction.h"
  39 #include "brw_context.h"
  40 #include "brw_eu.h"
  41
  42 #define SATURATE (1<<5)
  43
  44 /* A big lookup table is used to figure out which and how many
  45  * additional regs will inserted before the main payload in the WM
  46  * program execution.  These mainly relate to depth and stencil
  47  * processing and the early-depth-test optimization.
  48  */
  49 #define IZ_PS_KILL_ALPHATEST_BIT    0x1
  50 #define IZ_PS_COMPUTES_DEPTH_BIT    0x2
  51 #define IZ_DEPTH_WRITE_ENABLE_BIT   0x4
  52 #define IZ_DEPTH_TEST_ENABLE_BIT    0x8
  53 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
  54 #define IZ_STENCIL_TEST_ENABLE_BIT  0x20
  55 #define IZ_BIT_MAX                  0x40
  56
  57 #define AA_NEVER     0
  58 #define AA_SOMETIMES 1
  59 #define AA_ALWAYS    2
  60
  61 struct brw_wm_prog_key {
  62    GLuint stats_wm:1;
  63    GLuint flat_shade:1;
  64    GLuint linear_color:1;  /**< linear interpolation vs perspective interp */
  65    GLuint nr_color_regions:5;
  66    GLuint render_to_fbo:1;
  67    GLuint alpha_test:1;
  68    GLuint clamp_fragment_color:1;
  69
  70    GLbitfield proj_attrib_mask; /**< one bit per fragment program attribute */
  71    GLuint shadowtex_mask:16;
  72    GLuint yuvtex_mask:16;
  73    GLuint yuvtex_swap_mask:16;  /* UV swaped */
  74
  75    GLushort tex_swizzles[BRW_MAX_TEX_UNIT];
  76
  77    GLushort drawable_height;
  78    GLbitfield64 vp_outputs_written;
  79    GLuint iz_lookup;
  80    GLuint line_aa;
  81    GLuint program_string_id:32;
  82 };
  83
  84
  85 /* A bit of a glossary:
  86  *
  87  * brw_wm_value: A computed value or program input.  Values are
  88  * constant, they are created once and are never modified.  When a
  89  * fragment program register is written or overwritten, new values are
  90  * created fresh, preserving the rule that values are constant.
  91  *
  92  * brw_wm_ref: A reference to a value.  Wherever a value used is by an
  93  * instruction or as a program output, that is tracked with an
  94  * instance of this struct.  All references to a value occur after it
  95  * is created.  After the last reference, a value is dead and can be
  96  * discarded.
  97  *
  98  * brw_wm_grf: Represents a physical hardware register.  May be either
  99  * empty or hold a value.  Register allocation is the process of
 100  * assigning values to grf registers.  This occurs in pass2 and the
 101  * brw_wm_grf struct is not used before that.
 102  *
 103  * Fragment program registers: These are time-varying constructs that
 104  * are hard to reason about and which we translate away in pass0.  A
 105  * single fragment program register element (eg. temp[0].x) will be
 106  * translated to one or more brw_wm_value structs, one for each time
 107  * that temp[0].x is written to during the program.
 108  */
 109
 110
 111
 112 /* Used in pass2 to track register allocation.
 113  */
 114 struct brw_wm_grf {
 115    struct brw_wm_value *value;
 116    GLuint nextuse;
 117 };
 118
 119 struct brw_wm_value {
 120    struct brw_reg hw_reg;       /* emitted to this reg, may not always be there */
 121    struct brw_wm_ref *lastuse;
 122    struct brw_wm_grf *resident;
 123    GLuint contributes_to_output:1;
 124    GLuint spill_slot:16;        /* if non-zero, spill immediately after calculation */
 125 };
 126
 127 struct brw_wm_ref {
 128    struct brw_reg hw_reg;       /* nr filled in in pass2, everything else, pass0 */
 129    struct brw_wm_value *value;
 130    struct brw_wm_ref *prevuse;
 131    GLuint unspill_reg:7;        /* unspill to reg */
 132    GLuint emitted:1;
 133    GLuint insn:24;
 134 };
 135
 136 struct brw_wm_constref {
 137    const struct brw_wm_ref *ref;
 138    GLfloat constval;
 139 };
 140
 141
 142 struct brw_wm_instruction {
 143    struct brw_wm_value *dst[4];
 144    struct brw_wm_ref *src[3][4];
 145    GLuint opcode:8;
 146    GLuint saturate:1;
 147    GLuint writemask:4;
 148    GLuint tex_unit:4;   /* texture unit for TEX, TXD, TXP instructions */
 149    GLuint tex_idx:3;    /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */
 150    GLuint tex_shadow:1; /* do shadow comparison? */
 151    GLuint eot:1;        /* End of thread indicator for FB_WRITE*/
 152    GLuint target:10;    /* target binding table index for FB_WRITE*/
 153 };
 154
 155
 156 #define BRW_WM_MAX_INSN  (MAX_PROGRAM_INSTRUCTIONS*3 + FRAG_ATTRIB_MAX + 3)
 157 #define BRW_WM_MAX_GRF   128            /* hardware limit */
 158 #define BRW_WM_MAX_VREG  (BRW_WM_MAX_INSN * 4)
 159 #define BRW_WM_MAX_REF   (BRW_WM_MAX_INSN * 12)
 160 #define BRW_WM_MAX_PARAM 256
 161 #define BRW_WM_MAX_CONST 256
 162 #define BRW_WM_MAX_SUBROUTINE 16
 163
 164 /* used in masks next to WRITEMASK_*. */
 165 #define SATURATE (1<<5)
 166
 167
 168 /* New opcodes to track internal operations required for WM unit.
 169  * These are added early so that the registers used can be tracked,
 170  * freed and reused like those of other instructions.
 171  */
 172 #define WM_PIXELXY        (MAX_OPCODE)
 173 #define WM_DELTAXY        (MAX_OPCODE + 1)
 174 #define WM_PIXELW         (MAX_OPCODE + 2)
 175 #define WM_LINTERP        (MAX_OPCODE + 3)
 176 #define WM_PINTERP        (MAX_OPCODE + 4)
 177 #define WM_CINTERP        (MAX_OPCODE + 5)
 178 #define WM_WPOSXY         (MAX_OPCODE + 6)
 179 #define WM_FB_WRITE       (MAX_OPCODE + 7)
 180 #define WM_FRONTFACING    (MAX_OPCODE + 8)
 181 #define MAX_WM_OPCODE     (MAX_OPCODE + 9)
 182
 183 #define PROGRAM_PAYLOAD   (PROGRAM_FILE_MAX)
 184 #define NUM_FILES         (PROGRAM_PAYLOAD + 1)
 185
 186 #define PAYLOAD_DEPTH     (FRAG_ATTRIB_MAX)
 187 #define PAYLOAD_W         (FRAG_ATTRIB_MAX + 1)
 188 #define PAYLOAD_FP_REG_MAX (FRAG_ATTRIB_MAX + 2)
 189
 190 struct brw_wm_compile {
 191    struct brw_compile func;
 192    struct brw_wm_prog_key key;
 193    struct brw_wm_prog_data prog_data;
 194
 195    struct brw_fragment_program *fp;
 196
 197    GLfloat (*env_param)[4];
 198
 199    enum {
 200       START,
 201       PASS2_DONE
 202    } state;
 203
 204    GLuint source_depth_reg:3;
 205    GLuint source_w_reg:3;
 206    GLuint aa_dest_stencil_reg:3;
 207    GLuint dest_depth_reg:3;
 208    GLuint nr_payload_regs:4;
 209    GLuint computes_depth:1;     /* could be derived from program string */
 210    GLuint source_depth_to_render_target:1;
 211    GLuint runtime_check_aads_emit:1;
 212
 213    /* Initial pass - translate fp instructions to fp instructions,
 214     * simplifying and adding instructions for interpolation and
 215     * framebuffer writes.
 216     */
 217    struct prog_instruction *prog_instructions;
 218    GLuint nr_fp_insns;
 219    GLuint fp_temp;
 220    GLuint fp_interp_emitted;
 221    GLuint fp_fragcolor_emitted;
 222
 223    struct prog_src_register pixel_xy;
 224    struct prog_src_register delta_xy;
 225    struct prog_src_register pixel_w;
 226
 227
 228    struct brw_wm_value *vreg;
 229    GLuint nr_vreg;
 230
 231    struct brw_wm_value creg[BRW_WM_MAX_PARAM];
 232    GLuint nr_creg;
 233
 234    struct {
 235       struct brw_wm_value depth[4]; /* includes r0/r1 */
 236       struct brw_wm_value input_interp[FRAG_ATTRIB_MAX];
 237    } payload;
 238
 239
 240    const struct brw_wm_ref *pass0_fp_reg[NUM_FILES][256][4];
 241
 242    struct brw_wm_ref undef_ref;
 243    struct brw_wm_value undef_value;
 244
 245    struct brw_wm_ref *refs;
 246    GLuint nr_refs;
 247
 248    struct brw_wm_instruction *instruction;
 249    GLuint nr_insns;
 250
 251    struct brw_wm_constref constref[BRW_WM_MAX_CONST];
 252    GLuint nr_constrefs;
 253
 254    struct brw_wm_grf pass2_grf[BRW_WM_MAX_GRF/2];
 255
 256    GLuint grf_limit;
 257    GLuint max_wm_grf;
 258    GLuint last_scratch;
 259
 260    GLuint cur_inst;  /**< index of current instruction */
 261
 262    GLboolean out_of_regs;  /**< ran out of GRF registers? */
 263
 264    /** Mapping from Mesa registers to hardware registers */
 265    struct {
 266       GLboolean inited;
 267       struct brw_reg reg;
 268    } wm_regs[NUM_FILES][256][4];
 269
 270    GLboolean used_grf[BRW_WM_MAX_GRF];
 271    GLuint first_free_grf;
 272    struct brw_reg stack;
 273    struct brw_reg emit_mask_reg;
 274    GLuint tmp_regs[BRW_WM_MAX_GRF];
 275    GLuint tmp_index;
 276    GLuint tmp_max;
 277    GLuint subroutines[BRW_WM_MAX_SUBROUTINE];
 278    GLuint dispatch_width;
 279
 280    /** we may need up to 3 constants per instruction (if use_const_buffer) */
 281    struct {
 282       GLint index;
 283       struct brw_reg reg;
 284    } current_const[3];
 285 };
 286
 287
 288 /** Bits for prog_instruction::Aux field */
 289 #define INST_AUX_EOT      0x1
 290 #define INST_AUX_TARGET(T)  (T << 1)
 291 #define INST_AUX_GET_TARGET(AUX) ((AUX) >> 1)
 292
 293
 294 GLuint brw_wm_nr_args( GLuint opcode );
 295 GLuint brw_wm_is_scalar_result( GLuint opcode );
 296
 297 void brw_wm_pass_fp( struct brw_wm_compile *c );
 298 void brw_wm_pass0( struct brw_wm_compile *c );
 299 void brw_wm_pass1( struct brw_wm_compile *c );
 300 void brw_wm_pass2( struct brw_wm_compile *c );
 301 void brw_wm_emit( struct brw_wm_compile *c );
 302 GLboolean brw_wm_arg_can_be_immediate(enum prog_opcode, int arg);
 303 void brw_wm_print_value( struct brw_wm_compile *c,
 304                          struct brw_wm_value *value );
 305
 306 void brw_wm_print_ref( struct brw_wm_compile *c,
 307                        struct brw_wm_ref *ref );
 308
 309 void brw_wm_print_insn( struct brw_wm_compile *c,
 310                         struct brw_wm_instruction *inst );
 311
 312 void brw_wm_print_program( struct brw_wm_compile *c,
 313                            const char *stage );
 314
 315 void brw_wm_lookup_iz(struct intel_context *intel,
 316                       struct brw_wm_compile *c);
 317
 318 GLboolean brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c);
 319
 320 /* brw_wm_emit.c */
 321 void emit_alu1(struct brw_compile *p,
 322                struct brw_instruction *(*func)(struct brw_compile *,
 323                                                struct brw_reg,
 324                                                struct brw_reg),
 325                const struct brw_reg *dst,
 326                GLuint mask,
 327                const struct brw_reg *arg0);
 328 void emit_alu2(struct brw_compile *p,
 329                struct brw_instruction *(*func)(struct brw_compile *,
 330                                                struct brw_reg,
 331                                                struct brw_reg,
 332                                                struct brw_reg),
 333                const struct brw_reg *dst,
 334                GLuint mask,
 335                const struct brw_reg *arg0,
 336                const struct brw_reg *arg1);
 337 void emit_cinterp(struct brw_compile *p,
 338                   const struct brw_reg *dst,
 339                   GLuint mask,
 340                   const struct brw_reg *arg0);
 341 void emit_cmp(struct brw_compile *p,
 342               const struct brw_reg *dst,
 343               GLuint mask,
 344               const struct brw_reg *arg0,
 345               const struct brw_reg *arg1,
 346               const struct brw_reg *arg2);
 347 void emit_ddxy(struct brw_compile *p,
 348                const struct brw_reg *dst,
 349                GLuint mask,
 350                GLboolean is_ddx,
 351                const struct brw_reg *arg0);
 352 void emit_delta_xy(struct brw_compile *p,
 353                    const struct brw_reg *dst,
 354                    GLuint mask,
 355                    const struct brw_reg *arg0);
 356 void emit_dp2(struct brw_compile *p,
 357               const struct brw_reg *dst,
 358               GLuint mask,
 359               const struct brw_reg *arg0,
 360               const struct brw_reg *arg1);
 361 void emit_dp3(struct brw_compile *p,
 362               const struct brw_reg *dst,
 363               GLuint mask,
 364               const struct brw_reg *arg0,
 365               const struct brw_reg *arg1);
 366 void emit_dp4(struct brw_compile *p,
 367               const struct brw_reg *dst,
 368               GLuint mask,
 369               const struct brw_reg *arg0,
 370               const struct brw_reg *arg1);
 371 void emit_dph(struct brw_compile *p,
 372               const struct brw_reg *dst,
 373               GLuint mask,
 374               const struct brw_reg *arg0,
 375               const struct brw_reg *arg1);
 376 void emit_fb_write(struct brw_wm_compile *c,
 377                    struct brw_reg *arg0,
 378                    struct brw_reg *arg1,
 379                    struct brw_reg *arg2,
 380                    GLuint target,
 381                    GLuint eot);
 382 void emit_frontfacing(struct brw_compile *p,
 383                       const struct brw_reg *dst,
 384                       GLuint mask);
 385 void emit_linterp(struct brw_compile *p,
 386                   const struct brw_reg *dst,
 387                   GLuint mask,
 388                   const struct brw_reg *arg0,
 389                   const struct brw_reg *deltas);
 390 void emit_lrp(struct brw_compile *p,
 391               const struct brw_reg *dst,
 392               GLuint mask,
 393               const struct brw_reg *arg0,
 394               const struct brw_reg *arg1,
 395               const struct brw_reg *arg2);
 396 void emit_mad(struct brw_compile *p,
 397               const struct brw_reg *dst,
 398               GLuint mask,
 399               const struct brw_reg *arg0,
 400               const struct brw_reg *arg1,
 401               const struct brw_reg *arg2);
 402 void emit_math1(struct brw_wm_compile *c,
 403                 GLuint function,
 404                 const struct brw_reg *dst,
 405                 GLuint mask,
 406                 const struct brw_reg *arg0);
 407 void emit_math2(struct brw_wm_compile *c,
 408                 GLuint function,
 409                 const struct brw_reg *dst,
 410                 GLuint mask,
 411                 const struct brw_reg *arg0,
 412                 const struct brw_reg *arg1);
 413 void emit_min(struct brw_compile *p,
 414               const struct brw_reg *dst,
 415               GLuint mask,
 416               const struct brw_reg *arg0,
 417               const struct brw_reg *arg1);
 418 void emit_max(struct brw_compile *p,
 419               const struct brw_reg *dst,
 420               GLuint mask,
 421               const struct brw_reg *arg0,
 422               const struct brw_reg *arg1);
 423 void emit_pinterp(struct brw_compile *p,
 424                   const struct brw_reg *dst,
 425                   GLuint mask,
 426                   const struct brw_reg *arg0,
 427                   const struct brw_reg *deltas,
 428                   const struct brw_reg *w);
 429 void emit_pixel_xy(struct brw_wm_compile *c,
 430                    const struct brw_reg *dst,
 431                    GLuint mask);
 432 void emit_pixel_w(struct brw_wm_compile *c,
 433                   const struct brw_reg *dst,
 434                   GLuint mask,
 435                   const struct brw_reg *arg0,
 436                   const struct brw_reg *deltas);
 437 void emit_sop(struct brw_compile *p,
 438               const struct brw_reg *dst,
 439               GLuint mask,
 440               GLuint cond,
 441               const struct brw_reg *arg0,
 442               const struct brw_reg *arg1);
 443 void emit_sign(struct brw_compile *p,
 444                const struct brw_reg *dst,
 445                GLuint mask,
 446                const struct brw_reg *arg0);
 447 void emit_tex(struct brw_wm_compile *c,
 448               struct brw_reg *dst,
 449               GLuint dst_flags,
 450               struct brw_reg *arg,
 451               struct brw_reg depth_payload,
 452               GLuint tex_idx,
 453               GLuint sampler,
 454               GLboolean shadow);
 455 void emit_txb(struct brw_wm_compile *c,
 456               struct brw_reg *dst,
 457               GLuint dst_flags,
 458               struct brw_reg *arg,
 459               struct brw_reg depth_payload,
 460               GLuint tex_idx,
 461               GLuint sampler);
 462 void emit_wpos_xy(struct brw_wm_compile *c,
 463                   const struct brw_reg *dst,
 464                   GLuint mask,
 465                   const struct brw_reg *arg0);
 466 void emit_xpd(struct brw_compile *p,
 467               const struct brw_reg *dst,
 468               GLuint mask,
 469               const struct brw_reg *arg0,
 470               const struct brw_reg *arg1);
 471
 472 GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog);
 473 struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type);
 474 struct gl_shader_program *brw_new_shader_program(struct gl_context *ctx, GLuint name);
 475
 476 bool brw_color_buffer_write_enabled(struct brw_context *brw);
 477 bool brw_render_target_supported(gl_format format);
 478
 479 #endif