i965: Enable EGL_KHR_gl_texture_3D_image
[mesa.git] / src / mesa / drivers / dri / i965 / brw_wm.h
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keithw@vmware.com>
30 */
31
32
33 #ifndef BRW_WM_H
34 #define BRW_WM_H
35
36 #include <stdbool.h>
37
38 #include "brw_context.h"
39 #include "brw_eu.h"
40
41 /* A big lookup table is used to figure out which and how many
42 * additional regs will inserted before the main payload in the WM
43 * program execution. These mainly relate to depth and stencil
44 * processing and the early-depth-test optimization.
45 */
46 #define IZ_PS_KILL_ALPHATEST_BIT 0x1
47 #define IZ_PS_COMPUTES_DEPTH_BIT 0x2
48 #define IZ_DEPTH_WRITE_ENABLE_BIT 0x4
49 #define IZ_DEPTH_TEST_ENABLE_BIT 0x8
50 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
51 #define IZ_STENCIL_TEST_ENABLE_BIT 0x20
52 #define IZ_BIT_MAX 0x40
53
54 #define AA_NEVER 0
55 #define AA_SOMETIMES 1
56 #define AA_ALWAYS 2
57
58 #ifdef __cplusplus
59 extern "C" {
60 #endif
61
62 bool brw_color_buffer_write_enabled(struct brw_context *brw);
63 bool brw_codegen_wm_prog(struct brw_context *brw,
64 struct gl_shader_program *prog,
65 struct brw_fragment_program *fp,
66 struct brw_wm_prog_key *key);
67 void brw_wm_debug_recompile(struct brw_context *brw,
68 struct gl_shader_program *prog,
69 const struct brw_wm_prog_key *key);
70
71 void
72 brw_upload_wm_prog(struct brw_context *brw);
73
74 #ifdef __cplusplus
75 } // extern "C"
76 #endif
77
78 #endif