src/mesa/drivers/dri/i965/brw_wm.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRW_WM_H
  34 #define BRW_WM_H
  35
  36 #include <stdbool.h>
  37
  38 #include "program/prog_instruction.h"
  39 #include "brw_context.h"
  40 #include "brw_eu.h"
  41
  42 #define SATURATE (1<<5)
  43
  44 /* A big lookup table is used to figure out which and how many
  45  * additional regs will inserted before the main payload in the WM
  46  * program execution.  These mainly relate to depth and stencil
  47  * processing and the early-depth-test optimization.
  48  */
  49 #define IZ_PS_KILL_ALPHATEST_BIT    0x1
  50 #define IZ_PS_COMPUTES_DEPTH_BIT    0x2
  51 #define IZ_DEPTH_WRITE_ENABLE_BIT   0x4
  52 #define IZ_DEPTH_TEST_ENABLE_BIT    0x8
  53 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
  54 #define IZ_STENCIL_TEST_ENABLE_BIT  0x20
  55 #define IZ_BIT_MAX                  0x40
  56
  57 #define AA_NEVER     0
  58 #define AA_SOMETIMES 1
  59 #define AA_ALWAYS    2
  60
  61 struct brw_wm_prog_key {
  62    GLuint source_depth_reg:3;
  63    GLuint source_w_reg:3;
  64    GLuint aa_dest_stencil_reg:3;
  65    GLuint dest_depth_reg:3;
  66    GLuint nr_payload_regs:4;
  67    GLuint computes_depth:1;     /* could be derived from program string */
  68    GLuint source_depth_to_render_target:1;
  69    GLuint flat_shade:1;
  70    GLuint linear_color:1;  /**< linear interpolation vs perspective interp */
  71    GLuint runtime_check_aads_emit:1;
  72    GLuint nr_color_regions:5;
  73
  74    GLbitfield proj_attrib_mask; /**< one bit per fragment program attribute */
  75    GLuint shadowtex_mask:16;
  76    GLuint yuvtex_mask:16;
  77    GLuint yuvtex_swap_mask:16;  /* UV swaped */
  78
  79    GLushort tex_swizzles[BRW_MAX_TEX_UNIT];
  80
  81    GLushort drawable_height;
  82    GLbitfield64 vp_outputs_written;
  83    GLuint program_string_id:32;
  84 };
  85
  86
  87 /* A bit of a glossary:
  88  *
  89  * brw_wm_value: A computed value or program input.  Values are
  90  * constant, they are created once and are never modified.  When a
  91  * fragment program register is written or overwritten, new values are
  92  * created fresh, preserving the rule that values are constant.
  93  *
  94  * brw_wm_ref: A reference to a value.  Wherever a value used is by an
  95  * instruction or as a program output, that is tracked with an
  96  * instance of this struct.  All references to a value occur after it
  97  * is created.  After the last reference, a value is dead and can be
  98  * discarded.
  99  *
 100  * brw_wm_grf: Represents a physical hardware register.  May be either
 101  * empty or hold a value.  Register allocation is the process of
 102  * assigning values to grf registers.  This occurs in pass2 and the
 103  * brw_wm_grf struct is not used before that.
 104  *
 105  * Fragment program registers: These are time-varying constructs that
 106  * are hard to reason about and which we translate away in pass0.  A
 107  * single fragment program register element (eg. temp[0].x) will be
 108  * translated to one or more brw_wm_value structs, one for each time
 109  * that temp[0].x is written to during the program.
 110  */
 111
 112
 113
 114 /* Used in pass2 to track register allocation.
 115  */
 116 struct brw_wm_grf {
 117    struct brw_wm_value *value;
 118    GLuint nextuse;
 119 };
 120
 121 struct brw_wm_value {
 122    struct brw_reg hw_reg;       /* emitted to this reg, may not always be there */
 123    struct brw_wm_ref *lastuse;
 124    struct brw_wm_grf *resident;
 125    GLuint contributes_to_output:1;
 126    GLuint spill_slot:16;        /* if non-zero, spill immediately after calculation */
 127 };
 128
 129 struct brw_wm_ref {
 130    struct brw_reg hw_reg;       /* nr filled in in pass2, everything else, pass0 */
 131    struct brw_wm_value *value;
 132    struct brw_wm_ref *prevuse;
 133    GLuint unspill_reg:7;        /* unspill to reg */
 134    GLuint emitted:1;
 135    GLuint insn:24;
 136 };
 137
 138 struct brw_wm_constref {
 139    const struct brw_wm_ref *ref;
 140    GLfloat constval;
 141 };
 142
 143
 144 struct brw_wm_instruction {
 145    struct brw_wm_value *dst[4];
 146    struct brw_wm_ref *src[3][4];
 147    GLuint opcode:8;
 148    GLuint saturate:1;
 149    GLuint writemask:4;
 150    GLuint tex_unit:4;   /* texture unit for TEX, TXD, TXP instructions */
 151    GLuint tex_idx:3;    /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */
 152    GLuint tex_shadow:1; /* do shadow comparison? */
 153    GLuint eot:1;        /* End of thread indicator for FB_WRITE*/
 154    GLuint target:10;    /* target binding table index for FB_WRITE*/
 155 };
 156
 157
 158 #define BRW_WM_MAX_INSN  (MAX_PROGRAM_INSTRUCTIONS*3 + FRAG_ATTRIB_MAX + 3)
 159 #define BRW_WM_MAX_GRF   128            /* hardware limit */
 160 #define BRW_WM_MAX_VREG  (BRW_WM_MAX_INSN * 4)
 161 #define BRW_WM_MAX_REF   (BRW_WM_MAX_INSN * 12)
 162 #define BRW_WM_MAX_PARAM 256
 163 #define BRW_WM_MAX_CONST 256
 164 #define BRW_WM_MAX_SUBROUTINE 16
 165
 166 /* used in masks next to WRITEMASK_*. */
 167 #define SATURATE (1<<5)
 168
 169
 170 /* New opcodes to track internal operations required for WM unit.
 171  * These are added early so that the registers used can be tracked,
 172  * freed and reused like those of other instructions.
 173  */
 174 #define WM_PIXELXY        (MAX_OPCODE)
 175 #define WM_DELTAXY        (MAX_OPCODE + 1)
 176 #define WM_PIXELW         (MAX_OPCODE + 2)
 177 #define WM_LINTERP        (MAX_OPCODE + 3)
 178 #define WM_PINTERP        (MAX_OPCODE + 4)
 179 #define WM_CINTERP        (MAX_OPCODE + 5)
 180 #define WM_WPOSXY         (MAX_OPCODE + 6)
 181 #define WM_FB_WRITE       (MAX_OPCODE + 7)
 182 #define WM_FRONTFACING    (MAX_OPCODE + 8)
 183 #define MAX_WM_OPCODE     (MAX_OPCODE + 9)
 184
 185 #define PROGRAM_PAYLOAD   (PROGRAM_FILE_MAX)
 186 #define NUM_FILES         (PROGRAM_PAYLOAD + 1)
 187
 188 #define PAYLOAD_DEPTH     (FRAG_ATTRIB_MAX)
 189 #define PAYLOAD_W         (FRAG_ATTRIB_MAX + 1)
 190 #define PAYLOAD_FP_REG_MAX (FRAG_ATTRIB_MAX + 2)
 191
 192 struct brw_wm_compile {
 193    struct brw_compile func;
 194    struct brw_wm_prog_key key;
 195    struct brw_wm_prog_data prog_data;
 196
 197    struct brw_fragment_program *fp;
 198
 199    GLfloat (*env_param)[4];
 200
 201    enum {
 202       START,
 203       PASS2_DONE
 204    } state;
 205
 206    /* Initial pass - translate fp instructions to fp instructions,
 207     * simplifying and adding instructions for interpolation and
 208     * framebuffer writes.
 209     */
 210    struct prog_instruction *prog_instructions;
 211    GLuint nr_fp_insns;
 212    GLuint fp_temp;
 213    GLuint fp_interp_emitted;
 214    GLuint fp_fragcolor_emitted;
 215
 216    struct prog_src_register pixel_xy;
 217    struct prog_src_register delta_xy;
 218    struct prog_src_register pixel_w;
 219
 220
 221    struct brw_wm_value *vreg;
 222    GLuint nr_vreg;
 223
 224    struct brw_wm_value creg[BRW_WM_MAX_PARAM];
 225    GLuint nr_creg;
 226
 227    struct {
 228       struct brw_wm_value depth[4]; /* includes r0/r1 */
 229       struct brw_wm_value input_interp[FRAG_ATTRIB_MAX];
 230    } payload;
 231
 232
 233    const struct brw_wm_ref *pass0_fp_reg[NUM_FILES][256][4];
 234
 235    struct brw_wm_ref undef_ref;
 236    struct brw_wm_value undef_value;
 237
 238    struct brw_wm_ref *refs;
 239    GLuint nr_refs;
 240
 241    struct brw_wm_instruction *instruction;
 242    GLuint nr_insns;
 243
 244    struct brw_wm_constref constref[BRW_WM_MAX_CONST];
 245    GLuint nr_constrefs;
 246
 247    struct brw_wm_grf pass2_grf[BRW_WM_MAX_GRF/2];
 248
 249    GLuint grf_limit;
 250    GLuint max_wm_grf;
 251    GLuint last_scratch;
 252
 253    GLuint cur_inst;  /**< index of current instruction */
 254
 255    GLboolean out_of_regs;  /**< ran out of GRF registers? */
 256
 257    /** Mapping from Mesa registers to hardware registers */
 258    struct {
 259       GLboolean inited;
 260       struct brw_reg reg;
 261    } wm_regs[NUM_FILES][256][4];
 262
 263    GLboolean used_grf[BRW_WM_MAX_GRF];
 264    GLuint first_free_grf;
 265    struct brw_reg stack;
 266    struct brw_reg emit_mask_reg;
 267    GLuint tmp_regs[BRW_WM_MAX_GRF];
 268    GLuint tmp_index;
 269    GLuint tmp_max;
 270    GLuint subroutines[BRW_WM_MAX_SUBROUTINE];
 271    GLuint dispatch_width;
 272
 273    /** we may need up to 3 constants per instruction (if use_const_buffer) */
 274    struct {
 275       GLint index;
 276       struct brw_reg reg;
 277    } current_const[3];
 278 };
 279
 280
 281 /** Bits for prog_instruction::Aux field */
 282 #define INST_AUX_EOT      0x1
 283 #define INST_AUX_TARGET(T)  (T << 1)
 284 #define INST_AUX_GET_TARGET(AUX) ((AUX) >> 1)
 285
 286
 287 GLuint brw_wm_nr_args( GLuint opcode );
 288 GLuint brw_wm_is_scalar_result( GLuint opcode );
 289
 290 void brw_wm_pass_fp( struct brw_wm_compile *c );
 291 void brw_wm_pass0( struct brw_wm_compile *c );
 292 void brw_wm_pass1( struct brw_wm_compile *c );
 293 void brw_wm_pass2( struct brw_wm_compile *c );
 294 void brw_wm_emit( struct brw_wm_compile *c );
 295 GLboolean brw_wm_arg_can_be_immediate(enum prog_opcode, int arg);
 296 void brw_wm_print_value( struct brw_wm_compile *c,
 297                          struct brw_wm_value *value );
 298
 299 void brw_wm_print_ref( struct brw_wm_compile *c,
 300                        struct brw_wm_ref *ref );
 301
 302 void brw_wm_print_insn( struct brw_wm_compile *c,
 303                         struct brw_wm_instruction *inst );
 304
 305 void brw_wm_print_program( struct brw_wm_compile *c,
 306                            const char *stage );
 307
 308 void brw_wm_lookup_iz( struct intel_context *intel,
 309                        GLuint line_aa,
 310                        GLuint lookup,
 311                        GLboolean ps_uses_depth,
 312                        struct brw_wm_prog_key *key );
 313
 314 GLboolean brw_wm_is_glsl(const struct gl_fragment_program *fp);
 315 void brw_wm_glsl_emit(struct brw_context *brw, struct brw_wm_compile *c);
 316 GLboolean brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c);
 317
 318 /* brw_wm_emit.c */
 319 void emit_alu1(struct brw_compile *p,
 320                struct brw_instruction *(*func)(struct brw_compile *,
 321                                                struct brw_reg,
 322                                                struct brw_reg),
 323                const struct brw_reg *dst,
 324                GLuint mask,
 325                const struct brw_reg *arg0);
 326 void emit_alu2(struct brw_compile *p,
 327                struct brw_instruction *(*func)(struct brw_compile *,
 328                                                struct brw_reg,
 329                                                struct brw_reg,
 330                                                struct brw_reg),
 331                const struct brw_reg *dst,
 332                GLuint mask,
 333                const struct brw_reg *arg0,
 334                const struct brw_reg *arg1);
 335 void emit_cinterp(struct brw_compile *p,
 336                   const struct brw_reg *dst,
 337                   GLuint mask,
 338                   const struct brw_reg *arg0);
 339 void emit_cmp(struct brw_compile *p,
 340               const struct brw_reg *dst,
 341               GLuint mask,
 342               const struct brw_reg *arg0,
 343               const struct brw_reg *arg1,
 344               const struct brw_reg *arg2);
 345 void emit_ddxy(struct brw_compile *p,
 346                const struct brw_reg *dst,
 347                GLuint mask,
 348                GLboolean is_ddx,
 349                const struct brw_reg *arg0);
 350 void emit_delta_xy(struct brw_compile *p,
 351                    const struct brw_reg *dst,
 352                    GLuint mask,
 353                    const struct brw_reg *arg0);
 354 void emit_dp2(struct brw_compile *p,
 355               const struct brw_reg *dst,
 356               GLuint mask,
 357               const struct brw_reg *arg0,
 358               const struct brw_reg *arg1);
 359 void emit_dp3(struct brw_compile *p,
 360               const struct brw_reg *dst,
 361               GLuint mask,
 362               const struct brw_reg *arg0,
 363               const struct brw_reg *arg1);
 364 void emit_dp4(struct brw_compile *p,
 365               const struct brw_reg *dst,
 366               GLuint mask,
 367               const struct brw_reg *arg0,
 368               const struct brw_reg *arg1);
 369 void emit_dph(struct brw_compile *p,
 370               const struct brw_reg *dst,
 371               GLuint mask,
 372               const struct brw_reg *arg0,
 373               const struct brw_reg *arg1);
 374 void emit_fb_write(struct brw_wm_compile *c,
 375                    struct brw_reg *arg0,
 376                    struct brw_reg *arg1,
 377                    struct brw_reg *arg2,
 378                    GLuint target,
 379                    GLuint eot);
 380 void emit_frontfacing(struct brw_compile *p,
 381                       const struct brw_reg *dst,
 382                       GLuint mask);
 383 void emit_kil_nv(struct brw_wm_compile *c);
 384 void emit_linterp(struct brw_compile *p,
 385                   const struct brw_reg *dst,
 386                   GLuint mask,
 387                   const struct brw_reg *arg0,
 388                   const struct brw_reg *deltas);
 389 void emit_lrp(struct brw_compile *p,
 390               const struct brw_reg *dst,
 391               GLuint mask,
 392               const struct brw_reg *arg0,
 393               const struct brw_reg *arg1,
 394               const struct brw_reg *arg2);
 395 void emit_mad(struct brw_compile *p,
 396               const struct brw_reg *dst,
 397               GLuint mask,
 398               const struct brw_reg *arg0,
 399               const struct brw_reg *arg1,
 400               const struct brw_reg *arg2);
 401 void emit_math1(struct brw_wm_compile *c,
 402                 GLuint function,
 403                 const struct brw_reg *dst,
 404                 GLuint mask,
 405                 const struct brw_reg *arg0);
 406 void emit_math2(struct brw_wm_compile *c,
 407                 GLuint function,
 408                 const struct brw_reg *dst,
 409                 GLuint mask,
 410                 const struct brw_reg *arg0,
 411                 const struct brw_reg *arg1);
 412 void emit_min(struct brw_compile *p,
 413               const struct brw_reg *dst,
 414               GLuint mask,
 415               const struct brw_reg *arg0,
 416               const struct brw_reg *arg1);
 417 void emit_max(struct brw_compile *p,
 418               const struct brw_reg *dst,
 419               GLuint mask,
 420               const struct brw_reg *arg0,
 421               const struct brw_reg *arg1);
 422 void emit_pinterp(struct brw_compile *p,
 423                   const struct brw_reg *dst,
 424                   GLuint mask,
 425                   const struct brw_reg *arg0,
 426                   const struct brw_reg *deltas,
 427                   const struct brw_reg *w);
 428 void emit_pixel_xy(struct brw_wm_compile *c,
 429                    const struct brw_reg *dst,
 430                    GLuint mask);
 431 void emit_pixel_w(struct brw_wm_compile *c,
 432                   const struct brw_reg *dst,
 433                   GLuint mask,
 434                   const struct brw_reg *arg0,
 435                   const struct brw_reg *deltas);
 436 void emit_sop(struct brw_compile *p,
 437               const struct brw_reg *dst,
 438               GLuint mask,
 439               GLuint cond,
 440               const struct brw_reg *arg0,
 441               const struct brw_reg *arg1);
 442 void emit_sign(struct brw_compile *p,
 443                const struct brw_reg *dst,
 444                GLuint mask,
 445                const struct brw_reg *arg0);
 446 void emit_tex(struct brw_wm_compile *c,
 447               struct brw_reg *dst,
 448               GLuint dst_flags,
 449               struct brw_reg *arg,
 450               struct brw_reg depth_payload,
 451               GLuint tex_idx,
 452               GLuint sampler,
 453               GLboolean shadow);
 454 void emit_txb(struct brw_wm_compile *c,
 455               struct brw_reg *dst,
 456               GLuint dst_flags,
 457               struct brw_reg *arg,
 458               struct brw_reg depth_payload,
 459               GLuint tex_idx,
 460               GLuint sampler);
 461 void emit_wpos_xy(struct brw_wm_compile *c,
 462                   const struct brw_reg *dst,
 463                   GLuint mask,
 464                   const struct brw_reg *arg0);
 465 void emit_xpd(struct brw_compile *p,
 466               const struct brw_reg *dst,
 467               GLuint mask,
 468               const struct brw_reg *arg0,
 469               const struct brw_reg *arg1);
 470
 471 GLboolean brw_compile_shader(struct gl_context *ctx,
 472                              struct gl_shader *shader);
 473 GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog);
 474 struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type);
 475 struct gl_shader_program *brw_new_shader_program(struct gl_context *ctx, GLuint name);
 476
 477 bool brw_color_buffer_write_enabled(struct brw_context *brw);
 478
 479 #endif