src/mesa/drivers/dri/i965/brw_wm.h

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32
  33 #ifndef BRW_WM_H
  34 #define BRW_WM_H
  35
  36 #include <stdbool.h>
  37
  38 #include "program/prog_instruction.h"
  39 #include "brw_context.h"
  40 #include "brw_eu.h"
  41
  42 #define SATURATE (1<<5)
  43
  44 /* A big lookup table is used to figure out which and how many
  45  * additional regs will inserted before the main payload in the WM
  46  * program execution.  These mainly relate to depth and stencil
  47  * processing and the early-depth-test optimization.
  48  */
  49 #define IZ_PS_KILL_ALPHATEST_BIT    0x1
  50 #define IZ_PS_COMPUTES_DEPTH_BIT    0x2
  51 #define IZ_DEPTH_WRITE_ENABLE_BIT   0x4
  52 #define IZ_DEPTH_TEST_ENABLE_BIT    0x8
  53 #define IZ_STENCIL_WRITE_ENABLE_BIT 0x10
  54 #define IZ_STENCIL_TEST_ENABLE_BIT  0x20
  55 #define IZ_BIT_MAX                  0x40
  56
  57 #define AA_NEVER     0
  58 #define AA_SOMETIMES 1
  59 #define AA_ALWAYS    2
  60
  61 struct brw_wm_prog_key {
  62    GLuint stats_wm:1;
  63    GLuint flat_shade:1;
  64    GLuint linear_color:1;  /**< linear interpolation vs perspective interp */
  65    GLuint nr_color_regions:5;
  66    GLuint render_to_fbo:1;
  67    GLuint alpha_test:1;
  68    GLuint clamp_fragment_color:1;
  69
  70    GLbitfield proj_attrib_mask; /**< one bit per fragment program attribute */
  71    GLuint shadowtex_mask:16;
  72    GLuint yuvtex_mask:16;
  73    GLuint yuvtex_swap_mask:16;  /* UV swaped */
  74
  75    GLushort tex_swizzles[BRW_MAX_TEX_UNIT];
  76
  77    GLushort drawable_height;
  78    GLbitfield64 vp_outputs_written;
  79    GLuint iz_lookup;
  80    GLuint line_aa;
  81    GLuint program_string_id:32;
  82 };
  83
  84
  85 /* A bit of a glossary:
  86  *
  87  * brw_wm_value: A computed value or program input.  Values are
  88  * constant, they are created once and are never modified.  When a
  89  * fragment program register is written or overwritten, new values are
  90  * created fresh, preserving the rule that values are constant.
  91  *
  92  * brw_wm_ref: A reference to a value.  Wherever a value used is by an
  93  * instruction or as a program output, that is tracked with an
  94  * instance of this struct.  All references to a value occur after it
  95  * is created.  After the last reference, a value is dead and can be
  96  * discarded.
  97  *
  98  * brw_wm_grf: Represents a physical hardware register.  May be either
  99  * empty or hold a value.  Register allocation is the process of
 100  * assigning values to grf registers.  This occurs in pass2 and the
 101  * brw_wm_grf struct is not used before that.
 102  *
 103  * Fragment program registers: These are time-varying constructs that
 104  * are hard to reason about and which we translate away in pass0.  A
 105  * single fragment program register element (eg. temp[0].x) will be
 106  * translated to one or more brw_wm_value structs, one for each time
 107  * that temp[0].x is written to during the program.
 108  */
 109
 110
 111
 112 /* Used in pass2 to track register allocation.
 113  */
 114 struct brw_wm_grf {
 115    struct brw_wm_value *value;
 116    GLuint nextuse;
 117 };
 118
 119 struct brw_wm_value {
 120    struct brw_reg hw_reg;       /* emitted to this reg, may not always be there */
 121    struct brw_wm_ref *lastuse;
 122    struct brw_wm_grf *resident;
 123    GLuint contributes_to_output:1;
 124    GLuint spill_slot:16;        /* if non-zero, spill immediately after calculation */
 125 };
 126
 127 struct brw_wm_ref {
 128    struct brw_reg hw_reg;       /* nr filled in in pass2, everything else, pass0 */
 129    struct brw_wm_value *value;
 130    struct brw_wm_ref *prevuse;
 131    GLuint unspill_reg:7;        /* unspill to reg */
 132    GLuint emitted:1;
 133    GLuint insn:24;
 134 };
 135
 136 struct brw_wm_constref {
 137    const struct brw_wm_ref *ref;
 138    GLfloat constval;
 139 };
 140
 141
 142 struct brw_wm_instruction {
 143    struct brw_wm_value *dst[4];
 144    struct brw_wm_ref *src[3][4];
 145    GLuint opcode:8;
 146    GLuint saturate:1;
 147    GLuint writemask:4;
 148    GLuint tex_unit:4;   /* texture unit for TEX, TXD, TXP instructions */
 149    GLuint tex_idx:3;    /* TEXTURE_1D,2D,3D,CUBE,RECT_INDEX source target */
 150    GLuint tex_shadow:1; /* do shadow comparison? */
 151    GLuint eot:1;        /* End of thread indicator for FB_WRITE*/
 152    GLuint target:10;    /* target binding table index for FB_WRITE*/
 153 };
 154
 155
 156 #define BRW_WM_MAX_INSN  (MAX_PROGRAM_INSTRUCTIONS*3 + FRAG_ATTRIB_MAX + 3)
 157 #define BRW_WM_MAX_GRF   128            /* hardware limit */
 158 #define BRW_WM_MAX_VREG  (BRW_WM_MAX_INSN * 4)
 159 #define BRW_WM_MAX_REF   (BRW_WM_MAX_INSN * 12)
 160 #define BRW_WM_MAX_PARAM 256
 161 #define BRW_WM_MAX_CONST 256
 162 #define BRW_WM_MAX_SUBROUTINE 16
 163
 164 /* used in masks next to WRITEMASK_*. */
 165 #define SATURATE (1<<5)
 166
 167
 168 /* New opcodes to track internal operations required for WM unit.
 169  * These are added early so that the registers used can be tracked,
 170  * freed and reused like those of other instructions.
 171  */
 172 #define WM_PIXELXY        (MAX_OPCODE)
 173 #define WM_DELTAXY        (MAX_OPCODE + 1)
 174 #define WM_PIXELW         (MAX_OPCODE + 2)
 175 #define WM_LINTERP        (MAX_OPCODE + 3)
 176 #define WM_PINTERP        (MAX_OPCODE + 4)
 177 #define WM_CINTERP        (MAX_OPCODE + 5)
 178 #define WM_WPOSXY         (MAX_OPCODE + 6)
 179 #define WM_FB_WRITE       (MAX_OPCODE + 7)
 180 #define WM_FRONTFACING    (MAX_OPCODE + 8)
 181 #define MAX_WM_OPCODE     (MAX_OPCODE + 9)
 182
 183 #define PROGRAM_PAYLOAD   (PROGRAM_FILE_MAX)
 184 #define NUM_FILES         (PROGRAM_PAYLOAD + 1)
 185
 186 #define PAYLOAD_DEPTH     (FRAG_ATTRIB_MAX)
 187 #define PAYLOAD_W         (FRAG_ATTRIB_MAX + 1)
 188 #define PAYLOAD_FP_REG_MAX (FRAG_ATTRIB_MAX + 2)
 189
 190 struct brw_wm_compile {
 191    struct brw_compile func;
 192    struct brw_wm_prog_key key;
 193    struct brw_wm_prog_data prog_data;
 194
 195    struct brw_fragment_program *fp;
 196
 197    GLfloat (*env_param)[4];
 198
 199    enum {
 200       START,
 201       PASS2_DONE
 202    } state;
 203
 204    uint8_t source_depth_reg;
 205    uint8_t source_w_reg;
 206    uint8_t aa_dest_stencil_reg;
 207    uint8_t dest_depth_reg;
 208    uint8_t nr_payload_regs;
 209    GLuint computes_depth:1;     /* could be derived from program string */
 210    GLuint source_depth_to_render_target:1;
 211    GLuint runtime_check_aads_emit:1;
 212
 213    /* Initial pass - translate fp instructions to fp instructions,
 214     * simplifying and adding instructions for interpolation and
 215     * framebuffer writes.
 216     */
 217    struct prog_instruction *prog_instructions;
 218    GLuint nr_fp_insns;
 219    GLuint fp_temp;
 220    GLuint fp_interp_emitted;
 221
 222    struct prog_src_register pixel_xy;
 223    struct prog_src_register delta_xy;
 224    struct prog_src_register pixel_w;
 225
 226
 227    struct brw_wm_value *vreg;
 228    GLuint nr_vreg;
 229
 230    struct brw_wm_value creg[BRW_WM_MAX_PARAM];
 231    GLuint nr_creg;
 232
 233    struct {
 234       struct brw_wm_value depth[4]; /* includes r0/r1 */
 235       struct brw_wm_value input_interp[FRAG_ATTRIB_MAX];
 236    } payload;
 237
 238
 239    const struct brw_wm_ref *pass0_fp_reg[NUM_FILES][256][4];
 240
 241    struct brw_wm_ref undef_ref;
 242    struct brw_wm_value undef_value;
 243
 244    struct brw_wm_ref *refs;
 245    GLuint nr_refs;
 246
 247    struct brw_wm_instruction *instruction;
 248    GLuint nr_insns;
 249
 250    struct brw_wm_constref constref[BRW_WM_MAX_CONST];
 251    GLuint nr_constrefs;
 252
 253    struct brw_wm_grf pass2_grf[BRW_WM_MAX_GRF/2];
 254
 255    GLuint grf_limit;
 256    GLuint max_wm_grf;
 257    GLuint last_scratch;
 258
 259    GLuint cur_inst;  /**< index of current instruction */
 260
 261    GLboolean out_of_regs;  /**< ran out of GRF registers? */
 262
 263    /** Mapping from Mesa registers to hardware registers */
 264    struct {
 265       GLboolean inited;
 266       struct brw_reg reg;
 267    } wm_regs[NUM_FILES][256][4];
 268
 269    GLboolean used_grf[BRW_WM_MAX_GRF];
 270    GLuint first_free_grf;
 271    struct brw_reg stack;
 272    struct brw_reg emit_mask_reg;
 273    GLuint tmp_regs[BRW_WM_MAX_GRF];
 274    GLuint tmp_index;
 275    GLuint tmp_max;
 276    GLuint subroutines[BRW_WM_MAX_SUBROUTINE];
 277    GLuint dispatch_width;
 278
 279    /** we may need up to 3 constants per instruction (if use_const_buffer) */
 280    struct {
 281       GLint index;
 282       struct brw_reg reg;
 283    } current_const[3];
 284 };
 285
 286
 287 /** Bits for prog_instruction::Aux field */
 288 #define INST_AUX_EOT      0x1
 289 #define INST_AUX_TARGET(T)  (T << 1)
 290 #define INST_AUX_GET_TARGET(AUX) ((AUX) >> 1)
 291
 292
 293 GLuint brw_wm_nr_args( GLuint opcode );
 294 GLuint brw_wm_is_scalar_result( GLuint opcode );
 295
 296 void brw_wm_pass_fp( struct brw_wm_compile *c );
 297 void brw_wm_pass0( struct brw_wm_compile *c );
 298 void brw_wm_pass1( struct brw_wm_compile *c );
 299 void brw_wm_pass2( struct brw_wm_compile *c );
 300 void brw_wm_emit( struct brw_wm_compile *c );
 301 GLboolean brw_wm_arg_can_be_immediate(enum prog_opcode, int arg);
 302 void brw_wm_print_value( struct brw_wm_compile *c,
 303                          struct brw_wm_value *value );
 304
 305 void brw_wm_print_ref( struct brw_wm_compile *c,
 306                        struct brw_wm_ref *ref );
 307
 308 void brw_wm_print_insn( struct brw_wm_compile *c,
 309                         struct brw_wm_instruction *inst );
 310
 311 void brw_wm_print_program( struct brw_wm_compile *c,
 312                            const char *stage );
 313
 314 void brw_wm_lookup_iz(struct intel_context *intel,
 315                       struct brw_wm_compile *c);
 316
 317 bool brw_wm_fs_emit(struct brw_context *brw, struct brw_wm_compile *c);
 318
 319 /* brw_wm_emit.c */
 320 void emit_alu1(struct brw_compile *p,
 321                struct brw_instruction *(*func)(struct brw_compile *,
 322                                                struct brw_reg,
 323                                                struct brw_reg),
 324                const struct brw_reg *dst,
 325                GLuint mask,
 326                const struct brw_reg *arg0);
 327 void emit_alu2(struct brw_compile *p,
 328                struct brw_instruction *(*func)(struct brw_compile *,
 329                                                struct brw_reg,
 330                                                struct brw_reg,
 331                                                struct brw_reg),
 332                const struct brw_reg *dst,
 333                GLuint mask,
 334                const struct brw_reg *arg0,
 335                const struct brw_reg *arg1);
 336 void emit_cinterp(struct brw_compile *p,
 337                   const struct brw_reg *dst,
 338                   GLuint mask,
 339                   const struct brw_reg *arg0);
 340 void emit_cmp(struct brw_compile *p,
 341               const struct brw_reg *dst,
 342               GLuint mask,
 343               const struct brw_reg *arg0,
 344               const struct brw_reg *arg1,
 345               const struct brw_reg *arg2);
 346 void emit_ddxy(struct brw_compile *p,
 347                const struct brw_reg *dst,
 348                GLuint mask,
 349                GLboolean is_ddx,
 350                const struct brw_reg *arg0);
 351 void emit_delta_xy(struct brw_compile *p,
 352                    const struct brw_reg *dst,
 353                    GLuint mask,
 354                    const struct brw_reg *arg0);
 355 void emit_dp2(struct brw_compile *p,
 356               const struct brw_reg *dst,
 357               GLuint mask,
 358               const struct brw_reg *arg0,
 359               const struct brw_reg *arg1);
 360 void emit_dp3(struct brw_compile *p,
 361               const struct brw_reg *dst,
 362               GLuint mask,
 363               const struct brw_reg *arg0,
 364               const struct brw_reg *arg1);
 365 void emit_dp4(struct brw_compile *p,
 366               const struct brw_reg *dst,
 367               GLuint mask,
 368               const struct brw_reg *arg0,
 369               const struct brw_reg *arg1);
 370 void emit_dph(struct brw_compile *p,
 371               const struct brw_reg *dst,
 372               GLuint mask,
 373               const struct brw_reg *arg0,
 374               const struct brw_reg *arg1);
 375 void emit_fb_write(struct brw_wm_compile *c,
 376                    struct brw_reg *arg0,
 377                    struct brw_reg *arg1,
 378                    struct brw_reg *arg2,
 379                    GLuint target,
 380                    GLuint eot);
 381 void emit_frontfacing(struct brw_compile *p,
 382                       const struct brw_reg *dst,
 383                       GLuint mask);
 384 void emit_linterp(struct brw_compile *p,
 385                   const struct brw_reg *dst,
 386                   GLuint mask,
 387                   const struct brw_reg *arg0,
 388                   const struct brw_reg *deltas);
 389 void emit_lrp(struct brw_compile *p,
 390               const struct brw_reg *dst,
 391               GLuint mask,
 392               const struct brw_reg *arg0,
 393               const struct brw_reg *arg1,
 394               const struct brw_reg *arg2);
 395 void emit_mad(struct brw_compile *p,
 396               const struct brw_reg *dst,
 397               GLuint mask,
 398               const struct brw_reg *arg0,
 399               const struct brw_reg *arg1,
 400               const struct brw_reg *arg2);
 401 void emit_math1(struct brw_wm_compile *c,
 402                 GLuint function,
 403                 const struct brw_reg *dst,
 404                 GLuint mask,
 405                 const struct brw_reg *arg0);
 406 void emit_math2(struct brw_wm_compile *c,
 407                 GLuint function,
 408                 const struct brw_reg *dst,
 409                 GLuint mask,
 410                 const struct brw_reg *arg0,
 411                 const struct brw_reg *arg1);
 412 void emit_min(struct brw_compile *p,
 413               const struct brw_reg *dst,
 414               GLuint mask,
 415               const struct brw_reg *arg0,
 416               const struct brw_reg *arg1);
 417 void emit_max(struct brw_compile *p,
 418               const struct brw_reg *dst,
 419               GLuint mask,
 420               const struct brw_reg *arg0,
 421               const struct brw_reg *arg1);
 422 void emit_pinterp(struct brw_compile *p,
 423                   const struct brw_reg *dst,
 424                   GLuint mask,
 425                   const struct brw_reg *arg0,
 426                   const struct brw_reg *deltas,
 427                   const struct brw_reg *w);
 428 void emit_pixel_xy(struct brw_wm_compile *c,
 429                    const struct brw_reg *dst,
 430                    GLuint mask);
 431 void emit_pixel_w(struct brw_wm_compile *c,
 432                   const struct brw_reg *dst,
 433                   GLuint mask,
 434                   const struct brw_reg *arg0,
 435                   const struct brw_reg *deltas);
 436 void emit_sop(struct brw_compile *p,
 437               const struct brw_reg *dst,
 438               GLuint mask,
 439               GLuint cond,
 440               const struct brw_reg *arg0,
 441               const struct brw_reg *arg1);
 442 void emit_sign(struct brw_compile *p,
 443                const struct brw_reg *dst,
 444                GLuint mask,
 445                const struct brw_reg *arg0);
 446 void emit_tex(struct brw_wm_compile *c,
 447               struct brw_reg *dst,
 448               GLuint dst_flags,
 449               struct brw_reg *arg,
 450               struct brw_reg depth_payload,
 451               GLuint tex_idx,
 452               GLuint sampler,
 453               GLboolean shadow);
 454 void emit_txb(struct brw_wm_compile *c,
 455               struct brw_reg *dst,
 456               GLuint dst_flags,
 457               struct brw_reg *arg,
 458               struct brw_reg depth_payload,
 459               GLuint tex_idx,
 460               GLuint sampler);
 461 void emit_wpos_xy(struct brw_wm_compile *c,
 462                   const struct brw_reg *dst,
 463                   GLuint mask,
 464                   const struct brw_reg *arg0);
 465 void emit_xpd(struct brw_compile *p,
 466               const struct brw_reg *dst,
 467               GLuint mask,
 468               const struct brw_reg *arg0,
 469               const struct brw_reg *arg1);
 470
 471 GLboolean brw_link_shader(struct gl_context *ctx, struct gl_shader_program *prog);
 472 struct gl_shader *brw_new_shader(struct gl_context *ctx, GLuint name, GLuint type);
 473 struct gl_shader_program *brw_new_shader_program(struct gl_context *ctx, GLuint name);
 474
 475 bool brw_color_buffer_write_enabled(struct brw_context *brw);
 476 bool brw_render_target_supported(gl_format format);
 477 void brw_wm_payload_setup(struct brw_context *brw,
 478                           struct brw_wm_compile *c);
 479
 480 #endif